Fix GICv2 handling of pending interrupts

[PATCH v2 0/2] Fix GICv2 handling of pending interrupts

Sebastian Huber posted 2 patches 6 months ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240524113256.8102-1-sebastian.huber@embedded-brains.de

Maintainers: Peter Maydell <peter.maydell@linaro.org>

hw/intc/arm_gic.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)

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[PATCH v2 0/2] Fix GICv2 handling of pending interrupts

Posted by Sebastian Huber 6 months ago

v2:

* Fix handling of SPIs.

* Remove pending state if not in new target list.

Sebastian Huber (2):
  hw/intc/arm_gic: Fix set pending of PPIs
  hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn

 hw/intc/arm_gic.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

-- 
2.35.3

Re: [PATCH v2 0/2] Fix GICv2 handling of pending interrupts

Posted by Peter Maydell 5 months, 4 weeks ago

On Fri, 24 May 2024 at 12:33, Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
>
> v2:
>
> * Fix handling of SPIs.
>
> * Remove pending state if not in new target list.
>
> Sebastian Huber (2):
>   hw/intc/arm_gic: Fix set pending of PPIs
>   hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn



Applied to target-arm.next, thanks.

-- PMM