Series comparison

-[PULL 00/10] loongarch-to-apply queue
+[PULL v2 0/6] loongarch-to-apply queue
-The following changes since commit 6af8037c42fdc3d20d5aa2686799ab356a9ee1a9:
+The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:
-  Merge tag 'pull-vfio-20240522' of https://github.com/legoater/qemu into staging (2024-05-22 06:02:06 -0700)
+  Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240523
+  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227
-for you to fetch changes up to 6204af704a071ea68d3af55c0502b112a7af9546:
+for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:
-  hw/loongarch/virt: Fix FDT memory node address width (2024-05-23 09:30:41 +0800)
+  target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20240523
+pull-loongarch-20241227
 v1 ... v2
 . Modify patch auther inconsistent with SOB
 ----------------------------------------------------------------
-Bibo Mao (7):
+Bibo Mao (5):
-      hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
+      target/loongarch: Use actual operand size with vbsrl check
-      hw/loongarch: Refine acpi srat table for numa memory
+      hw/loongarch/virt: Create fdt table on machine creation done notification
-      hw/loongarch: Refine fadt memory table for numa memory
+      hw/loongarch/virt: Improve fdt table creation for CPU object
-      hw/loongarch: Refine fwcfg memory map
+      target/loongarch: Use auto method with LSX feature
-      hw/loongarch: Refine system dram memory region
+      target/loongarch: Use auto method with LASX feature
       hw/loongarch: Remove minimum and default memory size
       target/loongarch: Add loongarch vector property unconditionally
-Jiaxun Yang (1):
+Guo Hongyu (1):
-      hw/loongarch/virt: Fix FDT memory node address width
+      target/loongarch: Fix vldi inst
-Song Gao (2):
+ hw/loongarch/virt.c                             | 142 ++++++++++++++----------
-      target/loongarch/kvm: Fix VM recovery from disk failures
+ target/loongarch/cpu.c                          |  86 ++++++++------
-      target/loongarch/kvm: fpu save the vreg registers high 192bit
+ target/loongarch/cpu.h                          |   4 +
+ target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
- hw/loongarch/acpi-build.c  |  58 +++++++++------
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
- hw/loongarch/virt.c        | 179 ++++++++++++++++++++++++++++++++-------------
+files changed, 249 insertions(+), 94 deletions(-)
  target/loongarch/cpu.c     |  14 +---
  target/loongarch/kvm/kvm.c |   6 ++
  target/loongarch/machine.c |   6 +-
 files changed, 176 insertions(+), 87 deletions(-)

-[PULL 10/10] hw/loongarch/virt: Fix FDT memory node address width
+[PULL v2 1/6] target/loongarch: Fix vldi inst
-From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
-Higher bits for memory nodes were omitted at qemu_fdt_setprop_cells.
+Refer to the link below for a description of the vldi instructions:
 https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
 Fixed errors in vldi instruction implementation.
-Cc: qemu-stable@nongnu.org
+Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
-Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Tested-by: Xianglai Li <lixianglai@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
-Message-Id: <20240520-loongarch-fdt-memnode-v1-1-5ea9be93911e@flygoat.com>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 ---
- hw/loongarch/virt.c | 3 ++-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
-file changed, 2 insertions(+), 1 deletion(-)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/virt.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/hw/loongarch/virt.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
+@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
-     char *nodename = g_strdup_printf("/memory@%" PRIx64, base);
+         break;
+     case 1:
-     qemu_fdt_add_subnode(ms->fdt, nodename);
+         /* data: {2{16'0, imm[7:0], 8'0}} */
--    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size);
+-        data = (t << 24) | (t << 8);
-+    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", base >> 32, base,
++        data = (t << 40) | (t << 8);
-+                           size >> 32, size);
+         break;
-     qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory");
+     case 2:
+         /* data: {2{8'0, imm[7:0], 16'0}} */
      if (ms->numa_state && ms->numa_state->num_nodes) {
 --
-.34.1
+.43.5

-[PULL 01/10] target/loongarch/kvm: Fix VM recovery from disk failures
+[PULL v2 2/6] target/loongarch: Use actual operand size with vbsrl check
-vmstate does not save kvm_state_conter,
+Hardcoded 32 bytes is used for vbsrl emulation check, there is
-which can cause VM recovery from disk to fail.
+problem when options lsx=on,lasx=off is used for vbsrl.v instruction
 in TCG mode. It injects LASX exception rather LSX exception.
 Here actual operand size is used.
 Cc: qemu-stable@nongnu.org
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
-Acked-by: Peter Xu <peterx@redhat.com>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20240508024732.3127792-1-gaosong@loongson.cn>
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 ---
- target/loongarch/machine.c | 6 ++++--
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
-file changed, 4 insertions(+), 2 deletions(-)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/machine.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/target/loongarch/machine.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = {
+@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
- /* LoongArch CPU state */
+ {
- const VMStateDescription vmstate_loongarch_cpu = {
+     int i, ofs;
-     .name = "cpu",
--    .version_id = 1,
+-    if (!check_vec(ctx, 32)) {
--    .minimum_version_id = 1,
++    if (!check_vec(ctx, oprsz)) {
-+    .version_id = 2,
+         return true;
-+    .minimum_version_id = 2,
+     }
-     .fields = (const VMStateField[]) {
          VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
          VMSTATE_UINTTL(env.pc, LoongArchCPU),
@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
          VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU),
          VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
 +        VMSTATE_UINT64(kvm_state_counter, LoongArchCPU),
 +
          VMSTATE_END_OF_LIST()
      },
      .subsections = (const VMStateDescription * const []) {
 --
-.34.1
+.43.5

-[PULL 02/10] target/loongarch/kvm: fpu save the vreg registers high 192bit
+Deleted patch
-On kvm side, get_fpu/set_fpu save the vreg registers high 192bits,
-but QEMU missing.
-Cc: qemu-stable@nongnu.org
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20240514110752.989572-1-gaosong@loongson.cn>
----
- target/loongarch/kvm/kvm.c | 6 ++++++
-file changed, 6 insertions(+)
-diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/kvm/kvm.c
-+++ b/target/loongarch/kvm/kvm.c
-@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_get_regs_fp(CPUState *cs)
-     env->fcsr0 = fpu.fcsr;
-     for (i = 0; i < 32; i++) {
-         env->fpr[i].vreg.UD[0] = fpu.fpr[i].val64[0];
-+        env->fpr[i].vreg.UD[1] = fpu.fpr[i].val64[1];
-+        env->fpr[i].vreg.UD[2] = fpu.fpr[i].val64[2];
-+        env->fpr[i].vreg.UD[3] = fpu.fpr[i].val64[3];
-     }
-     for (i = 0; i < 8; i++) {
-         env->cf[i] = fpu.fcc & 0xFF;
-@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
-     fpu.fcc = 0;
-     for (i = 0; i < 32; i++) {
-         fpu.fpr[i].val64[0] = env->fpr[i].vreg.UD[0];
-+        fpu.fpr[i].val64[1] = env->fpr[i].vreg.UD[1];
-+        fpu.fpr[i].val64[2] = env->fpr[i].vreg.UD[2];
-+        fpu.fpr[i].val64[3] = env->fpr[i].vreg.UD[3];
-     }
-     for (i = 0; i < 8; i++) {
---
-.34.1

-[PULL 03/10] hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
+Deleted patch
-From: Bibo Mao <maobibo@loongson.cn>
-If VM runs in kvm mode, VM mode is added in IOCSR feature register.
-So guest can detect kvm hypervisor type and enable possible pv functions.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240514025109.3238398-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- hw/loongarch/virt.c | 12 +++++++++---
-file changed, 9 insertions(+), 3 deletions(-)
-diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/virt.c
-+++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "hw/boards.h"
- #include "hw/char/serial.h"
-+#include "sysemu/kvm.h"
- #include "sysemu/sysemu.h"
- #include "sysemu/qtest.h"
- #include "sysemu/runstate.h"
-@@ -XXX,XX +XXX,XX @@ static void virt_iocsr_misc_write(void *opaque, hwaddr addr,
- static uint64_t virt_iocsr_misc_read(void *opaque, hwaddr addr, unsigned size)
- {
-+    uint64_t ret;
-+
-     switch (addr) {
-     case VERSION_REG:
-         return 0x11ULL;
-     case FEATURE_REG:
--        return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
--               1ULL << IOCSRF_CSRIPI;
-+        ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI);
-+        if (kvm_enabled()) {
-+            ret |= BIT(IOCSRF_VM);
-+        }
-+        return ret;
-     case VENDOR_REG:
-         return 0x6e6f73676e6f6f4cULL; /* "Loongson" */
-     case CPUNAME_REG:
-         return 0x303030354133ULL;     /* "3A5000" */
-     case MISC_FUNC_REG:
--        return 1ULL << IOCSRM_EXTIOI_EN;
-+        return BIT_ULL(IOCSRM_EXTIOI_EN);
-     }
-     return 0ULL;
- }
---
-.34.1

-[PULL 04/10] hw/loongarch: Refine acpi srat table for numa memory
+Deleted patch
-From: Bibo Mao <maobibo@loongson.cn>
-One LoongArch virt machine platform, there is limitation for memory
-map information. The minimum memory size is 256M and minimum memory
-size for numa node0 is 256M also. With qemu numa qtest, it is possible
-that memory size of numa node0 is 128M.
-Limitations for minimum memory size for both total memory and numa
-node0 is removed for acpi srat table creation.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240515093927.3453674-2-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- hw/loongarch/acpi-build.c | 58 +++++++++++++++++++++++----------------
-file changed, 34 insertions(+), 24 deletions(-)
-diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
-+++ b/hw/loongarch/acpi-build.c
-@@ -XXX,XX +XXX,XX @@ static void
- build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
- {
-     int i, arch_id, node_id;
--    uint64_t mem_len, mem_base;
--    int nb_numa_nodes = machine->numa_state->num_nodes;
-+    hwaddr len, base, gap;
-+    NodeInfo *numa_info;
-+    int nodes, nb_numa_nodes = machine->numa_state->num_nodes;
-     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
-     MachineClass *mc = MACHINE_GET_CLASS(lvms);
-     const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
-@@ -XXX,XX +XXX,XX @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
-         build_append_int_noprefix(table_data, 0, 4); /* Reserved */
-     }
--    /* Node0 */
--    build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE,
--                      0, MEM_AFFINITY_ENABLED);
--    mem_base = VIRT_HIGHMEM_BASE;
--    if (!nb_numa_nodes) {
--        mem_len = machine->ram_size - VIRT_LOWMEM_SIZE;
--    } else {
--        mem_len = machine->numa_state->nodes[0].node_mem - VIRT_LOWMEM_SIZE;
-+    base = VIRT_LOWMEM_BASE;
-+    gap = VIRT_LOWMEM_SIZE;
-+    numa_info = machine->numa_state->nodes;
-+    nodes = nb_numa_nodes;
-+    if (!nodes) {
-+        nodes = 1;
-     }
--    if (mem_len)
--        build_srat_memory(table_data, mem_base, mem_len, 0, MEM_AFFINITY_ENABLED);
--
--    /* Node1 - Nodemax */
--    if (nb_numa_nodes) {
--        mem_base += mem_len;
--        for (i = 1; i < nb_numa_nodes; ++i) {
--            if (machine->numa_state->nodes[i].node_mem > 0) {
--                build_srat_memory(table_data, mem_base,
--                                  machine->numa_state->nodes[i].node_mem, i,
--                                  MEM_AFFINITY_ENABLED);
--                mem_base += machine->numa_state->nodes[i].node_mem;
--            }
-+
-+    for (i = 0; i < nodes; i++) {
-+        if (nb_numa_nodes) {
-+            len = numa_info[i].node_mem;
-+        } else {
-+            len = machine->ram_size;
-+        }
-+
-+        /*
-+         * memory for the node splited into two part
-+         *   lowram:  [base, +gap)
-+         *   highram: [VIRT_HIGHMEM_BASE, +(len - gap))
-+         */
-+        if (len >= gap) {
-+            build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
-+            len -= gap;
-+            base = VIRT_HIGHMEM_BASE;
-+            gap = machine->ram_size - VIRT_LOWMEM_SIZE;
-+        }
-+
-+        if (len) {
-+            build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
-+            base += len;
-+            gap  -= len;
-         }
-     }
-     if (machine->device_memory) {
-         build_srat_memory(table_data, machine->device_memory->base,
-                           memory_region_size(&machine->device_memory->mr),
--                          nb_numa_nodes - 1,
-+                          nodes - 1,
-                           MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
-     }
---
-.34.1

-[PULL 08/10] hw/loongarch: Remove minimum and default memory size
+[PULL v2 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification
-From: Bibo Mao <maobibo@loongson.cn>
+The same with ACPI table, fdt table is created on machine done
+notification. Some objects like CPU objects can be created with cold-plug
-Some qtest test cases such as numa use default memory size of generic
+method with command such as -smp x, -device la464-loongarch-cpu, so all
-machine class, which is 128M by fault.
+objects finish to create when machine is done.
 Here generic default memory size is used, and also remove minimum memory
 size which is 1G originally.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240515093927.3453674-6-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/virt.c | 5 -----
+ hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
-file changed, 5 deletions(-)
+file changed, 57 insertions(+), 46 deletions(-)
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
+@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
+     }
+ }
++static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
++{
++    MachineState *machine = MACHINE(lvms);
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
++    int i;
++
++    create_fdt(lvms);
++    fdt_add_cpu_nodes(lvms);
++    fdt_add_memory_nodes(machine);
++    fdt_add_fw_cfg_node(lvms);
++    fdt_add_flash_node(lvms);
++
++    /* Add cpu interrupt-controller */
++    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
++    /* Add Extend I/O Interrupt Controller node */
++    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
++    /* Add PCH PIC node */
++    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
++    /* Add PCH MSI node */
++    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
++    /* Add pcie node */
++    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
++
++    /*
++     * Create uart fdt node in reverse order so that they appear
++     * in the finished device tree lowest address first
++     */
++    for (i = VIRT_UART_COUNT; i-- > 0;) {
++        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
++        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
++        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
++    }
++
++    fdt_add_rtc_node(lvms, &pch_pic_phandle);
++    fdt_add_ged_reset(lvms);
++    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
++                                   VIRT_PLATFORM_BUS_BASEADDRESS,
++                                   VIRT_PLATFORM_BUS_SIZE,
++                                   VIRT_PLATFORM_BUS_IRQ);
++
++    /*
++     * Since lowmem region starts from 0 and Linux kernel legacy start address
++     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
++     * access. FDT size limit with 1 MiB.
++     * Put the FDT into the memory map as a ROM image: this will ensure
++     * the FDT is copied again upon reset, even if addr points into RAM.
++     */
++    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
++    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
++                          &address_space_memory);
++    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
++            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
++}
++
+ static void virt_done(Notifier *notifier, void *data)
+ {
+     LoongArchVirtMachineState *lvms = container_of(notifier,
+                                       LoongArchVirtMachineState, machine_done);
+     virt_build_smbios(lvms);
+     loongarch_acpi_setup(lvms);
++    virt_fdt_setup(lvms);
+ }
+ static void virt_powerdown_req(Notifier *notifier, void *opaque)
+@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
+ }
+ static void virt_devices_init(DeviceState *pch_pic,
+-                                   LoongArchVirtMachineState *lvms,
+-                                   uint32_t *pch_pic_phandle,
+-                                   uint32_t *pch_msi_phandle)
++                                   LoongArchVirtMachineState *lvms)
+ {
+     MachineClass *mc = MACHINE_GET_CLASS(lvms);
+     DeviceState *gpex_dev;
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
+         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
+     }
+-    /* Add pcie node */
+-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
+-
+     /*
+      * Create uart fdt node in reverse order so that they appear
+      * in the finished device tree lowest address first
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
+         serial_mm_init(get_system_memory(), base, 0,
+                        qdev_get_gpio_in(pch_pic, irq),
+, serial_hd(i), DEVICE_LITTLE_ENDIAN);
+-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
+     }
+     /* Network init */
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
+     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
+                          qdev_get_gpio_in(pch_pic,
+                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
+-    fdt_add_rtc_node(lvms, pch_pic_phandle);
+-    fdt_add_ged_reset(lvms);
+     /* acpi ged */
+     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+     CPULoongArchState *env;
+     CPUState *cpu_state;
+     int cpu, pin, i, start, num;
+-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+     /*
+      * Extended IRQ model.
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
+                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
+-    /* Add cpu interrupt-controller */
+-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+-
+     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
+         cpu_state = qemu_get_cpu(cpu);
+         cpudev = DEVICE(cpu_state);
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+         }
+     }
+-    /* Add Extend I/O Interrupt Controller node */
+-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+-
+     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
+     num = VIRT_PCH_PIC_IRQ_NUM;
+     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
+     }
+-    /* Add PCH PIC node */
+-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+-
+     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
+     start   =  num;
+     num = EXTIOI_IRQS - start;
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+                               qdev_get_gpio_in(extioi, i + start));
+     }
+-    /* Add PCH MSI node */
+-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+-
+-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
++    virt_devices_init(pch_pic, lvms);
+ }
+ static void virt_firmware_init(LoongArchVirtMachineState *lvms)
 @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
      }
--    if (ram_size < 1 * GiB) {
+-    create_fdt(lvms);
--        error_report("ram_size must be greater than 1G.");
+-
 -        exit(1);
 -    }
      create_fdt(lvms);
      /* Create IOCSR space */
-@@ -XXX,XX +XXX,XX @@ static void virt_class_init(ObjectClass *oc, void *data)
+     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
-     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+                           machine, "iocsr", UINT64_MAX);
+@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
-     mc->init = virt_init;
+         lacpu = LOONGARCH_CPU(cpu);
--    mc->default_ram_size = 1 * GiB;
+         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
-     mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
+     }
-     mc->default_ram_id = "loongarch.ram";
+-    fdt_add_cpu_nodes(lvms);
-     mc->max_cpus = LOONGARCH_MAX_CPUS;
+-    fdt_add_memory_nodes(machine);
      fw_cfg_add_memory(machine);
      /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                          memmap_table,
                          sizeof(struct memmap_entry) * (memmap_entries));
      }
 -    fdt_add_fw_cfg_node(lvms);
 -    fdt_add_flash_node(lvms);
      /* Initialize the IO interrupt subsystem */
      virt_irq_init(lvms);
 -    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 -                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 -                                   VIRT_PLATFORM_BUS_SIZE,
 -                                   VIRT_PLATFORM_BUS_IRQ);
      lvms->machine_done.notify = virt_done;
      qemu_add_machine_init_done_notifier(&lvms->machine_done);
       /* connect powerdown request */
      lvms->powerdown_notifier.notify = virt_powerdown_req;
      qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 -    /*
 -     * Since lowmem region starts from 0 and Linux kernel legacy start address
 -     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 -     * access. FDT size limit with 1 MiB.
 -     * Put the FDT into the memory map as a ROM image: this will ensure
 -     * the FDT is copied again upon reset, even if addr points into RAM.
 -     */
 -    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 -                          &address_space_memory);
 -    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 -
      lvms->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lvms->bootinfo);
  }
 --
-.34.1
+.43.5

-[PULL 05/10] hw/loongarch: Refine fadt memory table for numa memory
+[PULL v2 4/6] hw/loongarch/virt: Improve fdt table creation for CPU object
-From: Bibo Mao <maobibo@loongson.cn>
+For CPU object, possible_cpu_arch_ids() function is used rather than
+smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
-One LoongArch virt machine platform, there is limitation for memory
+is not accurate for all possible CPU objects, possible_cpu_arch_ids()
-map information. The minimum memory size is 256M and minimum memory
+is used here.
 size for numa node0 is 256M also. With qemu numa qtest, it is possible
 that memory size of numa node0 is 128M.
 Limitations for minimum memory size for both total memory and numa
 node0 is removed for fadt numa memory table creation.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240515093927.3453674-3-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/virt.c | 46 ++++++++++++++++++++++++++++++++++++++++++---
+ hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
-file changed, 43 insertions(+), 3 deletions(-)
+file changed, 25 insertions(+), 14 deletions(-)
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
+@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-     g_free(nodename);
+ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
- }
+ {
+     int num;
-+static void fdt_add_memory_nodes(MachineState *ms)
+-    const MachineState *ms = MACHINE(lvms);
-+{
+-    int smp_cpus = ms->smp.cpus;
-+    hwaddr base, size, ram_size, gap;
++    MachineState *ms = MACHINE(lvms);
-+    int i, nb_numa_nodes, nodes;
++    MachineClass *mc = MACHINE_GET_CLASS(ms);
-+    NodeInfo *numa_info;
++    const CPUArchIdList *possible_cpus;
-+
++    LoongArchCPU *cpu;
-+    ram_size = ms->ram_size;
++    CPUState *cs;
-+    base = VIRT_LOWMEM_BASE;
++    char *nodename, *map_path;
-+    gap = VIRT_LOWMEM_SIZE;
-+    nodes = nb_numa_nodes = ms->numa_state->num_nodes;
+     qemu_fdt_add_subnode(ms->fdt, "/cpus");
-+    numa_info = ms->numa_state->nodes;
+     qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
-+    if (!nodes) {
+     qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
-+        nodes = 1;
-+    }
+     /* cpu nodes */
-+
+-    for (num = smp_cpus - 1; num >= 0; num--) {
-+    for (i = 0; i < nodes; i++) {
+-        char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
-+        if (nb_numa_nodes) {
+-        LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
-+            size = numa_info[i].node_mem;
+-        CPUState *cs = CPU(cpu);
-+        } else {
++    possible_cpus = mc->possible_cpu_arch_ids(ms);
-+            size = ram_size;
++    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 +
-+        /*
++        nodename = g_strdup_printf("/cpus/cpu@%d", num);
-+         * memory for the node splited into two part
++        cpu = LOONGARCH_CPU(cs);
-+         *   lowram:  [base, +gap)
-+         *   highram: [VIRT_HIGHMEM_BASE, +(len - gap))
+         qemu_fdt_add_subnode(ms->fdt, nodename);
-+         */
+         qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
-+        if (size >= gap) {
+         qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
-+            fdt_add_memory_node(ms, base, gap, i);
+                                 cpu->dtb_compatible);
-+            size -= gap;
+-        if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
-+            base = VIRT_HIGHMEM_BASE;
++        if (possible_cpus->cpus[num].props.has_node_id) {
-+            gap = ram_size - VIRT_LOWMEM_SIZE;
+             qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
 -                ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
 +                possible_cpus->cpus[num].props.node_id);
          }
          qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
          qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
      /*cpu map */
      qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
-+
-+        if (size) {
+-    for (num = smp_cpus - 1; num >= 0; num--) {
-+            fdt_add_memory_node(ms, base, size, i);
+-        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
-+            base += size;
+-        char *map_path;
-+            gap -= size;
+-
-+        }
++        nodename = g_strdup_printf("/cpus/cpu@%d", num);
-+    }
+         if (ms->smp.threads > 1) {
-+}
+             map_path = g_strdup_printf(
-+
+                 "/cpus/cpu-map/socket%d/core%d/thread%d",
- static void virt_build_smbios(LoongArchVirtMachineState *lvms)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
- {
+                 num % ms->smp.cores);
-     MachineState *ms = MACHINE(lvms);
+         }
-@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
+         qemu_fdt_add_path(ms->fdt, map_path);
-         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
+-        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
 +        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
          g_free(map_path);
 -        g_free(cpu_path);
 +        g_free(nodename);
      }
-     fdt_add_cpu_nodes(lvms);
+ }
-+    fdt_add_memory_nodes(machine);
      /* Node0 memory */
      memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1);
 -    fdt_add_memory_node(machine, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 0);
      memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
                               machine->ram, offset, VIRT_LOWMEM_SIZE);
      memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
      }
      phyAddr = VIRT_HIGHMEM_BASE;
      memmap_add_entry(phyAddr, highram_size, 1);
 -    fdt_add_memory_node(machine, phyAddr, highram_size, 0);
      memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
                                machine->ram, offset, highram_size);
      memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                                   offset,  numa_info[i].node_mem);
          memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
          memmap_add_entry(phyAddr, numa_info[i].node_mem, 1);
 -        fdt_add_memory_node(machine, phyAddr, numa_info[i].node_mem, i);
          offset += numa_info[i].node_mem;
          phyAddr += numa_info[i].node_mem;
      }
 --
-.34.1
+.43.5

-[PULL 09/10] target/loongarch: Add loongarch vector property unconditionally
+[PULL v2 5/6] target/loongarch: Use auto method with LSX feature
-From: Bibo Mao <maobibo@loongson.cn>
+Like LBT feature, add type OnOffAuto for LSX feature setting. Also
+add LSX feature detection with new VM ioctl command, fallback to old
-Currently LSX/LASX vector property is decided by the default value.
+method if it is not supported.
 Instead vector property should be added unconditionally, and it is
 irrelative with its default value. If vector is disabled by default,
 vector also can be enabled from command line.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240521080549.434197-2-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 14 ++++----------
+ target/loongarch/cpu.c     | 38 +++++++++++++++------------
-file changed, 4 insertions(+), 10 deletions(-)
+ target/loongarch/cpu.h     |  2 ++
  target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 files changed, 77 insertions(+), 17 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
+ {
- void loongarch_cpu_post_init(Object *obj)
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      CPULoongArchState *env = &cpu->env;
 +    uint32_t data = 0;
      int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-3A5000";
      env->cpucfg[0] = 0x14c010;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      CPULoongArchState *env = &cpu->env;
 -
 +    uint32_t data = 0;
      int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-1C103";
      env->cpucfg[0] = 0x148042;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
  static bool loongarch_get_lsx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+-    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
--        object_property_add_bool(obj, "lsx", loongarch_get_lsx,
+-        ret = true;
--                                 loongarch_set_lsx);
+-    } else {
 -        ret = false;
 -    }
--    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
+-    return ret;
--        object_property_add_bool(obj, "lasx", loongarch_get_lasx,
++    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
--                                 loongarch_set_lasx);
+ }
--    }
-+    object_property_add_bool(obj, "lsx", loongarch_get_lsx,
+ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-+                             loongarch_set_lsx);
+ {
-+    object_property_add_bool(obj, "lasx", loongarch_get_lasx,
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+                             loongarch_set_lasx);
++    uint32_t val;
- }
+-    if (value) {
- static void loongarch_cpu_init(Object *obj)
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LSX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
 +            error_setg(errp, "Failed to enable LSX in TCG mode");
 +            return;
 +        }
 +    }
 +
 +    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
  }
  static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    cpu->lsx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      } else {
          cpu->lbt = ON_OFF_AUTO_OFF;
 +        cpu->pmu = ON_OFF_AUTO_OFF;
      }
  }
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  #endif
  enum loongarch_features {
 +    LOONGARCH_FEATURE_LSX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
      LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      uint32_t  phy_id;
      OnOffAuto lbt;
      OnOffAuto pmu;
 +    OnOffAuto lsx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
  {
      int ret;
      struct kvm_device_attr attr;
 +    uint64_t val;
      switch (feature) {
 +    case LOONGARCH_FEATURE_LSX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
      return false;
  }
 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +        } else {
 +            error_setg(errp, "'lsx' feature not supported by KVM on this host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
      CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          brk_insn = val;
      }
 +    ret = kvm_cpu_check_lsx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.34.1
+.43.5

-[PULL 06/10] hw/loongarch: Refine fwcfg memory map
+[PULL v2 6/6] target/loongarch: Use auto method with LASX feature
-From: Bibo Mao <maobibo@loongson.cn>
+Like LSX feature, add type OnOffAuto for LASX feature setting.
 Memory map table for fwcfg is used for UEFI BIOS, UEFI BIOS uses the first
 entry from fwcfg memory map as the first memory HOB, the second memory HOB
 will be used if the first memory HOB is used up.
 Memory map table for fwcfg does not care about numa node, however in
 generic the first memory HOB is part of numa node0, so that runtime
 memory of UEFI which is allocated from the first memory HOB is located
 at numa node0.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240515093927.3453674-4-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/virt.c | 60 ++++++++++++++++++++++++++++++++++++++++++---
+ target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
-file changed, 57 insertions(+), 3 deletions(-)
+ target/loongarch/cpu.h     |  2 ++
  target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 files changed, 89 insertions(+), 16 deletions(-)
-diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
+diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/virt.c
+--- a/target/loongarch/cpu.c
-+++ b/hw/loongarch/virt.c
++++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps virt_iocsr_misc_ops = {
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-     },
+     uint32_t val;
- };
+     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
-+static void fw_cfg_add_memory(MachineState *ms)
++    if (cpu->lsx == ON_OFF_AUTO_OFF) {
-+{
++        cpu->lasx = ON_OFF_AUTO_OFF;
-+    hwaddr base, size, ram_size, gap;
++        if (cpu->lasx == ON_OFF_AUTO_ON) {
-+    int nb_numa_nodes, nodes;
++            error_setg(errp, "Failed to disable LSX since LASX is enabled");
-+    NodeInfo *numa_info;
++            return;
-+
++        }
 +    ram_size = ms->ram_size;
 +    base = VIRT_LOWMEM_BASE;
 +    gap = VIRT_LOWMEM_SIZE;
 +    nodes = nb_numa_nodes = ms->numa_state->num_nodes;
 +    numa_info = ms->numa_state->nodes;
 +    if (!nodes) {
 +        nodes = 1;
 +    }
 +
-+    /* add fw_cfg memory map of node0 */
+     if (kvm_enabled()) {
-+    if (nb_numa_nodes) {
+         /* kvm feature detection in function kvm_arch_init_vcpu */
-+        size = numa_info[0].node_mem;
+         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
              error_setg(errp, "Failed to enable LSX in TCG mode");
              return;
          }
 +    } else {
-+        size = ram_size;
++        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
-+    }
++        val = cpu->env.cpucfg[2];
-+
+     }
-+    if (size >= gap) {
-+        memmap_add_entry(base, gap, 1);
+     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
-+        size -= gap;
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-+        base = VIRT_HIGHMEM_BASE;
-+        gap = ram_size - VIRT_LOWMEM_SIZE;
+ static bool loongarch_get_lasx(Object *obj, Error **errp)
-+    }
+ {
-+
+-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+    if (size) {
+-    bool ret;
-+        memmap_add_entry(base, size, 1);
+-
-+        base += size;
+-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-+    }
+-        ret = true;
-+
+-    } else {
-+    if (nodes < 2) {
+-        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    }
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
 +        error_setg(errp, "Failed to enable LASX since lSX is disabled");
 +        return;
 +    }
 +
-+    /* add fw_cfg memory map of other nodes */
++    if (kvm_enabled()) {
-+    size = ram_size - numa_info[0].node_mem;
++        /* kvm feature detection in function kvm_arch_init_vcpu */
-+    gap  = VIRT_LOWMEM_BASE + VIRT_LOWMEM_SIZE;
++        return;
-+    if (base < gap && (base + size) > gap) {
+     }
-+        /*
++
-+         * memory map for the maining nodes splited into two part
++    /* LASX feature detection in TCG mode */
-+         *   lowram:  [base, +(gap - base))
++    val = cpu->env.cpucfg[2];
-+         *   highram: [VIRT_HIGHMEM_BASE, +(size - (gap - base)))
++    if (cpu->lasx == ON_OFF_AUTO_ON) {
-+         */
++        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
-+        memmap_add_entry(base, gap - base, 1);
++            error_setg(errp, "Failed to enable LASX in TCG mode");
-+        size -= gap - base;
++            return;
-+        base = VIRT_HIGHMEM_BASE;
++        }
 +    }
 +
-+   if (size)
++    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
-+        memmap_add_entry(base, size, 1);
+ }
  static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      cpu->lsx = ON_OFF_AUTO_AUTO;
 +    cpu->lasx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  enum loongarch_features {
      LOONGARCH_FEATURE_LSX,
 +    LOONGARCH_FEATURE_LASX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
      LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      OnOffAuto lbt;
      OnOffAuto pmu;
      OnOffAuto lsx;
 +    OnOffAuto lasx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
          }
          return false;
 +    case LOONGARCH_FEATURE_LASX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
      return 0;
  }
 +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        } else {
 +            error_setg(errp, "'lasx' feature not supported by KVM on host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +    }
 +
 +    return 0;
 +}
 +
- static void virt_init(MachineState *machine)
+ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
-     LoongArchCPU *lacpu;
+     CPULoongArchState *env = cpu_env(cs);
-@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
+@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          error_report_err(local_err);
      }
-     fdt_add_cpu_nodes(lvms);
-     fdt_add_memory_nodes(machine);
++    ret = kvm_cpu_check_lasx(cs, &local_err);
-+    fw_cfg_add_memory(machine);
++    if (ret < 0) {
++        error_report_err(local_err);
-     /* Node0 memory */
++    }
--    memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1);
++
-     memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
+     ret = kvm_cpu_check_lbt(cs, &local_err);
-                              machine->ram, offset, VIRT_LOWMEM_SIZE);
+     if (ret < 0) {
-     memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
+         error_report_err(local_err);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          highram_size = ram_size - VIRT_LOWMEM_SIZE;
      }
      phyAddr = VIRT_HIGHMEM_BASE;
 -    memmap_add_entry(phyAddr, highram_size, 1);
      memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
                                machine->ram, offset, highram_size);
      memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          memory_region_init_alias(nodemem, NULL, ramName, machine->ram,
                                   offset,  numa_info[i].node_mem);
          memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
 -        memmap_add_entry(phyAddr, numa_info[i].node_mem, 1);
          offset += numa_info[i].node_mem;
          phyAddr += numa_info[i].node_mem;
      }
 --
-.34.1
+.43.5

-[PULL 07/10] hw/loongarch: Refine system dram memory region
+Deleted patch
-From: Bibo Mao <maobibo@loongson.cn>
-For system dram memory region, it is not necessary to use numa node
-information. There is only low memory region and high memory region.
-Remove numa node information for ddr memory region here, it can reduce
-memory region number on LoongArch virt machine.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240515093927.3453674-5-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- hw/loongarch/virt.c | 53 +++++++++++++++------------------------------
-file changed, 17 insertions(+), 36 deletions(-)
-diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/virt.c
-+++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
- {
-     LoongArchCPU *lacpu;
-     const char *cpu_model = machine->cpu_type;
--    ram_addr_t offset = 0;
--    ram_addr_t ram_size = machine->ram_size;
--    uint64_t highram_size = 0, phyAddr = 0;
-     MemoryRegion *address_space_mem = get_system_memory();
-     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
--    int nb_numa_nodes = machine->numa_state->num_nodes;
--    NodeInfo *numa_info = machine->numa_state->nodes;
-     int i;
-+    hwaddr base, size, ram_size = machine->ram_size;
-     const CPUArchIdList *possible_cpus;
-     MachineClass *mc = MACHINE_GET_CLASS(machine);
-     CPUState *cpu;
-@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
-     fw_cfg_add_memory(machine);
-     /* Node0 memory */
--    memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
--                             machine->ram, offset, VIRT_LOWMEM_SIZE);
--    memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
--
--    offset += VIRT_LOWMEM_SIZE;
--    if (nb_numa_nodes > 0) {
--        assert(numa_info[0].node_mem > VIRT_LOWMEM_SIZE);
--        highram_size = numa_info[0].node_mem - VIRT_LOWMEM_SIZE;
--    } else {
--        highram_size = ram_size - VIRT_LOWMEM_SIZE;
-+    size = ram_size;
-+    base = VIRT_LOWMEM_BASE;
-+    if (size > VIRT_LOWMEM_SIZE) {
-+        size = VIRT_LOWMEM_SIZE;
-     }
--    phyAddr = VIRT_HIGHMEM_BASE;
--    memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
--                              machine->ram, offset, highram_size);
--    memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
--
--    /* Node1 - Nodemax memory */
--    offset += highram_size;
--    phyAddr += highram_size;
--
--    for (i = 1; i < nb_numa_nodes; i++) {
--        MemoryRegion *nodemem = g_new(MemoryRegion, 1);
--        g_autofree char *ramName = g_strdup_printf("loongarch.node%d.ram", i);
--        memory_region_init_alias(nodemem, NULL, ramName, machine->ram,
--                                 offset,  numa_info[i].node_mem);
--        memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
--        offset += numa_info[i].node_mem;
--        phyAddr += numa_info[i].node_mem;
-+
-+    memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram",
-+                              machine->ram, base, size);
-+    memory_region_add_subregion(address_space_mem, base, &lvms->lowmem);
-+    base += size;
-+    if (ram_size - size) {
-+        base = VIRT_HIGHMEM_BASE;
-+        memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram",
-+                machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size);
-+        memory_region_add_subregion(address_space_mem, base, &lvms->highmem);
-+        base += ram_size - size;
-     }
-     /* initialize device memory address space */
-     if (machine->ram_size < machine->maxram_size) {
-         ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
--        hwaddr device_mem_base;
-         if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
-             error_report("unsupported amount of memory slots: %"PRIu64,
-@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
-                          "%d bytes", TARGET_PAGE_SIZE);
-             exit(EXIT_FAILURE);
-         }
--        /* device memory base is the top of high memory address. */
--        device_mem_base = ROUND_UP(VIRT_HIGHMEM_BASE + highram_size, 1 * GiB);
--        machine_memory_devices_init(machine, device_mem_base, device_mem_size);
-+        machine_memory_devices_init(machine, base, device_mem_size);
-     }
-     /* load the BIOS image. */
---
-.34.1

The following changes since commit 6af8037c42fdc3d20d5aa2686799ab356a9ee1a9:

Merge tag 'pull-vfio-20240522' of https://github.com/legoater/qemu into staging (2024-05-22 06:02:06 -0700)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240523

for you to fetch changes up to 6204af704a071ea68d3af55c0502b112a7af9546:

hw/loongarch/virt: Fix FDT memory node address width (2024-05-23 09:30:41 +0800)

----------------------------------------------------------------
pull-loongarch-20240523

----------------------------------------------------------------
Bibo Mao (7):
      hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
      hw/loongarch: Refine acpi srat table for numa memory
      hw/loongarch: Refine fadt memory table for numa memory
      hw/loongarch: Refine fwcfg memory map
      hw/loongarch: Refine system dram memory region
      hw/loongarch: Remove minimum and default memory size
      target/loongarch: Add loongarch vector property unconditionally

Jiaxun Yang (1):
      hw/loongarch/virt: Fix FDT memory node address width

Song Gao (2):
      target/loongarch/kvm: Fix VM recovery from disk failures
      target/loongarch/kvm: fpu save the vreg registers high 192bit

hw/loongarch/acpi-build.c  |  58 +++++++++------
 hw/loongarch/virt.c        | 179 ++++++++++++++++++++++++++++++++-------------
 target/loongarch/cpu.c     |  14 +---
 target/loongarch/kvm/kvm.c |   6 ++
 target/loongarch/machine.c |   6 +-
 5 files changed, 176 insertions(+), 87 deletions(-)

vmstate does not save kvm_state_conter,
which can cause VM recovery from disk to fail.

Cc: qemu-stable@nongnu.org
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Peter Xu <peterx@redhat.com>
Message-Id: <20240508024732.3127792-1-gaosong@loongson.cn>
---
 target/loongarch/machine.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/machine.c
+++ b/target/loongarch/machine.c
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = {
 /* LoongArch CPU state */
 const VMStateDescription vmstate_loongarch_cpu = {
     .name = "cpu",
-    .version_id = 1,
-    .minimum_version_id = 1,
+    .version_id = 2,
+    .minimum_version_id = 2,
     .fields = (const VMStateField[]) {
         VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
         VMSTATE_UINTTL(env.pc, LoongArchCPU),
@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
         VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU),
         VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
 
+        VMSTATE_UINT64(kvm_state_counter, LoongArchCPU),
+
         VMSTATE_END_OF_LIST()
     },
     .subsections = (const VMStateDescription * const []) {
-- 
2.34.1

On kvm side, get_fpu/set_fpu save the vreg registers high 192bits,
but QEMU missing.

Cc: qemu-stable@nongnu.org
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240514110752.989572-1-gaosong@loongson.cn>
---
 target/loongarch/kvm/kvm.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_get_regs_fp(CPUState *cs)
     env->fcsr0 = fpu.fcsr;
     for (i = 0; i < 32; i++) {
         env->fpr[i].vreg.UD[0] = fpu.fpr[i].val64[0];
+        env->fpr[i].vreg.UD[1] = fpu.fpr[i].val64[1];
+        env->fpr[i].vreg.UD[2] = fpu.fpr[i].val64[2];
+        env->fpr[i].vreg.UD[3] = fpu.fpr[i].val64[3];
     }
     for (i = 0; i < 8; i++) {
         env->cf[i] = fpu.fcc & 0xFF;
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
     fpu.fcc = 0;
     for (i = 0; i < 32; i++) {
         fpu.fpr[i].val64[0] = env->fpr[i].vreg.UD[0];
+        fpu.fpr[i].val64[1] = env->fpr[i].vreg.UD[1];
+        fpu.fpr[i].val64[2] = env->fpr[i].vreg.UD[2];
+        fpu.fpr[i].val64[3] = env->fpr[i].vreg.UD[3];
     }
 
     for (i = 0; i < 8; i++) {
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

If VM runs in kvm mode, VM mode is added in IOCSR feature register.
So guest can detect kvm hypervisor type and enable possible pv functions.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240514025109.3238398-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "hw/boards.h"
 #include "hw/char/serial.h"
+#include "sysemu/kvm.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/qtest.h"
 #include "sysemu/runstate.h"
@@ -XXX,XX +XXX,XX @@ static void virt_iocsr_misc_write(void *opaque, hwaddr addr,
 
 static uint64_t virt_iocsr_misc_read(void *opaque, hwaddr addr, unsigned size)
 {
+    uint64_t ret;
+
     switch (addr) {
     case VERSION_REG:
         return 0x11ULL;
     case FEATURE_REG:
-        return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
-               1ULL << IOCSRF_CSRIPI;
+        ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI);
+        if (kvm_enabled()) {
+            ret |= BIT(IOCSRF_VM);
+        }
+        return ret;
     case VENDOR_REG:
         return 0x6e6f73676e6f6f4cULL; /* "Loongson" */
     case CPUNAME_REG:
         return 0x303030354133ULL;     /* "3A5000" */
     case MISC_FUNC_REG:
-        return 1ULL << IOCSRM_EXTIOI_EN;
+        return BIT_ULL(IOCSRM_EXTIOI_EN);
     }
     return 0ULL;
 }
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

One LoongArch virt machine platform, there is limitation for memory
map information. The minimum memory size is 256M and minimum memory
size for numa node0 is 256M also. With qemu numa qtest, it is possible
that memory size of numa node0 is 128M.

Limitations for minimum memory size for both total memory and numa
node0 is removed for acpi srat table creation.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/acpi-build.c | 58 +++++++++++++++++++++++----------------
 1 file changed, 34 insertions(+), 24 deletions(-)

diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@ static void
 build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
 {
     int i, arch_id, node_id;
-    uint64_t mem_len, mem_base;
-    int nb_numa_nodes = machine->numa_state->num_nodes;
+    hwaddr len, base, gap;
+    NodeInfo *numa_info;
+    int nodes, nb_numa_nodes = machine->numa_state->num_nodes;
     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
@@ -XXX,XX +XXX,XX @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
         build_append_int_noprefix(table_data, 0, 4); /* Reserved */
     }
 
-    /* Node0 */
-    build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE,
-                      0, MEM_AFFINITY_ENABLED);
-    mem_base = VIRT_HIGHMEM_BASE;
-    if (!nb_numa_nodes) {
-        mem_len = machine->ram_size - VIRT_LOWMEM_SIZE;
-    } else {
-        mem_len = machine->numa_state->nodes[0].node_mem - VIRT_LOWMEM_SIZE;
+    base = VIRT_LOWMEM_BASE;
+    gap = VIRT_LOWMEM_SIZE;
+    numa_info = machine->numa_state->nodes;
+    nodes = nb_numa_nodes;
+    if (!nodes) {
+        nodes = 1;
     }
-    if (mem_len)
-        build_srat_memory(table_data, mem_base, mem_len, 0, MEM_AFFINITY_ENABLED);
-
-    /* Node1 - Nodemax */
-    if (nb_numa_nodes) {
-        mem_base += mem_len;
-        for (i = 1; i < nb_numa_nodes; ++i) {
-            if (machine->numa_state->nodes[i].node_mem > 0) {
-                build_srat_memory(table_data, mem_base,
-                                  machine->numa_state->nodes[i].node_mem, i,
-                                  MEM_AFFINITY_ENABLED);
-                mem_base += machine->numa_state->nodes[i].node_mem;
-            }
+
+    for (i = 0; i < nodes; i++) {
+        if (nb_numa_nodes) {
+            len = numa_info[i].node_mem;
+        } else {
+            len = machine->ram_size;
+        }
+
+        /*
+         * memory for the node splited into two part
+         *   lowram:  [base, +gap)
+         *   highram: [VIRT_HIGHMEM_BASE, +(len - gap))
+         */
+        if (len >= gap) {
+            build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
+            len -= gap;
+            base = VIRT_HIGHMEM_BASE;
+            gap = machine->ram_size - VIRT_LOWMEM_SIZE;
+        }
+
+        if (len) {
+            build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
+            base += len;
+            gap  -= len;
         }
     }
 
     if (machine->device_memory) {
         build_srat_memory(table_data, machine->device_memory->base,
                           memory_region_size(&machine->device_memory->mr),
-                          nb_numa_nodes - 1,
+                          nodes - 1,
                           MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
     }
 
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Limitations for minimum memory size for both total memory and numa
node0 is removed for fadt numa memory table creation.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 46 ++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 43 insertions(+), 3 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
     g_free(nodename);
 }
 
+static void fdt_add_memory_nodes(MachineState *ms)
+{
+    hwaddr base, size, ram_size, gap;
+    int i, nb_numa_nodes, nodes;
+    NodeInfo *numa_info;
+
+    ram_size = ms->ram_size;
+    base = VIRT_LOWMEM_BASE;
+    gap = VIRT_LOWMEM_SIZE;
+    nodes = nb_numa_nodes = ms->numa_state->num_nodes;
+    numa_info = ms->numa_state->nodes;
+    if (!nodes) {
+        nodes = 1;
+    }
+
+    for (i = 0; i < nodes; i++) {
+        if (nb_numa_nodes) {
+            size = numa_info[i].node_mem;
+        } else {
+            size = ram_size;
+        }
+
+        /*
+         * memory for the node splited into two part
+         *   lowram:  [base, +gap)
+         *   highram: [VIRT_HIGHMEM_BASE, +(len - gap))
+         */
+        if (size >= gap) {
+            fdt_add_memory_node(ms, base, gap, i);
+            size -= gap;
+            base = VIRT_HIGHMEM_BASE;
+            gap = ram_size - VIRT_LOWMEM_SIZE;
+        }
+
+        if (size) {
+            fdt_add_memory_node(ms, base, size, i);
+            base += size;
+            gap -= size;
+        }
+    }
+}
+
 static void virt_build_smbios(LoongArchVirtMachineState *lvms)
 {
     MachineState *ms = MACHINE(lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
     fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
 
     /* Node0 memory */
     memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1);
-    fdt_add_memory_node(machine, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 0);
     memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
                              machine->ram, offset, VIRT_LOWMEM_SIZE);
     memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
     }
     phyAddr = VIRT_HIGHMEM_BASE;
     memmap_add_entry(phyAddr, highram_size, 1);
-    fdt_add_memory_node(machine, phyAddr, highram_size, 0);
     memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
                               machine->ram, offset, highram_size);
     memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                                  offset,  numa_info[i].node_mem);
         memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
         memmap_add_entry(phyAddr, numa_info[i].node_mem, 1);
-        fdt_add_memory_node(machine, phyAddr, numa_info[i].node_mem, i);
         offset += numa_info[i].node_mem;
         phyAddr += numa_info[i].node_mem;
     }
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Memory map table for fwcfg is used for UEFI BIOS, UEFI BIOS uses the first
entry from fwcfg memory map as the first memory HOB, the second memory HOB
will be used if the first memory HOB is used up.

Memory map table for fwcfg does not care about numa node, however in
generic the first memory HOB is part of numa node0, so that runtime
memory of UEFI which is allocated from the first memory HOB is located
at numa node0.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-4-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 60 ++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 57 insertions(+), 3 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps virt_iocsr_misc_ops = {
     },
 };
 
+static void fw_cfg_add_memory(MachineState *ms)
+{
+    hwaddr base, size, ram_size, gap;
+    int nb_numa_nodes, nodes;
+    NodeInfo *numa_info;
+
+    ram_size = ms->ram_size;
+    base = VIRT_LOWMEM_BASE;
+    gap = VIRT_LOWMEM_SIZE;
+    nodes = nb_numa_nodes = ms->numa_state->num_nodes;
+    numa_info = ms->numa_state->nodes;
+    if (!nodes) {
+        nodes = 1;
+    }
+
+    /* add fw_cfg memory map of node0 */
+    if (nb_numa_nodes) {
+        size = numa_info[0].node_mem;
+    } else {
+        size = ram_size;
+    }
+
+    if (size >= gap) {
+        memmap_add_entry(base, gap, 1);
+        size -= gap;
+        base = VIRT_HIGHMEM_BASE;
+        gap = ram_size - VIRT_LOWMEM_SIZE;
+    }
+
+    if (size) {
+        memmap_add_entry(base, size, 1);
+        base += size;
+    }
+
+    if (nodes < 2) {
+        return;
+    }
+
+    /* add fw_cfg memory map of other nodes */
+    size = ram_size - numa_info[0].node_mem;
+    gap  = VIRT_LOWMEM_BASE + VIRT_LOWMEM_SIZE;
+    if (base < gap && (base + size) > gap) {
+        /*
+         * memory map for the maining nodes splited into two part
+         *   lowram:  [base, +(gap - base))
+         *   highram: [VIRT_HIGHMEM_BASE, +(size - (gap - base)))
+         */
+        memmap_add_entry(base, gap - base, 1);
+        size -= gap - base;
+        base = VIRT_HIGHMEM_BASE;
+    }
+
+   if (size)
+        memmap_add_entry(base, size, 1);
+}
+
 static void virt_init(MachineState *machine)
 {
     LoongArchCPU *lacpu;
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
     }
     fdt_add_cpu_nodes(lvms);
     fdt_add_memory_nodes(machine);
+    fw_cfg_add_memory(machine);
 
     /* Node0 memory */
-    memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1);
     memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
                              machine->ram, offset, VIRT_LOWMEM_SIZE);
     memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         highram_size = ram_size - VIRT_LOWMEM_SIZE;
     }
     phyAddr = VIRT_HIGHMEM_BASE;
-    memmap_add_entry(phyAddr, highram_size, 1);
     memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
                               machine->ram, offset, highram_size);
     memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         memory_region_init_alias(nodemem, NULL, ramName, machine->ram,
                                  offset,  numa_info[i].node_mem);
         memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
-        memmap_add_entry(phyAddr, numa_info[i].node_mem, 1);
         offset += numa_info[i].node_mem;
         phyAddr += numa_info[i].node_mem;
     }
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

For system dram memory region, it is not necessary to use numa node
information. There is only low memory region and high memory region.

Remove numa node information for ddr memory region here, it can reduce
memory region number on LoongArch virt machine.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-5-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 53 +++++++++++++++------------------------------
 1 file changed, 17 insertions(+), 36 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
 {
     LoongArchCPU *lacpu;
     const char *cpu_model = machine->cpu_type;
-    ram_addr_t offset = 0;
-    ram_addr_t ram_size = machine->ram_size;
-    uint64_t highram_size = 0, phyAddr = 0;
     MemoryRegion *address_space_mem = get_system_memory();
     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
-    int nb_numa_nodes = machine->numa_state->num_nodes;
-    NodeInfo *numa_info = machine->numa_state->nodes;
     int i;
+    hwaddr base, size, ram_size = machine->ram_size;
     const CPUArchIdList *possible_cpus;
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     CPUState *cpu;
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
-    memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
-                             machine->ram, offset, VIRT_LOWMEM_SIZE);
-    memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
-
-    offset += VIRT_LOWMEM_SIZE;
-    if (nb_numa_nodes > 0) {
-        assert(numa_info[0].node_mem > VIRT_LOWMEM_SIZE);
-        highram_size = numa_info[0].node_mem - VIRT_LOWMEM_SIZE;
-    } else {
-        highram_size = ram_size - VIRT_LOWMEM_SIZE;
+    size = ram_size;
+    base = VIRT_LOWMEM_BASE;
+    if (size > VIRT_LOWMEM_SIZE) {
+        size = VIRT_LOWMEM_SIZE;
     }
-    phyAddr = VIRT_HIGHMEM_BASE;
-    memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
-                              machine->ram, offset, highram_size);
-    memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
-
-    /* Node1 - Nodemax memory */
-    offset += highram_size;
-    phyAddr += highram_size;
-
-    for (i = 1; i < nb_numa_nodes; i++) {
-        MemoryRegion *nodemem = g_new(MemoryRegion, 1);
-        g_autofree char *ramName = g_strdup_printf("loongarch.node%d.ram", i);
-        memory_region_init_alias(nodemem, NULL, ramName, machine->ram,
-                                 offset,  numa_info[i].node_mem);
-        memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
-        offset += numa_info[i].node_mem;
-        phyAddr += numa_info[i].node_mem;
+
+    memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram",
+                              machine->ram, base, size);
+    memory_region_add_subregion(address_space_mem, base, &lvms->lowmem);
+    base += size;
+    if (ram_size - size) {
+        base = VIRT_HIGHMEM_BASE;
+        memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram",
+                machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size);
+        memory_region_add_subregion(address_space_mem, base, &lvms->highmem);
+        base += ram_size - size;
     }
 
     /* initialize device memory address space */
     if (machine->ram_size < machine->maxram_size) {
         ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
-        hwaddr device_mem_base;
 
         if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
             error_report("unsupported amount of memory slots: %"PRIu64,
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                          "%d bytes", TARGET_PAGE_SIZE);
             exit(EXIT_FAILURE);
         }
-        /* device memory base is the top of high memory address. */
-        device_mem_base = ROUND_UP(VIRT_HIGHMEM_BASE + highram_size, 1 * GiB);
-        machine_memory_devices_init(machine, device_mem_base, device_mem_size);
+        machine_memory_devices_init(machine, base, device_mem_size);
     }
 
     /* load the BIOS image. */
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Some qtest test cases such as numa use default memory size of generic
machine class, which is 128M by fault.

Here generic default memory size is used, and also remove minimum memory
size which is 1G originally.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240515093927.3453674-6-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    if (ram_size < 1 * GiB) {
-        error_report("ram_size must be greater than 1G.");
-        exit(1);
-    }
     create_fdt(lvms);
 
     /* Create IOCSR space */
@@ -XXX,XX +XXX,XX @@ static void virt_class_init(ObjectClass *oc, void *data)
     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
     mc->init = virt_init;
-    mc->default_ram_size = 1 * GiB;
     mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
     mc->default_ram_id = "loongarch.ram";
     mc->max_cpus = LOONGARCH_MAX_CPUS;
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Currently LSX/LASX vector property is decided by the default value.
Instead vector property should be added unconditionally, and it is
irrelative with its default value. If vector is disabled by default,
vector also can be enabled from command line.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240521080549.434197-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 
 void loongarch_cpu_post_init(Object *obj)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        object_property_add_bool(obj, "lsx", loongarch_get_lsx,
-                                 loongarch_set_lsx);
-    }
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        object_property_add_bool(obj, "lasx", loongarch_get_lasx,
-                                 loongarch_set_lasx);
-    }
+    object_property_add_bool(obj, "lsx", loongarch_get_lsx,
+                             loongarch_set_lsx);
+    object_property_add_bool(obj, "lasx", loongarch_get_lasx,
+                             loongarch_set_lasx);
 }
 
 static void loongarch_cpu_init(Object *obj)
-- 
2.34.1

From: Jiaxun Yang <jiaxun.yang@flygoat.com>

Higher bits for memory nodes were omitted at qemu_fdt_setprop_cells.

Cc: qemu-stable@nongnu.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240520-loongarch-fdt-memnode-v1-1-5ea9be93911e@flygoat.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
     char *nodename = g_strdup_printf("/memory@%" PRIx64, base);
 
     qemu_fdt_add_subnode(ms->fdt, nodename);
-    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size);
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", base >> 32, base,
+                           size >> 32, size);
     qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory");
 
     if (ms->numa_state && ms->numa_state->num_nodes) {
-- 
2.34.1

The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:

Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227

for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:

target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)

----------------------------------------------------------------
pull-loongarch-20241227
v1 ... v2
  1. Modify patch auther inconsistent with SOB

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

Guo Hongyu (1):
      target/loongarch: Fix vldi inst

hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>

Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in vldi instruction implementation.

Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
Tested-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
         break;
     case 1:
         /* data: {2{16'0, imm[7:0], 8'0}} */
-        data = (t << 24) | (t << 8);
+        data = (t << 40) | (t << 8);
         break;
     case 2:
         /* data: {2{8'0, imm[7:0], 16'0}} */
-- 
2.43.5

Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.

Here actual operand size is used.

Cc: qemu-stable@nongnu.org
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
 {
     int i, ofs;
 
-    if (!check_vec(ctx, 32)) {
+    if (!check_vec(ctx, oprsz)) {
         return true;
     }
 
-- 
2.43.5

The same with ACPI table, fdt table is created on machine done
notification. Some objects like CPU objects can be created with cold-plug
method with command such as -smp x, -device la464-loongarch-cpu, so all
objects finish to create when machine is done.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 46 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
     }
 }
 
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
+{
+    MachineState *machine = MACHINE(lvms);
+    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+    int i;
+
+    create_fdt(lvms);
+    fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
+    fdt_add_fw_cfg_node(lvms);
+    fdt_add_flash_node(lvms);
+
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+    /* Add PCH PIC node */
+    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+    /* Add PCH MSI node */
+    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+    /* Add pcie node */
+    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
+
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i-- > 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
+    }
+
+    fdt_add_rtc_node(lvms, &pch_pic_phandle);
+    fdt_add_ged_reset(lvms);
+    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+                                   VIRT_PLATFORM_BUS_BASEADDRESS,
+                                   VIRT_PLATFORM_BUS_SIZE,
+                                   VIRT_PLATFORM_BUS_IRQ);
+
+    /*
+     * Since lowmem region starts from 0 and Linux kernel legacy start address
+     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+     * access. FDT size limit with 1 MiB.
+     * Put the FDT into the memory map as a ROM image: this will ensure
+     * the FDT is copied again upon reset, even if addr points into RAM.
+     */
+    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
+}
+
 static void virt_done(Notifier *notifier, void *data)
 {
     LoongArchVirtMachineState *lvms = container_of(notifier,
                                       LoongArchVirtMachineState, machine_done);
     virt_build_smbios(lvms);
     loongarch_acpi_setup(lvms);
+    virt_fdt_setup(lvms);
 }
 
 static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 }
 
 static void virt_devices_init(DeviceState *pch_pic,
-                                   LoongArchVirtMachineState *lvms,
-                                   uint32_t *pch_pic_phandle,
-                                   uint32_t *pch_msi_phandle)
+                                   LoongArchVirtMachineState *lvms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
-    /* Add pcie node */
-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-
     /*
      * Create uart fdt node in reverse order so that they appear
      * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         serial_mm_init(get_system_memory(), base, 0,
                        qdev_get_gpio_in(pch_pic, irq),
                        115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
     }
 
     /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-    fdt_add_ged_reset(lvms);
 
     /* acpi ged */
     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 
     /*
      * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
-    /* Add cpu interrupt-controller */
-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         }
     }
 
-    /* Add Extend I/O Interrupt Controller node */
-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-
     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
     }
 
-    /* Add PCH PIC node */
-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-
     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
     start   =  num;
     num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                               qdev_get_gpio_in(extioi, i + start));
     }
 
-    /* Add PCH MSI node */
-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-
-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
+    virt_devices_init(pch_pic, lvms);
 }
 
 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    create_fdt(lvms);
-
     /* Create IOCSR space */
     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                           machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu = LOONGARCH_CPU(cpu);
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
-    fdt_add_cpu_nodes(lvms);
-    fdt_add_memory_nodes(machine);
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                         memmap_table,
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
-    fdt_add_fw_cfg_node(lvms);
-    fdt_add_flash_node(lvms);
 
     /* Initialize the IO interrupt subsystem */
     virt_irq_init(lvms);
-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-                                   VIRT_PLATFORM_BUS_SIZE,
-                                   VIRT_PLATFORM_BUS_IRQ);
     lvms->machine_done.notify = virt_done;
     qemu_add_machine_init_done_notifier(&lvms->machine_done);
      /* connect powerdown request */
     lvms->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 
-    /*
-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-     * access. FDT size limit with 1 MiB.
-     * Put the FDT into the memory map as a ROM image: this will ensure
-     * the FDT is copied again upon reset, even if addr points into RAM.
-     */
-    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
-                          &address_space_memory);
-    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
-
     lvms->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lvms->bootinfo);
 }
-- 
2.43.5

For CPU object, possible_cpu_arch_ids() function is used rather than
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
is used here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 14 deletions(-)

Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 38 +++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 17 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
     env->cpucfg[0] = 0x14c010;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
-
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-1C103";
     env->cpucfg[0] = 0x148042;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
 
 static bool loongarch_get_lsx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LSX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
+            error_setg(errp, "Failed to enable LSX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
 }
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
+    cpu->lsx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
+        cpu->pmu = ON_OFF_AUTO_OFF;
     }
 }
 
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
 enum loongarch_features {
+    LOONGARCH_FEATURE_LSX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto lsx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 {
     int ret;
     struct kvm_device_attr attr;
+    uint64_t val;
 
     switch (feature) {
+    case LOONGARCH_FEATURE_LSX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
     return false;
 }
 
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+        } else {
+            error_setg(errp, "'lsx' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         brk_insn = val;
     }
 
+    ret = kvm_cpu_check_lsx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5

Like LSX feature, add type OnOffAuto for LASX feature setting.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 16 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
     uint32_t val;
 
     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (cpu->lsx == ON_OFF_AUTO_OFF) {
+        cpu->lasx = ON_OFF_AUTO_OFF;
+        if (cpu->lasx == ON_OFF_AUTO_ON) {
+            error_setg(errp, "Failed to disable LSX since LASX is enabled");
+            return;
+        }
+    }
+
     if (kvm_enabled()) {
         /* kvm feature detection in function kvm_arch_init_vcpu */
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
             error_setg(errp, "Failed to enable LSX in TCG mode");
             return;
         }
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
+        val = cpu->env.cpucfg[2];
     }
 
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-	}
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
+        error_setg(errp, "Failed to enable LASX since lSX is disabled");
+        return;
+    }
+
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LASX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
+            error_setg(errp, "Failed to enable LASX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
 static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lsx = ON_OFF_AUTO_AUTO;
+    cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LSX,
+    LOONGARCH_FEATURE_LASX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     OnOffAuto lbt;
     OnOffAuto pmu;
     OnOffAuto lsx;
+    OnOffAuto lasx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         }
         return false;
 
+    case LOONGARCH_FEATURE_LASX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+        } else {
+            error_setg(errp, "'lasx' feature not supported by KVM on host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         error_report_err(local_err);
     }
 
+    ret = kvm_cpu_check_lasx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5