| 1 | The following changes since commit 6af8037c42fdc3d20d5aa2686799ab356a9ee1a9: | 1 | The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307: |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Merge tag 'pull-vfio-20240522' of https://github.com/legoater/qemu into staging (2024-05-22 06:02:06 -0700) | 3 | Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000) |
| 4 | 4 | ||
| 5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
| 6 | 6 | ||
| 7 | https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240523 | 7 | https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213 |
| 8 | 8 | ||
| 9 | for you to fetch changes up to 6204af704a071ea68d3af55c0502b112a7af9546: | 9 | for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b: |
| 10 | 10 | ||
| 11 | hw/loongarch/virt: Fix FDT memory node address width (2024-05-23 09:30:41 +0800) | 11 | hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800) |
| 12 | 12 | ||
| 13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
| 14 | pull-loongarch-20240523 | 14 | pull-loongarch-20241213 |
| 15 | 15 | ||
| 16 | ---------------------------------------------------------------- | 16 | ---------------------------------------------------------------- |
| 17 | Bibo Mao (7): | 17 | Bibo Mao (8): |
| 18 | hw/loongarch: Add VM mode in IOCSR feature register in kvm mode | 18 | include: Add loongarch_pic_common header file |
| 19 | hw/loongarch: Refine acpi srat table for numa memory | 19 | include: Move struct LoongArchPCHPIC to loongarch_pic_common header file |
| 20 | hw/loongarch: Refine fadt memory table for numa memory | 20 | hw/intc/loongarch_pch: Merge instance_init() into realize() |
| 21 | hw/loongarch: Refine fwcfg memory map | 21 | hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState |
| 22 | hw/loongarch: Refine system dram memory region | 22 | hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common |
| 23 | hw/loongarch: Remove minimum and default memory size | 23 | hw/intc/loongarch_pch: Inherit from loongarch_pic_common |
| 24 | target/loongarch: Add loongarch vector property unconditionally | 24 | hw/intc/loongarch_pch: Add pre_save and post_load interfaces |
| 25 | hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic | ||
| 25 | 26 | ||
| 26 | Jiaxun Yang (1): | 27 | hw/intc/loongarch_pch_pic.c | 106 +++++++++++---------------------- |
| 27 | hw/loongarch/virt: Fix FDT memory node address width | 28 | hw/intc/loongarch_pic_common.c | 97 ++++++++++++++++++++++++++++++ |
| 28 | 29 | hw/intc/meson.build | 2 +- | |
| 29 | Song Gao (2): | 30 | hw/loongarch/virt.c | 2 +- |
| 30 | target/loongarch/kvm: Fix VM recovery from disk failures | 31 | include/hw/intc/loongarch_pch_pic.h | 70 +++++----------------- |
| 31 | target/loongarch/kvm: fpu save the vreg registers high 192bit | 32 | include/hw/intc/loongarch_pic_common.h | 82 +++++++++++++++++++++++++ |
| 32 | 33 | 6 files changed, 230 insertions(+), 129 deletions(-) | |
| 33 | hw/loongarch/acpi-build.c | 58 +++++++++------ | 34 | create mode 100644 hw/intc/loongarch_pic_common.c |
| 34 | hw/loongarch/virt.c | 179 ++++++++++++++++++++++++++++++++------------- | 35 | create mode 100644 include/hw/intc/loongarch_pic_common.h |
| 35 | target/loongarch/cpu.c | 14 +--- | ||
| 36 | target/loongarch/kvm/kvm.c | 6 ++ | ||
| 37 | target/loongarch/machine.c | 6 +- | ||
| 38 | 5 files changed, 176 insertions(+), 87 deletions(-) | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | Add common header file hw/intc/loongarch_pic_common.h, and move | ||
| 2 | some macro definition from hw/intc/loongarch_pch_pic.h to the common | ||
| 3 | header file. | ||
| 1 | 4 | ||
| 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
| 7 | --- | ||
| 8 | include/hw/intc/loongarch_pch_pic.h | 36 +++------------------- | ||
| 9 | include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++ | ||
| 10 | 2 files changed, 47 insertions(+), 31 deletions(-) | ||
| 11 | create mode 100644 include/hw/intc/loongarch_pic_common.h | ||
| 12 | |||
| 13 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
| 14 | index XXXXXXX..XXXXXXX 100644 | ||
| 15 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
| 16 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
| 17 | @@ -XXX,XX +XXX,XX @@ | ||
| 18 | * Copyright (c) 2021 Loongson Technology Corporation Limited | ||
| 19 | */ | ||
| 20 | |||
| 21 | -#include "hw/sysbus.h" | ||
| 22 | +#ifndef HW_LOONGARCH_PCH_PIC_H | ||
| 23 | +#define HW_LOONGARCH_PCH_PIC_H | ||
| 24 | + | ||
| 25 | +#include "hw/intc/loongarch_pic_common.h" | ||
| 26 | |||
| 27 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
| 28 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
| 29 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
| 30 | |||
| 31 | -#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
| 32 | -#define PCH_PIC_INT_ID_VER 0x1UL | ||
| 33 | - | ||
| 34 | -#define PCH_PIC_INT_ID_LO 0x00 | ||
| 35 | -#define PCH_PIC_INT_ID_HI 0x04 | ||
| 36 | -#define PCH_PIC_INT_MASK_LO 0x20 | ||
| 37 | -#define PCH_PIC_INT_MASK_HI 0x24 | ||
| 38 | -#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
| 39 | -#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
| 40 | -#define PCH_PIC_INT_EDGE_LO 0x60 | ||
| 41 | -#define PCH_PIC_INT_EDGE_HI 0x64 | ||
| 42 | -#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
| 43 | -#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
| 44 | -#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
| 45 | -#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
| 46 | -#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
| 47 | -#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
| 48 | -#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
| 49 | -#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
| 50 | -#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
| 51 | -#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
| 52 | -#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
| 53 | -#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
| 54 | -#define PCH_PIC_INT_POL_LO 0x3e0 | ||
| 55 | -#define PCH_PIC_INT_POL_HI 0x3e4 | ||
| 56 | - | ||
| 57 | -#define STATUS_LO_START 0 | ||
| 58 | -#define STATUS_HI_START 0x4 | ||
| 59 | -#define POL_LO_START 0x40 | ||
| 60 | -#define POL_HI_START 0x44 | ||
| 61 | struct LoongArchPCHPIC { | ||
| 62 | SysBusDevice parent_obj; | ||
| 63 | qemu_irq parent_irq[64]; | ||
| 64 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC { | ||
| 65 | MemoryRegion iomem8; | ||
| 66 | unsigned int irq_num; | ||
| 67 | }; | ||
| 68 | +#endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
| 69 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
| 70 | new file mode 100644 | ||
| 71 | index XXXXXXX..XXXXXXX | ||
| 72 | --- /dev/null | ||
| 73 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
| 74 | @@ -XXX,XX +XXX,XX @@ | ||
| 75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
| 76 | +/* | ||
| 77 | + * LoongArch 7A1000 I/O interrupt controller definitions | ||
| 78 | + * Copyright (c) 2024 Loongson Technology Corporation Limited | ||
| 79 | + */ | ||
| 80 | + | ||
| 81 | +#ifndef HW_LOONGARCH_PIC_COMMON_H | ||
| 82 | +#define HW_LOONGARCH_PIC_COMMON_H | ||
| 83 | + | ||
| 84 | +#include "hw/pci-host/ls7a.h" | ||
| 85 | +#include "hw/sysbus.h" | ||
| 86 | + | ||
| 87 | +#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
| 88 | +#define PCH_PIC_INT_ID_VER 0x1UL | ||
| 89 | +#define PCH_PIC_INT_ID_LO 0x00 | ||
| 90 | +#define PCH_PIC_INT_ID_HI 0x04 | ||
| 91 | +#define PCH_PIC_INT_MASK_LO 0x20 | ||
| 92 | +#define PCH_PIC_INT_MASK_HI 0x24 | ||
| 93 | +#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
| 94 | +#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
| 95 | +#define PCH_PIC_INT_EDGE_LO 0x60 | ||
| 96 | +#define PCH_PIC_INT_EDGE_HI 0x64 | ||
| 97 | +#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
| 98 | +#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
| 99 | +#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
| 100 | +#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
| 101 | +#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
| 102 | +#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
| 103 | +#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
| 104 | +#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
| 105 | +#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
| 106 | +#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
| 107 | +#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
| 108 | +#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
| 109 | +#define PCH_PIC_INT_POL_LO 0x3e0 | ||
| 110 | +#define PCH_PIC_INT_POL_HI 0x3e4 | ||
| 111 | + | ||
| 112 | +#define STATUS_LO_START 0 | ||
| 113 | +#define STATUS_HI_START 0x4 | ||
| 114 | +#define POL_LO_START 0x40 | ||
| 115 | +#define POL_HI_START 0x44 | ||
| 116 | +#endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
| 117 | -- | ||
| 118 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h | ||
| 2 | to file loongarch_pic_common.h, and rename structure name with | ||
| 3 | LoongArchPICCommonState. | ||
| 1 | 4 | ||
| 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
| 7 | --- | ||
| 8 | include/hw/intc/loongarch_pch_pic.h | 27 +------------------------ | ||
| 9 | include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++ | ||
| 10 | 2 files changed, 29 insertions(+), 26 deletions(-) | ||
| 11 | |||
| 12 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
| 13 | index XXXXXXX..XXXXXXX 100644 | ||
| 14 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
| 15 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
| 16 | @@ -XXX,XX +XXX,XX @@ | ||
| 17 | |||
| 18 | #include "hw/intc/loongarch_pic_common.h" | ||
| 19 | |||
| 20 | +#define LoongArchPCHPIC LoongArchPICCommonState | ||
| 21 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
| 22 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
| 23 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
| 24 | |||
| 25 | -struct LoongArchPCHPIC { | ||
| 26 | - SysBusDevice parent_obj; | ||
| 27 | - qemu_irq parent_irq[64]; | ||
| 28 | - uint64_t int_mask; /*0x020 interrupt mask register*/ | ||
| 29 | - uint64_t htmsi_en; /*0x040 1=msi*/ | ||
| 30 | - uint64_t intedge; /*0x060 edge=1 level =0*/ | ||
| 31 | - uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/ | ||
| 32 | - uint64_t auto_crtl0; /*0x0c0*/ | ||
| 33 | - uint64_t auto_crtl1; /*0x0e0*/ | ||
| 34 | - uint64_t last_intirr; /* edge detection */ | ||
| 35 | - uint64_t intirr; /* 0x380 interrupt request register */ | ||
| 36 | - uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
| 37 | - /* | ||
| 38 | - * 0x3e0 interrupt level polarity selection | ||
| 39 | - * register 0 for high level trigger | ||
| 40 | - */ | ||
| 41 | - uint64_t int_polarity; | ||
| 42 | - | ||
| 43 | - uint8_t route_entry[64]; /*0x100 - 0x138*/ | ||
| 44 | - uint8_t htmsi_vector[64]; /*0x200 - 0x238*/ | ||
| 45 | - | ||
| 46 | - MemoryRegion iomem32_low; | ||
| 47 | - MemoryRegion iomem32_high; | ||
| 48 | - MemoryRegion iomem8; | ||
| 49 | - unsigned int irq_num; | ||
| 50 | -}; | ||
| 51 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
| 52 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
| 53 | index XXXXXXX..XXXXXXX 100644 | ||
| 54 | --- a/include/hw/intc/loongarch_pic_common.h | ||
| 55 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
| 56 | @@ -XXX,XX +XXX,XX @@ | ||
| 57 | #define STATUS_HI_START 0x4 | ||
| 58 | #define POL_LO_START 0x40 | ||
| 59 | #define POL_HI_START 0x44 | ||
| 60 | + | ||
| 61 | +struct LoongArchPICCommonState { | ||
| 62 | + SysBusDevice parent_obj; | ||
| 63 | + | ||
| 64 | + qemu_irq parent_irq[64]; | ||
| 65 | + uint64_t int_mask; /* 0x020 interrupt mask register */ | ||
| 66 | + uint64_t htmsi_en; /* 0x040 1=msi */ | ||
| 67 | + uint64_t intedge; /* 0x060 edge=1 level=0 */ | ||
| 68 | + uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */ | ||
| 69 | + uint64_t auto_crtl0; /* 0x0c0 */ | ||
| 70 | + uint64_t auto_crtl1; /* 0x0e0 */ | ||
| 71 | + uint64_t last_intirr; /* edge detection */ | ||
| 72 | + uint64_t intirr; /* 0x380 interrupt request register */ | ||
| 73 | + uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
| 74 | + /* | ||
| 75 | + * 0x3e0 interrupt level polarity selection | ||
| 76 | + * register 0 for high level trigger | ||
| 77 | + */ | ||
| 78 | + uint64_t int_polarity; | ||
| 79 | + | ||
| 80 | + uint8_t route_entry[64]; /* 0x100 - 0x138 */ | ||
| 81 | + uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ | ||
| 82 | + | ||
| 83 | + MemoryRegion iomem32_low; | ||
| 84 | + MemoryRegion iomem32_high; | ||
| 85 | + MemoryRegion iomem8; | ||
| 86 | + unsigned int irq_num; | ||
| 87 | +}; | ||
| 88 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
| 89 | -- | ||
| 90 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Jiaxun Yang <jiaxun.yang@flygoat.com> | 1 | Memory region is created in instance_init(), merge it into function |
|---|---|---|---|
| 2 | realize(). There is no special class_init() for loongarch_pch object. | ||
| 2 | 3 | ||
| 3 | Higher bits for memory nodes were omitted at qemu_fdt_setprop_cells. | 4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
| 6 | --- | ||
| 7 | hw/intc/loongarch_pch_pic.c | 15 ++++----------- | ||
| 8 | 1 file changed, 4 insertions(+), 11 deletions(-) | ||
| 4 | 9 | ||
| 5 | Cc: qemu-stable@nongnu.org | 10 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c |
| 6 | Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> | ||
| 7 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
| 8 | Message-Id: <20240520-loongarch-fdt-memnode-v1-1-5ea9be93911e@flygoat.com> | ||
| 9 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 10 | --- | ||
| 11 | hw/loongarch/virt.c | 3 ++- | ||
| 12 | 1 file changed, 2 insertions(+), 1 deletion(-) | ||
| 13 | |||
| 14 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | 11 | index XXXXXXX..XXXXXXX 100644 |
| 16 | --- a/hw/loongarch/virt.c | 12 | --- a/hw/intc/loongarch_pch_pic.c |
| 17 | +++ b/hw/loongarch/virt.c | 13 | +++ b/hw/intc/loongarch_pch_pic.c |
| 18 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms, | 14 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) |
| 19 | char *nodename = g_strdup_printf("/memory@%" PRIx64, base); | 15 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) |
| 20 | 16 | { | |
| 21 | qemu_fdt_add_subnode(ms->fdt, nodename); | 17 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); |
| 22 | - qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size); | 18 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
| 23 | + qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", base >> 32, base, | 19 | |
| 24 | + size >> 32, size); | 20 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { |
| 25 | qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory"); | 21 | error_setg(errp, "Invalid 'pic_irq_num'"); |
| 26 | 22 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | |
| 27 | if (ms->numa_state && ms->numa_state->num_nodes) { | 23 | |
| 24 | qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); | ||
| 25 | qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); | ||
| 26 | -} | ||
| 27 | - | ||
| 28 | -static void loongarch_pch_pic_init(Object *obj) | ||
| 29 | -{ | ||
| 30 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); | ||
| 31 | - SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | ||
| 32 | - | ||
| 33 | - memory_region_init_io(&s->iomem32_low, obj, | ||
| 34 | + memory_region_init_io(&s->iomem32_low, OBJECT(dev), | ||
| 35 | &loongarch_pch_pic_reg32_low_ops, | ||
| 36 | s, PCH_PIC_NAME(.reg32_part1), 0x100); | ||
| 37 | - memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops, | ||
| 38 | + memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, | ||
| 39 | s, PCH_PIC_NAME(.reg8), 0x2a0); | ||
| 40 | - memory_region_init_io(&s->iomem32_high, obj, | ||
| 41 | + memory_region_init_io(&s->iomem32_high, OBJECT(dev), | ||
| 42 | &loongarch_pch_pic_reg32_high_ops, | ||
| 43 | s, PCH_PIC_NAME(.reg32_part2), 0xc60); | ||
| 44 | sysbus_init_mmio(sbd, &s->iomem32_low); | ||
| 45 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = { | ||
| 46 | .name = TYPE_LOONGARCH_PCH_PIC, | ||
| 47 | .parent = TYPE_SYS_BUS_DEVICE, | ||
| 48 | .instance_size = sizeof(LoongArchPCHPIC), | ||
| 49 | - .instance_init = loongarch_pch_pic_init, | ||
| 50 | .class_init = loongarch_pch_pic_class_init, | ||
| 51 | }; | ||
| 52 | |||
| 28 | -- | 53 | -- |
| 29 | 2.34.1 | 54 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | With pic vmstate, rename structure name vmstate_loongarch_pch_pic with |
|---|---|---|---|
| 2 | 2 | vmstate_loongarch_pic_common, and with pic property rename | |
| 3 | Currently LSX/LASX vector property is decided by the default value. | 3 | loongarch_pch_pic_properties with loongarch_pic_common_properties. |
| 4 | Instead vector property should be added unconditionally, and it is | ||
| 5 | irrelative with its default value. If vector is disabled by default, | ||
| 6 | vector also can be enabled from command line. | ||
| 7 | 4 | ||
| 8 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 9 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 10 | Message-Id: <20240521080549.434197-2-maobibo@loongson.cn> | ||
| 11 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 12 | --- | 7 | --- |
| 13 | target/loongarch/cpu.c | 14 ++++---------- | 8 | hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++-------------- |
| 14 | 1 file changed, 4 insertions(+), 10 deletions(-) | 9 | 1 file changed, 32 insertions(+), 20 deletions(-) |
| 15 | 10 | ||
| 16 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 11 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c |
| 17 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 18 | --- a/target/loongarch/cpu.c | 13 | --- a/hw/intc/loongarch_pch_pic.c |
| 19 | +++ b/target/loongarch/cpu.c | 14 | +++ b/hw/intc/loongarch_pch_pic.c |
| 20 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp) | 15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) |
| 21 | 16 | s->int_polarity = 0x0; | |
| 22 | void loongarch_cpu_post_init(Object *obj) | 17 | } |
| 18 | |||
| 19 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
| 20 | +{ | ||
| 21 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
| 22 | + | ||
| 23 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
| 24 | + error_setg(errp, "Invalid 'pic_irq_num'"); | ||
| 25 | + return; | ||
| 26 | + } | ||
| 27 | +} | ||
| 28 | + | ||
| 29 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
| 23 | { | 30 | { |
| 24 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 31 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); |
| 25 | - | 32 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
| 26 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | 33 | + Error *local_err = NULL; |
| 27 | - object_property_add_bool(obj, "lsx", loongarch_get_lsx, | 34 | |
| 28 | - loongarch_set_lsx); | 35 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { |
| 29 | - } | 36 | - error_setg(errp, "Invalid 'pic_irq_num'"); |
| 30 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { | 37 | + loongarch_pic_common_realize(dev, &local_err); |
| 31 | - object_property_add_bool(obj, "lasx", loongarch_get_lasx, | 38 | + if (local_err) { |
| 32 | - loongarch_set_lasx); | 39 | + error_propagate(errp, local_err); |
| 33 | - } | 40 | return; |
| 34 | + object_property_add_bool(obj, "lsx", loongarch_get_lsx, | 41 | } |
| 35 | + loongarch_set_lsx); | 42 | |
| 36 | + object_property_add_bool(obj, "lasx", loongarch_get_lasx, | 43 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) |
| 37 | + loongarch_set_lasx); | 44 | |
| 38 | } | 45 | } |
| 39 | 46 | ||
| 40 | static void loongarch_cpu_init(Object *obj) | 47 | -static Property loongarch_pch_pic_properties[] = { |
| 48 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), | ||
| 49 | +static Property loongarch_pic_common_properties[] = { | ||
| 50 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
| 51 | DEFINE_PROP_END_OF_LIST(), | ||
| 52 | }; | ||
| 53 | |||
| 54 | -static const VMStateDescription vmstate_loongarch_pch_pic = { | ||
| 55 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
| 56 | +static const VMStateDescription vmstate_loongarch_pic_common = { | ||
| 57 | + .name = "loongarch_pch_pic", | ||
| 58 | .version_id = 1, | ||
| 59 | .minimum_version_id = 1, | ||
| 60 | .fields = (const VMStateField[]) { | ||
| 61 | - VMSTATE_UINT64(int_mask, LoongArchPCHPIC), | ||
| 62 | - VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC), | ||
| 63 | - VMSTATE_UINT64(intedge, LoongArchPCHPIC), | ||
| 64 | - VMSTATE_UINT64(intclr, LoongArchPCHPIC), | ||
| 65 | - VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC), | ||
| 66 | - VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC), | ||
| 67 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64), | ||
| 68 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64), | ||
| 69 | - VMSTATE_UINT64(last_intirr, LoongArchPCHPIC), | ||
| 70 | - VMSTATE_UINT64(intirr, LoongArchPCHPIC), | ||
| 71 | - VMSTATE_UINT64(intisr, LoongArchPCHPIC), | ||
| 72 | - VMSTATE_UINT64(int_polarity, LoongArchPCHPIC), | ||
| 73 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
| 74 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
| 75 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
| 76 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
| 77 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
| 78 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
| 79 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
| 80 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
| 81 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
| 82 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
| 83 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
| 84 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
| 85 | VMSTATE_END_OF_LIST() | ||
| 86 | } | ||
| 87 | }; | ||
| 88 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
| 89 | |||
| 90 | dc->realize = loongarch_pch_pic_realize; | ||
| 91 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
| 92 | - dc->vmsd = &vmstate_loongarch_pch_pic; | ||
| 93 | - device_class_set_props(dc, loongarch_pch_pic_properties); | ||
| 94 | + dc->vmsd = &vmstate_loongarch_pic_common; | ||
| 95 | + device_class_set_props(dc, loongarch_pic_common_properties); | ||
| 96 | } | ||
| 97 | |||
| 98 | static const TypeInfo loongarch_pch_pic_info = { | ||
| 41 | -- | 99 | -- |
| 42 | 2.34.1 | 100 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Move some common functions to file loongarch_pic_common.c, the common |
|---|---|---|---|
| 2 | 2 | functions include loongarch_pic_common_realize(), property structure | |
| 3 | One LoongArch virt machine platform, there is limitation for memory | 3 | loongarch_pic_common_properties and vmstate structure |
| 4 | map information. The minimum memory size is 256M and minimum memory | 4 | vmstate_loongarch_pic_common. |
| 5 | size for numa node0 is 256M also. With qemu numa qtest, it is possible | ||
| 6 | that memory size of numa node0 is 128M. | ||
| 7 | |||
| 8 | Limitations for minimum memory size for both total memory and numa | ||
| 9 | node0 is removed for fadt numa memory table creation. | ||
| 10 | 5 | ||
| 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 12 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 7 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 13 | Message-Id: <20240515093927.3453674-3-maobibo@loongson.cn> | ||
| 14 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 15 | --- | 8 | --- |
| 16 | hw/loongarch/virt.c | 46 ++++++++++++++++++++++++++++++++++++++++++--- | 9 | hw/intc/loongarch_pch_pic.c | 37 +----------------------------- |
| 17 | 1 file changed, 43 insertions(+), 3 deletions(-) | 10 | hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++ |
| 11 | 2 files changed, 42 insertions(+), 36 deletions(-) | ||
| 12 | create mode 100644 hw/intc/loongarch_pic_common.c | ||
| 18 | 13 | ||
| 19 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 14 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c |
| 20 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
| 21 | --- a/hw/loongarch/virt.c | 16 | --- a/hw/intc/loongarch_pch_pic.c |
| 22 | +++ b/hw/loongarch/virt.c | 17 | +++ b/hw/intc/loongarch_pch_pic.c |
| 23 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms, | 18 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) |
| 24 | g_free(nodename); | 19 | s->int_polarity = 0x0; |
| 25 | } | 20 | } |
| 26 | 21 | ||
| 27 | +static void fdt_add_memory_nodes(MachineState *ms) | 22 | -static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) |
| 23 | -{ | ||
| 24 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
| 25 | - | ||
| 26 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
| 27 | - error_setg(errp, "Invalid 'pic_irq_num'"); | ||
| 28 | - return; | ||
| 29 | - } | ||
| 30 | -} | ||
| 31 | - | ||
| 32 | +#include "loongarch_pic_common.c" | ||
| 33 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
| 34 | { | ||
| 35 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
| 36 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
| 37 | |||
| 38 | } | ||
| 39 | |||
| 40 | -static Property loongarch_pic_common_properties[] = { | ||
| 41 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
| 42 | - DEFINE_PROP_END_OF_LIST(), | ||
| 43 | -}; | ||
| 44 | - | ||
| 45 | -static const VMStateDescription vmstate_loongarch_pic_common = { | ||
| 46 | - .name = "loongarch_pch_pic", | ||
| 47 | - .version_id = 1, | ||
| 48 | - .minimum_version_id = 1, | ||
| 49 | - .fields = (const VMStateField[]) { | ||
| 50 | - VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
| 51 | - VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
| 52 | - VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
| 53 | - VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
| 54 | - VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
| 55 | - VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
| 56 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
| 57 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
| 58 | - VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
| 59 | - VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
| 60 | - VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
| 61 | - VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
| 62 | - VMSTATE_END_OF_LIST() | ||
| 63 | - } | ||
| 64 | -}; | ||
| 65 | - | ||
| 66 | static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
| 67 | { | ||
| 68 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
| 69 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
| 70 | new file mode 100644 | ||
| 71 | index XXXXXXX..XXXXXXX | ||
| 72 | --- /dev/null | ||
| 73 | +++ b/hw/intc/loongarch_pic_common.c | ||
| 74 | @@ -XXX,XX +XXX,XX @@ | ||
| 75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
| 76 | +/* | ||
| 77 | + * QEMU Loongson 7A1000 I/O interrupt controller. | ||
| 78 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
| 79 | + */ | ||
| 80 | + | ||
| 81 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
| 28 | +{ | 82 | +{ |
| 29 | + hwaddr base, size, ram_size, gap; | 83 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); |
| 30 | + int i, nb_numa_nodes, nodes; | ||
| 31 | + NodeInfo *numa_info; | ||
| 32 | + | 84 | + |
| 33 | + ram_size = ms->ram_size; | 85 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { |
| 34 | + base = VIRT_LOWMEM_BASE; | 86 | + error_setg(errp, "Invalid 'pic_irq_num'"); |
| 35 | + gap = VIRT_LOWMEM_SIZE; | 87 | + return; |
| 36 | + nodes = nb_numa_nodes = ms->numa_state->num_nodes; | ||
| 37 | + numa_info = ms->numa_state->nodes; | ||
| 38 | + if (!nodes) { | ||
| 39 | + nodes = 1; | ||
| 40 | + } | ||
| 41 | + | ||
| 42 | + for (i = 0; i < nodes; i++) { | ||
| 43 | + if (nb_numa_nodes) { | ||
| 44 | + size = numa_info[i].node_mem; | ||
| 45 | + } else { | ||
| 46 | + size = ram_size; | ||
| 47 | + } | ||
| 48 | + | ||
| 49 | + /* | ||
| 50 | + * memory for the node splited into two part | ||
| 51 | + * lowram: [base, +gap) | ||
| 52 | + * highram: [VIRT_HIGHMEM_BASE, +(len - gap)) | ||
| 53 | + */ | ||
| 54 | + if (size >= gap) { | ||
| 55 | + fdt_add_memory_node(ms, base, gap, i); | ||
| 56 | + size -= gap; | ||
| 57 | + base = VIRT_HIGHMEM_BASE; | ||
| 58 | + gap = ram_size - VIRT_LOWMEM_SIZE; | ||
| 59 | + } | ||
| 60 | + | ||
| 61 | + if (size) { | ||
| 62 | + fdt_add_memory_node(ms, base, size, i); | ||
| 63 | + base += size; | ||
| 64 | + gap -= size; | ||
| 65 | + } | ||
| 66 | + } | 88 | + } |
| 67 | +} | 89 | +} |
| 68 | + | 90 | + |
| 69 | static void virt_build_smbios(LoongArchVirtMachineState *lvms) | 91 | +static Property loongarch_pic_common_properties[] = { |
| 70 | { | 92 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), |
| 71 | MachineState *ms = MACHINE(lvms); | 93 | + DEFINE_PROP_END_OF_LIST(), |
| 72 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 94 | +}; |
| 73 | lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; | 95 | + |
| 74 | } | 96 | +static const VMStateDescription vmstate_loongarch_pic_common = { |
| 75 | fdt_add_cpu_nodes(lvms); | 97 | + .name = "loongarch_pch_pic", |
| 76 | + fdt_add_memory_nodes(machine); | 98 | + .version_id = 1, |
| 77 | 99 | + .minimum_version_id = 1, | |
| 78 | /* Node0 memory */ | 100 | + .fields = (const VMStateField[]) { |
| 79 | memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1); | 101 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), |
| 80 | - fdt_add_memory_node(machine, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 0); | 102 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), |
| 81 | memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram", | 103 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), |
| 82 | machine->ram, offset, VIRT_LOWMEM_SIZE); | 104 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), |
| 83 | memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem); | 105 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), |
| 84 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 106 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), |
| 85 | } | 107 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), |
| 86 | phyAddr = VIRT_HIGHMEM_BASE; | 108 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), |
| 87 | memmap_add_entry(phyAddr, highram_size, 1); | 109 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), |
| 88 | - fdt_add_memory_node(machine, phyAddr, highram_size, 0); | 110 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), |
| 89 | memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram", | 111 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), |
| 90 | machine->ram, offset, highram_size); | 112 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), |
| 91 | memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem); | 113 | + VMSTATE_END_OF_LIST() |
| 92 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 114 | + } |
| 93 | offset, numa_info[i].node_mem); | 115 | +}; |
| 94 | memory_region_add_subregion(address_space_mem, phyAddr, nodemem); | ||
| 95 | memmap_add_entry(phyAddr, numa_info[i].node_mem, 1); | ||
| 96 | - fdt_add_memory_node(machine, phyAddr, numa_info[i].node_mem, i); | ||
| 97 | offset += numa_info[i].node_mem; | ||
| 98 | phyAddr += numa_info[i].node_mem; | ||
| 99 | } | ||
| 100 | -- | 116 | -- |
| 101 | 2.34.1 | 117 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object, |
|---|---|---|---|
| 2 | 2 | it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has | |
| 3 | Some qtest test cases such as numa use default memory size of generic | 3 | its own realize() function. |
| 4 | machine class, which is 128M by fault. | ||
| 5 | |||
| 6 | Here generic default memory size is used, and also remove minimum memory | ||
| 7 | size which is 1G originally. | ||
| 8 | 4 | ||
| 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 10 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 11 | Message-Id: <20240515093927.3453674-6-maobibo@loongson.cn> | ||
| 12 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 13 | --- | 7 | --- |
| 14 | hw/loongarch/virt.c | 5 ----- | 8 | hw/intc/loongarch_pch_pic.c | 38 ++++++++++++-------------- |
| 15 | 1 file changed, 5 deletions(-) | 9 | hw/intc/loongarch_pic_common.c | 32 +++++++++++++++++++++- |
| 10 | hw/intc/meson.build | 2 +- | ||
| 11 | include/hw/intc/loongarch_pch_pic.h | 21 +++++++++++--- | ||
| 12 | include/hw/intc/loongarch_pic_common.h | 10 +++++++ | ||
| 13 | 5 files changed, 77 insertions(+), 26 deletions(-) | ||
| 16 | 14 | ||
| 17 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 15 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c |
| 18 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
| 19 | --- a/hw/loongarch/virt.c | 17 | --- a/hw/intc/loongarch_pch_pic.c |
| 20 | +++ b/hw/loongarch/virt.c | 18 | +++ b/hw/intc/loongarch_pch_pic.c |
| 21 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 19 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) |
| 22 | cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); | 20 | s->int_polarity = 0x0; |
| 21 | } | ||
| 22 | |||
| 23 | -#include "loongarch_pic_common.c" | ||
| 24 | -static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
| 25 | +static void loongarch_pic_realize(DeviceState *dev, Error **errp) | ||
| 26 | { | ||
| 27 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
| 28 | - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
| 29 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
| 30 | + LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev); | ||
| 31 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
| 32 | Error *local_err = NULL; | ||
| 33 | |||
| 34 | - loongarch_pic_common_realize(dev, &local_err); | ||
| 35 | + lpc->parent_realize(dev, &local_err); | ||
| 36 | if (local_err) { | ||
| 37 | error_propagate(errp, local_err); | ||
| 38 | return; | ||
| 39 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
| 40 | |||
| 41 | } | ||
| 42 | |||
| 43 | -static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
| 44 | +static void loongarch_pic_class_init(ObjectClass *klass, void *data) | ||
| 45 | { | ||
| 46 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
| 47 | + LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass); | ||
| 48 | |||
| 49 | - dc->realize = loongarch_pch_pic_realize; | ||
| 50 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
| 51 | - dc->vmsd = &vmstate_loongarch_pic_common; | ||
| 52 | - device_class_set_props(dc, loongarch_pic_common_properties); | ||
| 53 | + device_class_set_parent_realize(dc, loongarch_pic_realize, | ||
| 54 | + &lpc->parent_realize); | ||
| 55 | } | ||
| 56 | |||
| 57 | -static const TypeInfo loongarch_pch_pic_info = { | ||
| 58 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
| 59 | - .parent = TYPE_SYS_BUS_DEVICE, | ||
| 60 | - .instance_size = sizeof(LoongArchPCHPIC), | ||
| 61 | - .class_init = loongarch_pch_pic_class_init, | ||
| 62 | +static const TypeInfo loongarch_pic_types[] = { | ||
| 63 | + { | ||
| 64 | + .name = TYPE_LOONGARCH_PIC, | ||
| 65 | + .parent = TYPE_LOONGARCH_PIC_COMMON, | ||
| 66 | + .instance_size = sizeof(LoongarchPICState), | ||
| 67 | + .class_size = sizeof(LoongarchPICClass), | ||
| 68 | + .class_init = loongarch_pic_class_init, | ||
| 69 | + } | ||
| 70 | }; | ||
| 71 | |||
| 72 | -static void loongarch_pch_pic_register_types(void) | ||
| 73 | -{ | ||
| 74 | - type_register_static(&loongarch_pch_pic_info); | ||
| 75 | -} | ||
| 76 | - | ||
| 77 | -type_init(loongarch_pch_pic_register_types) | ||
| 78 | +DEFINE_TYPES(loongarch_pic_types) | ||
| 79 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
| 80 | index XXXXXXX..XXXXXXX 100644 | ||
| 81 | --- a/hw/intc/loongarch_pic_common.c | ||
| 82 | +++ b/hw/intc/loongarch_pic_common.c | ||
| 83 | @@ -XXX,XX +XXX,XX @@ | ||
| 84 | * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
| 85 | */ | ||
| 86 | |||
| 87 | +#include "qemu/osdep.h" | ||
| 88 | +#include "qapi/error.h" | ||
| 89 | +#include "hw/intc/loongarch_pic_common.h" | ||
| 90 | +#include "hw/qdev-properties.h" | ||
| 91 | +#include "migration/vmstate.h" | ||
| 92 | + | ||
| 93 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
| 94 | { | ||
| 95 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
| 96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
| 97 | |||
| 98 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
| 99 | error_setg(errp, "Invalid 'pic_irq_num'"); | ||
| 100 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { | ||
| 101 | VMSTATE_END_OF_LIST() | ||
| 23 | } | 102 | } |
| 24 | 103 | }; | |
| 25 | - if (ram_size < 1 * GiB) { | 104 | + |
| 26 | - error_report("ram_size must be greater than 1G."); | 105 | +static void loongarch_pic_common_class_init(ObjectClass *klass, void *data) |
| 27 | - exit(1); | 106 | +{ |
| 28 | - } | 107 | + DeviceClass *dc = DEVICE_CLASS(klass); |
| 29 | create_fdt(lvms); | 108 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass); |
| 30 | 109 | + | |
| 31 | /* Create IOCSR space */ | 110 | + device_class_set_parent_realize(dc, loongarch_pic_common_realize, |
| 32 | @@ -XXX,XX +XXX,XX @@ static void virt_class_init(ObjectClass *oc, void *data) | 111 | + &lpcc->parent_realize); |
| 33 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); | 112 | + device_class_set_props(dc, loongarch_pic_common_properties); |
| 34 | 113 | + dc->vmsd = &vmstate_loongarch_pic_common; | |
| 35 | mc->init = virt_init; | 114 | +} |
| 36 | - mc->default_ram_size = 1 * GiB; | 115 | + |
| 37 | mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); | 116 | +static const TypeInfo loongarch_pic_common_types[] = { |
| 38 | mc->default_ram_id = "loongarch.ram"; | 117 | + { |
| 39 | mc->max_cpus = LOONGARCH_MAX_CPUS; | 118 | + .name = TYPE_LOONGARCH_PIC_COMMON, |
| 119 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
| 120 | + .instance_size = sizeof(LoongArchPICCommonState), | ||
| 121 | + .class_size = sizeof(LoongArchPICCommonClass), | ||
| 122 | + .class_init = loongarch_pic_common_class_init, | ||
| 123 | + .abstract = true, | ||
| 124 | + } | ||
| 125 | +}; | ||
| 126 | + | ||
| 127 | +DEFINE_TYPES(loongarch_pic_common_types) | ||
| 128 | diff --git a/hw/intc/meson.build b/hw/intc/meson.build | ||
| 129 | index XXXXXXX..XXXXXXX 100644 | ||
| 130 | --- a/hw/intc/meson.build | ||
| 131 | +++ b/hw/intc/meson.build | ||
| 132 | @@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) | ||
| 133 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) | ||
| 134 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) | ||
| 135 | specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) | ||
| 136 | -specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) | ||
| 137 | +specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c')) | ||
| 138 | specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) | ||
| 139 | specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c')) | ||
| 140 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
| 141 | index XXXXXXX..XXXXXXX 100644 | ||
| 142 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
| 143 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
| 144 | @@ -XXX,XX +XXX,XX @@ | ||
| 145 | |||
| 146 | #include "hw/intc/loongarch_pic_common.h" | ||
| 147 | |||
| 148 | -#define LoongArchPCHPIC LoongArchPICCommonState | ||
| 149 | -#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
| 150 | -#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
| 151 | -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
| 152 | +#define TYPE_LOONGARCH_PIC "loongarch_pic" | ||
| 153 | +#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name | ||
| 154 | +OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC) | ||
| 155 | + | ||
| 156 | +struct LoongarchPICState { | ||
| 157 | + LoongArchPICCommonState parent_obj; | ||
| 158 | +}; | ||
| 159 | + | ||
| 160 | +struct LoongarchPICClass { | ||
| 161 | + LoongArchPICCommonClass parent_class; | ||
| 162 | + | ||
| 163 | + DeviceRealize parent_realize; | ||
| 164 | +}; | ||
| 165 | + | ||
| 166 | +#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC | ||
| 167 | +typedef struct LoongArchPICCommonState LoongArchPCHPIC; | ||
| 168 | +#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) | ||
| 169 | |||
| 170 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
| 171 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
| 172 | index XXXXXXX..XXXXXXX 100644 | ||
| 173 | --- a/include/hw/intc/loongarch_pic_common.h | ||
| 174 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
| 175 | @@ -XXX,XX +XXX,XX @@ | ||
| 176 | #define POL_LO_START 0x40 | ||
| 177 | #define POL_HI_START 0x44 | ||
| 178 | |||
| 179 | +#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common" | ||
| 180 | +OBJECT_DECLARE_TYPE(LoongArchPICCommonState, | ||
| 181 | + LoongArchPICCommonClass, LOONGARCH_PIC_COMMON) | ||
| 182 | + | ||
| 183 | struct LoongArchPICCommonState { | ||
| 184 | SysBusDevice parent_obj; | ||
| 185 | |||
| 186 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState { | ||
| 187 | MemoryRegion iomem8; | ||
| 188 | unsigned int irq_num; | ||
| 189 | }; | ||
| 190 | + | ||
| 191 | +struct LoongArchPICCommonClass { | ||
| 192 | + SysBusDeviceClass parent_class; | ||
| 193 | + | ||
| 194 | + DeviceRealize parent_realize; | ||
| 195 | +}; | ||
| 196 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
| 40 | -- | 197 | -- |
| 41 | 2.34.1 | 198 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Add vmstate pre_save and post_load interfaces, which can be used |
|---|---|---|---|
| 2 | 2 | by pic kvm driver in future. | |
| 3 | Memory map table for fwcfg is used for UEFI BIOS, UEFI BIOS uses the first | ||
| 4 | entry from fwcfg memory map as the first memory HOB, the second memory HOB | ||
| 5 | will be used if the first memory HOB is used up. | ||
| 6 | |||
| 7 | Memory map table for fwcfg does not care about numa node, however in | ||
| 8 | generic the first memory HOB is part of numa node0, so that runtime | ||
| 9 | memory of UEFI which is allocated from the first memory HOB is located | ||
| 10 | at numa node0. | ||
| 11 | 3 | ||
| 12 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 13 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 5 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 14 | Message-Id: <20240515093927.3453674-4-maobibo@loongson.cn> | ||
| 15 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 16 | --- | 6 | --- |
| 17 | hw/loongarch/virt.c | 60 ++++++++++++++++++++++++++++++++++++++++++--- | 7 | hw/intc/loongarch_pic_common.c | 26 ++++++++++++++++++++++++++ |
| 18 | 1 file changed, 57 insertions(+), 3 deletions(-) | 8 | include/hw/intc/loongarch_pic_common.h | 2 ++ |
| 9 | 2 files changed, 28 insertions(+) | ||
| 19 | 10 | ||
| 20 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 11 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c |
| 21 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 22 | --- a/hw/loongarch/virt.c | 13 | --- a/hw/intc/loongarch_pic_common.c |
| 23 | +++ b/hw/loongarch/virt.c | 14 | +++ b/hw/intc/loongarch_pic_common.c |
| 24 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps virt_iocsr_misc_ops = { | 15 | @@ -XXX,XX +XXX,XX @@ |
| 25 | }, | 16 | #include "hw/qdev-properties.h" |
| 26 | }; | 17 | #include "migration/vmstate.h" |
| 27 | 18 | ||
| 28 | +static void fw_cfg_add_memory(MachineState *ms) | 19 | +static int loongarch_pic_pre_save(void *opaque) |
| 29 | +{ | 20 | +{ |
| 30 | + hwaddr base, size, ram_size, gap; | 21 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; |
| 31 | + int nb_numa_nodes, nodes; | 22 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); |
| 32 | + NodeInfo *numa_info; | ||
| 33 | + | 23 | + |
| 34 | + ram_size = ms->ram_size; | 24 | + if (lpcc->pre_save) { |
| 35 | + base = VIRT_LOWMEM_BASE; | 25 | + return lpcc->pre_save(s); |
| 36 | + gap = VIRT_LOWMEM_SIZE; | ||
| 37 | + nodes = nb_numa_nodes = ms->numa_state->num_nodes; | ||
| 38 | + numa_info = ms->numa_state->nodes; | ||
| 39 | + if (!nodes) { | ||
| 40 | + nodes = 1; | ||
| 41 | + } | 26 | + } |
| 42 | + | 27 | + |
| 43 | + /* add fw_cfg memory map of node0 */ | 28 | + return 0; |
| 44 | + if (nb_numa_nodes) { | 29 | +} |
| 45 | + size = numa_info[0].node_mem; | 30 | + |
| 46 | + } else { | 31 | +static int loongarch_pic_post_load(void *opaque, int version_id) |
| 47 | + size = ram_size; | 32 | +{ |
| 33 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; | ||
| 34 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); | ||
| 35 | + | ||
| 36 | + if (lpcc->post_load) { | ||
| 37 | + return lpcc->post_load(s, version_id); | ||
| 48 | + } | 38 | + } |
| 49 | + | 39 | + |
| 50 | + if (size >= gap) { | 40 | + return 0; |
| 51 | + memmap_add_entry(base, gap, 1); | ||
| 52 | + size -= gap; | ||
| 53 | + base = VIRT_HIGHMEM_BASE; | ||
| 54 | + gap = ram_size - VIRT_LOWMEM_SIZE; | ||
| 55 | + } | ||
| 56 | + | ||
| 57 | + if (size) { | ||
| 58 | + memmap_add_entry(base, size, 1); | ||
| 59 | + base += size; | ||
| 60 | + } | ||
| 61 | + | ||
| 62 | + if (nodes < 2) { | ||
| 63 | + return; | ||
| 64 | + } | ||
| 65 | + | ||
| 66 | + /* add fw_cfg memory map of other nodes */ | ||
| 67 | + size = ram_size - numa_info[0].node_mem; | ||
| 68 | + gap = VIRT_LOWMEM_BASE + VIRT_LOWMEM_SIZE; | ||
| 69 | + if (base < gap && (base + size) > gap) { | ||
| 70 | + /* | ||
| 71 | + * memory map for the maining nodes splited into two part | ||
| 72 | + * lowram: [base, +(gap - base)) | ||
| 73 | + * highram: [VIRT_HIGHMEM_BASE, +(size - (gap - base))) | ||
| 74 | + */ | ||
| 75 | + memmap_add_entry(base, gap - base, 1); | ||
| 76 | + size -= gap - base; | ||
| 77 | + base = VIRT_HIGHMEM_BASE; | ||
| 78 | + } | ||
| 79 | + | ||
| 80 | + if (size) | ||
| 81 | + memmap_add_entry(base, size, 1); | ||
| 82 | +} | 41 | +} |
| 83 | + | 42 | + |
| 84 | static void virt_init(MachineState *machine) | 43 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) |
| 85 | { | 44 | { |
| 86 | LoongArchCPU *lacpu; | 45 | LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); |
| 87 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 46 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { |
| 88 | } | 47 | .name = "loongarch_pch_pic", |
| 89 | fdt_add_cpu_nodes(lvms); | 48 | .version_id = 1, |
| 90 | fdt_add_memory_nodes(machine); | 49 | .minimum_version_id = 1, |
| 91 | + fw_cfg_add_memory(machine); | 50 | + .pre_save = loongarch_pic_pre_save, |
| 92 | 51 | + .post_load = loongarch_pic_post_load, | |
| 93 | /* Node0 memory */ | 52 | .fields = (const VMStateField[]) { |
| 94 | - memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1); | 53 | VMSTATE_UINT64(int_mask, LoongArchPICCommonState), |
| 95 | memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram", | 54 | VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), |
| 96 | machine->ram, offset, VIRT_LOWMEM_SIZE); | 55 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h |
| 97 | memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem); | 56 | index XXXXXXX..XXXXXXX 100644 |
| 98 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 57 | --- a/include/hw/intc/loongarch_pic_common.h |
| 99 | highram_size = ram_size - VIRT_LOWMEM_SIZE; | 58 | +++ b/include/hw/intc/loongarch_pic_common.h |
| 100 | } | 59 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass { |
| 101 | phyAddr = VIRT_HIGHMEM_BASE; | 60 | SysBusDeviceClass parent_class; |
| 102 | - memmap_add_entry(phyAddr, highram_size, 1); | 61 | |
| 103 | memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram", | 62 | DeviceRealize parent_realize; |
| 104 | machine->ram, offset, highram_size); | 63 | + int (*pre_save)(LoongArchPICCommonState *s); |
| 105 | memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem); | 64 | + int (*post_load)(LoongArchPICCommonState *s, int version_id); |
| 106 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 65 | }; |
| 107 | memory_region_init_alias(nodemem, NULL, ramName, machine->ram, | 66 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ |
| 108 | offset, numa_info[i].node_mem); | ||
| 109 | memory_region_add_subregion(address_space_mem, phyAddr, nodemem); | ||
| 110 | - memmap_add_entry(phyAddr, numa_info[i].node_mem, 1); | ||
| 111 | offset += numa_info[i].node_mem; | ||
| 112 | phyAddr += numa_info[i].node_mem; | ||
| 113 | } | ||
| 114 | -- | 67 | -- |
| 115 | 2.34.1 | 68 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and |
|---|---|---|---|
| 2 | 2 | replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON | |
| 3 | For system dram memory region, it is not necessary to use numa node | 3 | separately. Also remove unnecessary header files. |
| 4 | information. There is only low memory region and high memory region. | ||
| 5 | |||
| 6 | Remove numa node information for ddr memory region here, it can reduce | ||
| 7 | memory region number on LoongArch virt machine. | ||
| 8 | 4 | ||
| 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 10 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 11 | Message-Id: <20240515093927.3453674-5-maobibo@loongson.cn> | ||
| 12 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 13 | --- | 7 | --- |
| 14 | hw/loongarch/virt.c | 53 +++++++++++++++------------------------------ | 8 | hw/intc/loongarch_pch_pic.c | 24 ++++++++++-------------- |
| 15 | 1 file changed, 17 insertions(+), 36 deletions(-) | 9 | hw/loongarch/virt.c | 2 +- |
| 10 | include/hw/intc/loongarch_pch_pic.h | 4 ---- | ||
| 11 | 3 files changed, 11 insertions(+), 19 deletions(-) | ||
| 16 | 12 | ||
| 13 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
| 14 | index XXXXXXX..XXXXXXX 100644 | ||
| 15 | --- a/hw/intc/loongarch_pch_pic.c | ||
| 16 | +++ b/hw/intc/loongarch_pch_pic.c | ||
| 17 | @@ -XXX,XX +XXX,XX @@ | ||
| 18 | |||
| 19 | #include "qemu/osdep.h" | ||
| 20 | #include "qemu/bitops.h" | ||
| 21 | -#include "hw/sysbus.h" | ||
| 22 | -#include "hw/loongarch/virt.h" | ||
| 23 | -#include "hw/pci-host/ls7a.h" | ||
| 24 | #include "hw/irq.h" | ||
| 25 | #include "hw/intc/loongarch_pch_pic.h" | ||
| 26 | -#include "hw/qdev-properties.h" | ||
| 27 | -#include "migration/vmstate.h" | ||
| 28 | #include "trace.h" | ||
| 29 | #include "qapi/error.h" | ||
| 30 | |||
| 31 | -static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
| 32 | +static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask, | ||
| 33 | + int level) | ||
| 34 | { | ||
| 35 | uint64_t val; | ||
| 36 | int irq; | ||
| 37 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
| 38 | |||
| 39 | static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
| 40 | { | ||
| 41 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 42 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 43 | uint64_t mask = 1ULL << irq; | ||
| 44 | |||
| 45 | assert(irq < s->irq_num); | ||
| 46 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
| 47 | static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, | ||
| 48 | unsigned size) | ||
| 49 | { | ||
| 50 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 51 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 52 | uint64_t val = 0; | ||
| 53 | uint32_t offset = addr & 0xfff; | ||
| 54 | |||
| 55 | @@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi) | ||
| 56 | static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
| 57 | uint64_t value, unsigned size) | ||
| 58 | { | ||
| 59 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 60 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 61 | uint32_t offset, old_valid, data = (uint32_t)value; | ||
| 62 | uint64_t old, int_mask; | ||
| 63 | offset = addr & 0xfff; | ||
| 64 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
| 65 | static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
| 66 | unsigned size) | ||
| 67 | { | ||
| 68 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 69 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 70 | uint64_t val = 0; | ||
| 71 | uint32_t offset = addr & 0xfff; | ||
| 72 | |||
| 73 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
| 74 | static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
| 75 | uint64_t value, unsigned size) | ||
| 76 | { | ||
| 77 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 78 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 79 | uint32_t offset, data = (uint32_t)value; | ||
| 80 | offset = addr & 0xfff; | ||
| 81 | |||
| 82 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
| 83 | static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
| 84 | unsigned size) | ||
| 85 | { | ||
| 86 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 87 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 88 | uint64_t val = 0; | ||
| 89 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
| 90 | int64_t offset_tmp; | ||
| 91 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
| 92 | static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, | ||
| 93 | uint64_t data, unsigned size) | ||
| 94 | { | ||
| 95 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
| 96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
| 97 | int32_t offset_tmp; | ||
| 98 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
| 99 | |||
| 100 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = { | ||
| 101 | |||
| 102 | static void loongarch_pch_pic_reset(DeviceState *d) | ||
| 103 | { | ||
| 104 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d); | ||
| 105 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d); | ||
| 106 | int i; | ||
| 107 | |||
| 108 | s->int_mask = -1; | ||
| 17 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 109 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
| 18 | index XXXXXXX..XXXXXXX 100644 | 110 | index XXXXXXX..XXXXXXX 100644 |
| 19 | --- a/hw/loongarch/virt.c | 111 | --- a/hw/loongarch/virt.c |
| 20 | +++ b/hw/loongarch/virt.c | 112 | +++ b/hw/loongarch/virt.c |
| 21 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 113 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
| 22 | { | 114 | /* Add Extend I/O Interrupt Controller node */ |
| 23 | LoongArchCPU *lacpu; | 115 | fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); |
| 24 | const char *cpu_model = machine->cpu_type; | 116 | |
| 25 | - ram_addr_t offset = 0; | 117 | - pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); |
| 26 | - ram_addr_t ram_size = machine->ram_size; | 118 | + pch_pic = qdev_new(TYPE_LOONGARCH_PIC); |
| 27 | - uint64_t highram_size = 0, phyAddr = 0; | 119 | num = VIRT_PCH_PIC_IRQ_NUM; |
| 28 | MemoryRegion *address_space_mem = get_system_memory(); | 120 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); |
| 29 | LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); | 121 | d = SYS_BUS_DEVICE(pch_pic); |
| 30 | - int nb_numa_nodes = machine->numa_state->num_nodes; | 122 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h |
| 31 | - NodeInfo *numa_info = machine->numa_state->nodes; | 123 | index XXXXXXX..XXXXXXX 100644 |
| 32 | int i; | 124 | --- a/include/hw/intc/loongarch_pch_pic.h |
| 33 | + hwaddr base, size, ram_size = machine->ram_size; | 125 | +++ b/include/hw/intc/loongarch_pch_pic.h |
| 34 | const CPUArchIdList *possible_cpus; | 126 | @@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass { |
| 35 | MachineClass *mc = MACHINE_GET_CLASS(machine); | 127 | DeviceRealize parent_realize; |
| 36 | CPUState *cpu; | 128 | }; |
| 37 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | 129 | |
| 38 | fw_cfg_add_memory(machine); | 130 | -#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC |
| 39 | 131 | -typedef struct LoongArchPICCommonState LoongArchPCHPIC; | |
| 40 | /* Node0 memory */ | 132 | -#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) |
| 41 | - memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram", | ||
| 42 | - machine->ram, offset, VIRT_LOWMEM_SIZE); | ||
| 43 | - memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem); | ||
| 44 | - | 133 | - |
| 45 | - offset += VIRT_LOWMEM_SIZE; | 134 | #endif /* HW_LOONGARCH_PCH_PIC_H */ |
| 46 | - if (nb_numa_nodes > 0) { | ||
| 47 | - assert(numa_info[0].node_mem > VIRT_LOWMEM_SIZE); | ||
| 48 | - highram_size = numa_info[0].node_mem - VIRT_LOWMEM_SIZE; | ||
| 49 | - } else { | ||
| 50 | - highram_size = ram_size - VIRT_LOWMEM_SIZE; | ||
| 51 | + size = ram_size; | ||
| 52 | + base = VIRT_LOWMEM_BASE; | ||
| 53 | + if (size > VIRT_LOWMEM_SIZE) { | ||
| 54 | + size = VIRT_LOWMEM_SIZE; | ||
| 55 | } | ||
| 56 | - phyAddr = VIRT_HIGHMEM_BASE; | ||
| 57 | - memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram", | ||
| 58 | - machine->ram, offset, highram_size); | ||
| 59 | - memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem); | ||
| 60 | - | ||
| 61 | - /* Node1 - Nodemax memory */ | ||
| 62 | - offset += highram_size; | ||
| 63 | - phyAddr += highram_size; | ||
| 64 | - | ||
| 65 | - for (i = 1; i < nb_numa_nodes; i++) { | ||
| 66 | - MemoryRegion *nodemem = g_new(MemoryRegion, 1); | ||
| 67 | - g_autofree char *ramName = g_strdup_printf("loongarch.node%d.ram", i); | ||
| 68 | - memory_region_init_alias(nodemem, NULL, ramName, machine->ram, | ||
| 69 | - offset, numa_info[i].node_mem); | ||
| 70 | - memory_region_add_subregion(address_space_mem, phyAddr, nodemem); | ||
| 71 | - offset += numa_info[i].node_mem; | ||
| 72 | - phyAddr += numa_info[i].node_mem; | ||
| 73 | + | ||
| 74 | + memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", | ||
| 75 | + machine->ram, base, size); | ||
| 76 | + memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); | ||
| 77 | + base += size; | ||
| 78 | + if (ram_size - size) { | ||
| 79 | + base = VIRT_HIGHMEM_BASE; | ||
| 80 | + memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", | ||
| 81 | + machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); | ||
| 82 | + memory_region_add_subregion(address_space_mem, base, &lvms->highmem); | ||
| 83 | + base += ram_size - size; | ||
| 84 | } | ||
| 85 | |||
| 86 | /* initialize device memory address space */ | ||
| 87 | if (machine->ram_size < machine->maxram_size) { | ||
| 88 | ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; | ||
| 89 | - hwaddr device_mem_base; | ||
| 90 | |||
| 91 | if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { | ||
| 92 | error_report("unsupported amount of memory slots: %"PRIu64, | ||
| 93 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 94 | "%d bytes", TARGET_PAGE_SIZE); | ||
| 95 | exit(EXIT_FAILURE); | ||
| 96 | } | ||
| 97 | - /* device memory base is the top of high memory address. */ | ||
| 98 | - device_mem_base = ROUND_UP(VIRT_HIGHMEM_BASE + highram_size, 1 * GiB); | ||
| 99 | - machine_memory_devices_init(machine, device_mem_base, device_mem_size); | ||
| 100 | + machine_memory_devices_init(machine, base, device_mem_size); | ||
| 101 | } | ||
| 102 | |||
| 103 | /* load the BIOS image. */ | ||
| 104 | -- | 135 | -- |
| 105 | 2.34.1 | 136 | 2.43.5 | diff view generated by jsdifflib |
| 1 | vmstate does not save kvm_state_conter, | 1 | Add common header file include/hw/intc/loongarch_extioi_common.h, and |
|---|---|---|---|
| 2 | which can cause VM recovery from disk to fail. | 2 | move some macro definition from include/hw/intc/loongarch_extioi.h to |
| 3 | the common header file. | ||
| 3 | 4 | ||
| 4 | Cc: qemu-stable@nongnu.org | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 5 | Signed-off-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 6 | Acked-by: Peter Xu <peterx@redhat.com> | ||
| 7 | Message-Id: <20240508024732.3127792-1-gaosong@loongson.cn> | ||
| 8 | --- | 7 | --- |
| 9 | target/loongarch/machine.c | 6 ++++-- | 8 | include/hw/intc/loongarch_extioi.h | 50 +------------------ |
| 10 | 1 file changed, 4 insertions(+), 2 deletions(-) | 9 | include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++ |
| 10 | 2 files changed, 59 insertions(+), 49 deletions(-) | ||
| 11 | create mode 100644 include/hw/intc/loongarch_extioi_common.h | ||
| 11 | 12 | ||
| 12 | diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c | 13 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h |
| 13 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
| 14 | --- a/target/loongarch/machine.c | 15 | --- a/include/hw/intc/loongarch_extioi.h |
| 15 | +++ b/target/loongarch/machine.c | 16 | +++ b/include/hw/intc/loongarch_extioi.h |
| 16 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = { | 17 | @@ -XXX,XX +XXX,XX @@ |
| 17 | /* LoongArch CPU state */ | 18 | * Copyright (C) 2021 Loongson Technology Corporation Limited |
| 18 | const VMStateDescription vmstate_loongarch_cpu = { | 19 | */ |
| 19 | .name = "cpu", | 20 | |
| 20 | - .version_id = 1, | 21 | -#include "hw/sysbus.h" |
| 21 | - .minimum_version_id = 1, | 22 | -#include "hw/loongarch/virt.h" |
| 22 | + .version_id = 2, | 23 | - |
| 23 | + .minimum_version_id = 2, | 24 | #ifndef LOONGARCH_EXTIOI_H |
| 24 | .fields = (const VMStateField[]) { | 25 | #define LOONGARCH_EXTIOI_H |
| 25 | VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32), | 26 | |
| 26 | VMSTATE_UINTTL(env.pc, LoongArchCPU), | 27 | -#define LS3A_INTC_IP 8 |
| 27 | @@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = { | 28 | -#define EXTIOI_IRQS (256) |
| 28 | VMSTATE_UINT64(env.CSR_DERA, LoongArchCPU), | 29 | -#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) |
| 29 | VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU), | 30 | -/* irq from EXTIOI is routed to no more than 4 cpus */ |
| 30 | 31 | -#define EXTIOI_CPUS (4) | |
| 31 | + VMSTATE_UINT64(kvm_state_counter, LoongArchCPU), | 32 | -/* map to ipnum per 32 irqs */ |
| 33 | -#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
| 34 | -#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
| 35 | -#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
| 36 | -#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
| 37 | - | ||
| 38 | -#define APIC_OFFSET 0x400 | ||
| 39 | -#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
| 40 | - | ||
| 41 | -#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
| 42 | -#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
| 43 | -#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
| 44 | -#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
| 45 | -#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
| 46 | -#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
| 47 | -#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
| 48 | -#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
| 49 | -#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
| 50 | -#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
| 51 | -#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
| 52 | -#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
| 53 | -#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
| 54 | -#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
| 55 | -#define EXTIOI_SIZE 0x800 | ||
| 56 | - | ||
| 57 | -#define EXTIOI_VIRT_BASE (0x40000000) | ||
| 58 | -#define EXTIOI_VIRT_SIZE (0x1000) | ||
| 59 | -#define EXTIOI_VIRT_FEATURES (0x0) | ||
| 60 | -#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
| 61 | -#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
| 62 | -#define EXTIOI_HAS_INT_ENCODE (2) | ||
| 63 | -#define EXTIOI_HAS_CPU_ENCODE (3) | ||
| 64 | -#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
| 65 | - | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
| 66 | - | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
| 67 | -#define EXTIOI_VIRT_CONFIG (0x4) | ||
| 68 | -#define EXTIOI_ENABLE (1) | ||
| 69 | -#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
| 70 | -#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
| 71 | -#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
| 72 | -#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
| 73 | +#include "hw/intc/loongarch_extioi_common.h" | ||
| 74 | |||
| 75 | typedef struct ExtIOICore { | ||
| 76 | uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
| 77 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
| 78 | new file mode 100644 | ||
| 79 | index XXXXXXX..XXXXXXX | ||
| 80 | --- /dev/null | ||
| 81 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
| 82 | @@ -XXX,XX +XXX,XX @@ | ||
| 83 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
| 84 | +/* | ||
| 85 | + * LoongArch 3A5000 ext interrupt controller definitions | ||
| 86 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
| 87 | + */ | ||
| 32 | + | 88 | + |
| 33 | VMSTATE_END_OF_LIST() | 89 | +#ifndef LOONGARCH_EXTIOI_COMMON_H |
| 34 | }, | 90 | +#define LOONGARCH_EXTIOI_COMMON_H |
| 35 | .subsections = (const VMStateDescription * const []) { | 91 | + |
| 92 | +#include "hw/sysbus.h" | ||
| 93 | +#include "hw/loongarch/virt.h" | ||
| 94 | + | ||
| 95 | +#define LS3A_INTC_IP 8 | ||
| 96 | +#define EXTIOI_IRQS (256) | ||
| 97 | +#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) | ||
| 98 | +/* irq from EXTIOI is routed to no more than 4 cpus */ | ||
| 99 | +#define EXTIOI_CPUS (4) | ||
| 100 | +/* map to ipnum per 32 irqs */ | ||
| 101 | +#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
| 102 | +#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
| 103 | +#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
| 104 | +#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
| 105 | + | ||
| 106 | +#define APIC_OFFSET 0x400 | ||
| 107 | +#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
| 108 | +#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
| 109 | +#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
| 110 | +#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
| 111 | +#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
| 112 | +#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
| 113 | +#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
| 114 | +#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
| 115 | +#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
| 116 | +#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
| 117 | +#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
| 118 | +#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
| 119 | +#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
| 120 | +#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
| 121 | +#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
| 122 | +#define EXTIOI_SIZE 0x800 | ||
| 123 | + | ||
| 124 | +#define EXTIOI_VIRT_BASE (0x40000000) | ||
| 125 | +#define EXTIOI_VIRT_SIZE (0x1000) | ||
| 126 | +#define EXTIOI_VIRT_FEATURES (0x0) | ||
| 127 | +#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
| 128 | +#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
| 129 | +#define EXTIOI_HAS_INT_ENCODE (2) | ||
| 130 | +#define EXTIOI_HAS_CPU_ENCODE (3) | ||
| 131 | +#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
| 132 | + | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
| 133 | + | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
| 134 | +#define EXTIOI_VIRT_CONFIG (0x4) | ||
| 135 | +#define EXTIOI_ENABLE (1) | ||
| 136 | +#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
| 137 | +#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
| 138 | +#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
| 139 | +#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
| 140 | +#endif /* LOONGARCH_EXTIOI_H */ | ||
| 36 | -- | 141 | -- |
| 37 | 2.34.1 | 142 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h |
|---|---|---|---|
| 2 | 2 | to file loongarch_extioi_common.h. | |
| 3 | If VM runs in kvm mode, VM mode is added in IOCSR feature register. | ||
| 4 | So guest can detect kvm hypervisor type and enable possible pv functions. | ||
| 5 | 3 | ||
| 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 7 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 5 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 8 | Message-Id: <20240514025109.3238398-1-maobibo@loongson.cn> | ||
| 9 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 10 | --- | 6 | --- |
| 11 | hw/loongarch/virt.c | 12 +++++++++--- | 7 | include/hw/intc/loongarch_extioi.h | 26 ---------------------- |
| 12 | 1 file changed, 9 insertions(+), 3 deletions(-) | 8 | include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++ |
| 9 | 2 files changed, 27 insertions(+), 26 deletions(-) | ||
| 13 | 10 | ||
| 14 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h |
| 15 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 16 | --- a/hw/loongarch/virt.c | 13 | --- a/include/hw/intc/loongarch_extioi.h |
| 17 | +++ b/hw/loongarch/virt.c | 14 | +++ b/include/hw/intc/loongarch_extioi.h |
| 18 | @@ -XXX,XX +XXX,XX @@ | 15 | @@ -XXX,XX +XXX,XX @@ |
| 19 | #include "qapi/error.h" | 16 | |
| 20 | #include "hw/boards.h" | 17 | #include "hw/intc/loongarch_extioi_common.h" |
| 21 | #include "hw/char/serial.h" | 18 | |
| 22 | +#include "sysemu/kvm.h" | 19 | -typedef struct ExtIOICore { |
| 23 | #include "sysemu/sysemu.h" | 20 | - uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; |
| 24 | #include "sysemu/qtest.h" | 21 | - DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); |
| 25 | #include "sysemu/runstate.h" | 22 | - qemu_irq parent_irq[LS3A_INTC_IP]; |
| 26 | @@ -XXX,XX +XXX,XX @@ static void virt_iocsr_misc_write(void *opaque, hwaddr addr, | 23 | -} ExtIOICore; |
| 27 | 24 | - | |
| 28 | static uint64_t virt_iocsr_misc_read(void *opaque, hwaddr addr, unsigned size) | 25 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" |
| 29 | { | 26 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) |
| 30 | + uint64_t ret; | 27 | -struct LoongArchExtIOI { |
| 28 | - SysBusDevice parent_obj; | ||
| 29 | - uint32_t num_cpu; | ||
| 30 | - uint32_t features; | ||
| 31 | - uint32_t status; | ||
| 32 | - /* hardware state */ | ||
| 33 | - uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
| 34 | - uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
| 35 | - uint32_t isr[EXTIOI_IRQS / 32]; | ||
| 36 | - uint32_t enable[EXTIOI_IRQS / 32]; | ||
| 37 | - uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; | ||
| 38 | - uint32_t coremap[EXTIOI_IRQS / 4]; | ||
| 39 | - uint32_t sw_pending[EXTIOI_IRQS / 32]; | ||
| 40 | - uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; | ||
| 41 | - uint8_t sw_coremap[EXTIOI_IRQS]; | ||
| 42 | - qemu_irq irq[EXTIOI_IRQS]; | ||
| 43 | - ExtIOICore *cpu; | ||
| 44 | - MemoryRegion extioi_system_mem; | ||
| 45 | - MemoryRegion virt_extend; | ||
| 46 | -}; | ||
| 47 | #endif /* LOONGARCH_EXTIOI_H */ | ||
| 48 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
| 49 | index XXXXXXX..XXXXXXX 100644 | ||
| 50 | --- a/include/hw/intc/loongarch_extioi_common.h | ||
| 51 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
| 52 | @@ -XXX,XX +XXX,XX @@ | ||
| 53 | #define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
| 54 | #define EXTIOI_VIRT_COREMAP_START (0x40) | ||
| 55 | #define EXTIOI_VIRT_COREMAP_END (0x240) | ||
| 31 | + | 56 | + |
| 32 | switch (addr) { | 57 | +typedef struct ExtIOICore { |
| 33 | case VERSION_REG: | 58 | + uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; |
| 34 | return 0x11ULL; | 59 | + DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); |
| 35 | case FEATURE_REG: | 60 | + qemu_irq parent_irq[LS3A_INTC_IP]; |
| 36 | - return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI | | 61 | +} ExtIOICore; |
| 37 | - 1ULL << IOCSRF_CSRIPI; | 62 | + |
| 38 | + ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); | 63 | +struct LoongArchExtIOI { |
| 39 | + if (kvm_enabled()) { | 64 | + SysBusDevice parent_obj; |
| 40 | + ret |= BIT(IOCSRF_VM); | 65 | + uint32_t num_cpu; |
| 41 | + } | 66 | + uint32_t features; |
| 42 | + return ret; | 67 | + uint32_t status; |
| 43 | case VENDOR_REG: | 68 | + /* hardware state */ |
| 44 | return 0x6e6f73676e6f6f4cULL; /* "Loongson" */ | 69 | + uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; |
| 45 | case CPUNAME_REG: | 70 | + uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; |
| 46 | return 0x303030354133ULL; /* "3A5000" */ | 71 | + uint32_t isr[EXTIOI_IRQS / 32]; |
| 47 | case MISC_FUNC_REG: | 72 | + uint32_t enable[EXTIOI_IRQS / 32]; |
| 48 | - return 1ULL << IOCSRM_EXTIOI_EN; | 73 | + uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; |
| 49 | + return BIT_ULL(IOCSRM_EXTIOI_EN); | 74 | + uint32_t coremap[EXTIOI_IRQS / 4]; |
| 50 | } | 75 | + uint32_t sw_pending[EXTIOI_IRQS / 32]; |
| 51 | return 0ULL; | 76 | + uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; |
| 52 | } | 77 | + uint8_t sw_coremap[EXTIOI_IRQS]; |
| 78 | + qemu_irq irq[EXTIOI_IRQS]; | ||
| 79 | + ExtIOICore *cpu; | ||
| 80 | + MemoryRegion extioi_system_mem; | ||
| 81 | + MemoryRegion virt_extend; | ||
| 82 | +}; | ||
| 83 | #endif /* LOONGARCH_EXTIOI_H */ | ||
| 53 | -- | 84 | -- |
| 54 | 2.34.1 | 85 | 2.43.5 | diff view generated by jsdifflib |
| 1 | On kvm side, get_fpu/set_fpu save the vreg registers high 192bits, | 1 | Rename structure LoongArchExtIOI with LoongArchExtIOICommonState, |
|---|---|---|---|
| 2 | but QEMU missing. | 2 | since it is defined in file loongarch_extioi_common.h |
| 3 | 3 | ||
| 4 | Cc: qemu-stable@nongnu.org | 4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 5 | Signed-off-by: Song Gao <gaosong@loongson.cn> | 5 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
| 7 | Message-Id: <20240514110752.989572-1-gaosong@loongson.cn> | ||
| 8 | --- | 6 | --- |
| 9 | target/loongarch/kvm/kvm.c | 6 ++++++ | 7 | include/hw/intc/loongarch_extioi.h | 1 + |
| 10 | 1 file changed, 6 insertions(+) | 8 | include/hw/intc/loongarch_extioi_common.h | 2 +- |
| 9 | 2 files changed, 2 insertions(+), 1 deletion(-) | ||
| 11 | 10 | ||
| 12 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | 11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h |
| 13 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 14 | --- a/target/loongarch/kvm/kvm.c | 13 | --- a/include/hw/intc/loongarch_extioi.h |
| 15 | +++ b/target/loongarch/kvm/kvm.c | 14 | +++ b/include/hw/intc/loongarch_extioi.h |
| 16 | @@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_get_regs_fp(CPUState *cs) | 15 | @@ -XXX,XX +XXX,XX @@ |
| 17 | env->fcsr0 = fpu.fcsr; | 16 | |
| 18 | for (i = 0; i < 32; i++) { | 17 | #include "hw/intc/loongarch_extioi_common.h" |
| 19 | env->fpr[i].vreg.UD[0] = fpu.fpr[i].val64[0]; | 18 | |
| 20 | + env->fpr[i].vreg.UD[1] = fpu.fpr[i].val64[1]; | 19 | +#define LoongArchExtIOI LoongArchExtIOICommonState |
| 21 | + env->fpr[i].vreg.UD[2] = fpu.fpr[i].val64[2]; | 20 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" |
| 22 | + env->fpr[i].vreg.UD[3] = fpu.fpr[i].val64[3]; | 21 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) |
| 23 | } | 22 | #endif /* LOONGARCH_EXTIOI_H */ |
| 24 | for (i = 0; i < 8; i++) { | 23 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h |
| 25 | env->cf[i] = fpu.fcc & 0xFF; | 24 | index XXXXXXX..XXXXXXX 100644 |
| 26 | @@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs) | 25 | --- a/include/hw/intc/loongarch_extioi_common.h |
| 27 | fpu.fcc = 0; | 26 | +++ b/include/hw/intc/loongarch_extioi_common.h |
| 28 | for (i = 0; i < 32; i++) { | 27 | @@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore { |
| 29 | fpu.fpr[i].val64[0] = env->fpr[i].vreg.UD[0]; | 28 | qemu_irq parent_irq[LS3A_INTC_IP]; |
| 30 | + fpu.fpr[i].val64[1] = env->fpr[i].vreg.UD[1]; | 29 | } ExtIOICore; |
| 31 | + fpu.fpr[i].val64[2] = env->fpr[i].vreg.UD[2]; | 30 | |
| 32 | + fpu.fpr[i].val64[3] = env->fpr[i].vreg.UD[3]; | 31 | -struct LoongArchExtIOI { |
| 33 | } | 32 | +struct LoongArchExtIOICommonState { |
| 34 | 33 | SysBusDevice parent_obj; | |
| 35 | for (i = 0; i < 8; i++) { | 34 | uint32_t num_cpu; |
| 35 | uint32_t features; | ||
| 36 | -- | 36 | -- |
| 37 | 2.34.1 | 37 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | With some structure such as vmstate and property, rename LoongArchExtIOI |
|---|---|---|---|
| 2 | 2 | with LoongArchExtIOICommonState, these common structure will be moved | |
| 3 | One LoongArch virt machine platform, there is limitation for memory | 3 | to common file. |
| 4 | map information. The minimum memory size is 256M and minimum memory | ||
| 5 | size for numa node0 is 256M also. With qemu numa qtest, it is possible | ||
| 6 | that memory size of numa node0 is 128M. | ||
| 7 | |||
| 8 | Limitations for minimum memory size for both total memory and numa | ||
| 9 | node0 is removed for acpi srat table creation. | ||
| 10 | 4 | ||
| 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 12 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 13 | Message-Id: <20240515093927.3453674-2-maobibo@loongson.cn> | ||
| 14 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 15 | --- | 7 | --- |
| 16 | hw/loongarch/acpi-build.c | 58 +++++++++++++++++++++++---------------- | 8 | hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++--------------- |
| 17 | 1 file changed, 34 insertions(+), 24 deletions(-) | 9 | 1 file changed, 25 insertions(+), 16 deletions(-) |
| 18 | 10 | ||
| 19 | diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c | 11 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c |
| 20 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 21 | --- a/hw/loongarch/acpi-build.c | 13 | --- a/hw/intc/loongarch_extioi.c |
| 22 | +++ b/hw/loongarch/acpi-build.c | 14 | +++ b/hw/intc/loongarch_extioi.c |
| 23 | @@ -XXX,XX +XXX,XX @@ static void | 15 | @@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id) |
| 24 | build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) | 16 | return 0; |
| 25 | { | 17 | } |
| 26 | int i, arch_id, node_id; | 18 | |
| 27 | - uint64_t mem_len, mem_base; | 19 | +static int loongarch_extioi_common_post_load(void *opaque, int version_id) |
| 28 | - int nb_numa_nodes = machine->numa_state->num_nodes; | 20 | +{ |
| 29 | + hwaddr len, base, gap; | 21 | + return vmstate_extioi_post_load(opaque, version_id); |
| 30 | + NodeInfo *numa_info; | 22 | +} |
| 31 | + int nodes, nb_numa_nodes = machine->numa_state->num_nodes; | 23 | + |
| 32 | LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); | 24 | static const VMStateDescription vmstate_extioi_core = { |
| 33 | MachineClass *mc = MACHINE_GET_CLASS(lvms); | 25 | .name = "extioi-core", |
| 34 | const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); | 26 | .version_id = 1, |
| 35 | @@ -XXX,XX +XXX,XX @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) | 27 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = { |
| 36 | build_append_int_noprefix(table_data, 0, 4); /* Reserved */ | 28 | }; |
| 29 | |||
| 30 | static const VMStateDescription vmstate_loongarch_extioi = { | ||
| 31 | - .name = TYPE_LOONGARCH_EXTIOI, | ||
| 32 | + .name = "loongarch.extioi", | ||
| 33 | .version_id = 3, | ||
| 34 | .minimum_version_id = 3, | ||
| 35 | - .post_load = vmstate_extioi_post_load, | ||
| 36 | + .post_load = loongarch_extioi_common_post_load, | ||
| 37 | .fields = (const VMStateField[]) { | ||
| 38 | - VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT), | ||
| 39 | - VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI, | ||
| 40 | + VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState, | ||
| 41 | + EXTIOI_IRQS_GROUP_COUNT), | ||
| 42 | + VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState, | ||
| 43 | EXTIOI_IRQS_NODETYPE_COUNT / 2), | ||
| 44 | - VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
| 45 | - VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
| 46 | - VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
| 47 | - VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4), | ||
| 48 | - | ||
| 49 | - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu, | ||
| 50 | - vmstate_extioi_core, ExtIOICore), | ||
| 51 | - VMSTATE_UINT32(features, LoongArchExtIOI), | ||
| 52 | - VMSTATE_UINT32(status, LoongArchExtIOI), | ||
| 53 | + VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState, | ||
| 54 | + EXTIOI_IRQS / 32), | ||
| 55 | + VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState, | ||
| 56 | + EXTIOI_IRQS / 32), | ||
| 57 | + VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState, | ||
| 58 | + EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
| 59 | + VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState, | ||
| 60 | + EXTIOI_IRQS / 4), | ||
| 61 | + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState, | ||
| 62 | + num_cpu, vmstate_extioi_core, ExtIOICore), | ||
| 63 | + VMSTATE_UINT32(features, LoongArchExtIOICommonState), | ||
| 64 | + VMSTATE_UINT32(status, LoongArchExtIOICommonState), | ||
| 65 | VMSTATE_END_OF_LIST() | ||
| 37 | } | 66 | } |
| 38 | 67 | }; | |
| 39 | - /* Node0 */ | 68 | |
| 40 | - build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, | 69 | static Property extioi_properties[] = { |
| 41 | - 0, MEM_AFFINITY_ENABLED); | 70 | - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1), |
| 42 | - mem_base = VIRT_HIGHMEM_BASE; | 71 | - DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features, |
| 43 | - if (!nb_numa_nodes) { | 72 | - EXTIOI_HAS_VIRT_EXTENSION, 0), |
| 44 | - mem_len = machine->ram_size - VIRT_LOWMEM_SIZE; | 73 | + DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), |
| 45 | - } else { | 74 | + DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, |
| 46 | - mem_len = machine->numa_state->nodes[0].node_mem - VIRT_LOWMEM_SIZE; | 75 | + features, EXTIOI_HAS_VIRT_EXTENSION, 0), |
| 47 | + base = VIRT_LOWMEM_BASE; | 76 | DEFINE_PROP_END_OF_LIST(), |
| 48 | + gap = VIRT_LOWMEM_SIZE; | 77 | }; |
| 49 | + numa_info = machine->numa_state->nodes; | ||
| 50 | + nodes = nb_numa_nodes; | ||
| 51 | + if (!nodes) { | ||
| 52 | + nodes = 1; | ||
| 53 | } | ||
| 54 | - if (mem_len) | ||
| 55 | - build_srat_memory(table_data, mem_base, mem_len, 0, MEM_AFFINITY_ENABLED); | ||
| 56 | - | ||
| 57 | - /* Node1 - Nodemax */ | ||
| 58 | - if (nb_numa_nodes) { | ||
| 59 | - mem_base += mem_len; | ||
| 60 | - for (i = 1; i < nb_numa_nodes; ++i) { | ||
| 61 | - if (machine->numa_state->nodes[i].node_mem > 0) { | ||
| 62 | - build_srat_memory(table_data, mem_base, | ||
| 63 | - machine->numa_state->nodes[i].node_mem, i, | ||
| 64 | - MEM_AFFINITY_ENABLED); | ||
| 65 | - mem_base += machine->numa_state->nodes[i].node_mem; | ||
| 66 | - } | ||
| 67 | + | ||
| 68 | + for (i = 0; i < nodes; i++) { | ||
| 69 | + if (nb_numa_nodes) { | ||
| 70 | + len = numa_info[i].node_mem; | ||
| 71 | + } else { | ||
| 72 | + len = machine->ram_size; | ||
| 73 | + } | ||
| 74 | + | ||
| 75 | + /* | ||
| 76 | + * memory for the node splited into two part | ||
| 77 | + * lowram: [base, +gap) | ||
| 78 | + * highram: [VIRT_HIGHMEM_BASE, +(len - gap)) | ||
| 79 | + */ | ||
| 80 | + if (len >= gap) { | ||
| 81 | + build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED); | ||
| 82 | + len -= gap; | ||
| 83 | + base = VIRT_HIGHMEM_BASE; | ||
| 84 | + gap = machine->ram_size - VIRT_LOWMEM_SIZE; | ||
| 85 | + } | ||
| 86 | + | ||
| 87 | + if (len) { | ||
| 88 | + build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED); | ||
| 89 | + base += len; | ||
| 90 | + gap -= len; | ||
| 91 | } | ||
| 92 | } | ||
| 93 | |||
| 94 | if (machine->device_memory) { | ||
| 95 | build_srat_memory(table_data, machine->device_memory->base, | ||
| 96 | memory_region_size(&machine->device_memory->mr), | ||
| 97 | - nb_numa_nodes - 1, | ||
| 98 | + nodes - 1, | ||
| 99 | MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED); | ||
| 100 | } | ||
| 101 | 78 | ||
| 102 | -- | 79 | -- |
| 103 | 2.34.1 | 80 | 2.43.5 | diff view generated by jsdifflib |