Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Thanks,
Glenn
On Tue, 2024-05-21 at 11:30 +1000, Nicholas Piggin wrote:
> LDBAR, TTR are a Power-specific SPRs. These simple implementations
> are enough for IBM proprietary firmware for now.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/cpu.h | 2 ++
> target/ppc/cpu_init.c | 10 ++++++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 141cbefb4c..823be85d03 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2098,6 +2098,7 @@ void ppc_compat_add_property(Object *obj, const
> char *name,
> #define SPR_DEXCR (0x33C)
> #define SPR_IC (0x350)
> #define SPR_VTB (0x351)
> +#define SPR_LDBAR (0x352)
> #define SPR_MMCRC (0x353)
> #define SPR_PSSCR (0x357)
> #define SPR_440_INV0 (0x370)
> @@ -2144,6 +2145,7 @@ void ppc_compat_add_property(Object *obj, const
> char *name,
> #define SPR_440_IVLIM (0x399)
> #define SPR_TSCR (0x399)
> #define SPR_750_DMAU (0x39A)
> +#define SPR_POWER_TTR (0x39A)
> #define SPR_750_DMAL (0x39B)
> #define SPR_440_RSTCFG (0x39B)
> #define SPR_BOOKE_DCDBTRL (0x39C)
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 023b58a3ac..7f2f8e5a4a 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -5784,6 +5784,16 @@ static void
> register_power_common_book4_sprs(CPUPPCState *env)
> &spr_access_nop, &spr_write_generic,
> &spr_access_nop, &spr_write_generic,
> 0x00000000);
> + spr_register_hv(env, SPR_LDBAR, "LDBAR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_core_lpar_write_generic,
> + 0x00000000);
> + spr_register_hv(env, SPR_POWER_TTR, "TTR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_core_write_generic,
> + 0x00000000);
> #endif
> }
>