1
The following changes since commit 3d48b6b687c558a042d91370633b91c6e29e0e05:
1
Pretty small still, but there are two patches that ought
2
to get backported to stable, so no point in delaying.
2
3
3
Merge tag 'pull-request-2024-05-14' of https://gitlab.com/thuth/qemu into staging (2024-05-14 17:24:04 +0200)
4
r~
5
6
The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
7
8
Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
4
9
5
are available in the Git repository at:
10
are available in the Git repository at:
6
11
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240515
12
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212
8
13
9
for you to fetch changes up to c9290dfebfdba5c13baa5e1f10e13a1c876b0643:
14
for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:
10
15
11
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs (2024-05-15 08:57:39 +0200)
16
target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)
12
17
13
----------------------------------------------------------------
18
----------------------------------------------------------------
14
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs
19
tcg: Reset free_temps before tcg_optimize
15
accel/tcg: Improve disassembly for target and plugin
20
tcg/riscv: Fix StoreStore barrier generation
21
include/exec: Introduce fpst alias in helper-head.h.inc
22
target/sparc: Use memcpy() and remove memcpy32()
16
23
17
----------------------------------------------------------------
24
----------------------------------------------------------------
18
Philippe Mathieu-Daudé (1):
25
Philippe Mathieu-Daudé (1):
19
accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code
26
target/sparc: Use memcpy() and remove memcpy32()
20
27
21
Richard Henderson (33):
28
Richard Henderson (2):
22
accel/tcg: Use vaddr in translator_ld*
29
tcg: Reset free_temps before tcg_optimize
23
accel/tcg: Hide in_same_page outside of a target-specific context
30
include/exec: Introduce fpst alias in helper-head.h.inc
24
accel/tcg: Pass DisasContextBase to translator_fake_ldb
25
accel/tcg: Reorg translator_ld*
26
accel/tcg: Cap the translation block when we encounter mmio
27
accel/tcg: Record mmio bytes during translation
28
accel/tcg: Record when translator_fake_ldb is used
29
accel/tcg: Record DisasContextBase in tcg_ctx for plugins
30
plugins: Copy memory in qemu_plugin_insn_data
31
accel/tcg: Implement translator_st
32
plugins: Use translator_st for qemu_plugin_insn_data
33
plugins: Read mem_only directly from TB cflags
34
plugins: Use DisasContextBase for qemu_plugin_insn_haddr
35
plugins: Use DisasContextBase for qemu_plugin_tb_vaddr
36
plugins: Merge alloc_tcg_plugin_context into plugin_gen_tb_start
37
accel/tcg: Provide default implementation of disas_log
38
accel/tcg: Return bool from TranslatorOps.disas_log
39
disas: Split disas.c
40
disas: Use translator_st to get disassembly data
41
accel/tcg: Introduce translator_fake_ld
42
target/s390x: Fix translator_fake_ld length
43
target/s390x: Disassemble EXECUTEd instructions
44
target/hexagon: Use translator_ldl in pkt_crosses_page
45
target/microblaze: Use translator_ldl
46
target/i386: Use translator_ldub for everything
47
target/avr: Use translator_lduw
48
target/cris: Use translator_ld* in cris_fetch
49
target/cris: Use cris_fetch in translate_v10.c.inc
50
target/riscv: Use translator_ld* for everything
51
target/rx: Use translator_ld*
52
target/xtensa: Use translator_ldub in xtensa_insn_len
53
target/s390x: Use translator_lduw in get_next_pc
54
tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs
55
31
56
disas/disas-internal.h | 4 +
32
Roman Artemev (1):
57
include/disas/disas.h | 9 +-
33
tcg/riscv: Fix StoreStore barrier generation
58
include/exec/cpu_ldst.h | 10 --
59
include/exec/plugin-gen.h | 7 +-
60
include/exec/translator.h | 74 ++++++---
61
include/qemu/plugin.h | 22 +--
62
include/qemu/qemu-plugin.h | 15 +-
63
include/qemu/typedefs.h | 1 +
64
include/tcg/tcg.h | 1 +
65
accel/tcg/plugin-gen.c | 63 +++-----
66
accel/tcg/translator.c | 331 ++++++++++++++++++++++++--------------
67
contrib/plugins/execlog.c | 5 +-
68
contrib/plugins/howvec.c | 4 +-
69
disas/disas-common.c | 104 ++++++++++++
70
disas/disas-host.c | 129 +++++++++++++++
71
disas/disas-mon.c | 15 ++
72
disas/disas-target.c | 99 ++++++++++++
73
disas/disas.c | 338 ---------------------------------------
74
disas/objdump.c | 37 +++++
75
plugins/api.c | 57 +++++--
76
target/alpha/translate.c | 9 --
77
target/arm/tcg/translate-a64.c | 11 --
78
target/arm/tcg/translate.c | 12 --
79
target/avr/translate.c | 11 +-
80
target/cris/translate.c | 37 +----
81
target/hexagon/translate.c | 11 +-
82
target/hppa/translate.c | 21 ++-
83
target/i386/tcg/translate.c | 19 +--
84
target/loongarch/tcg/translate.c | 8 -
85
target/m68k/translate.c | 9 --
86
target/microblaze/translate.c | 11 +-
87
target/mips/tcg/translate.c | 9 --
88
target/openrisc/translate.c | 11 --
89
target/ppc/translate.c | 9 --
90
target/riscv/translate.c | 24 +--
91
target/rx/translate.c | 35 ++--
92
target/s390x/tcg/translate.c | 26 ++-
93
target/sh4/translate.c | 9 --
94
target/sparc/translate.c | 9 --
95
target/tricore/translate.c | 9 --
96
target/xtensa/translate.c | 12 +-
97
tcg/tcg.c | 12 --
98
target/cris/translate_v10.c.inc | 30 ++--
99
tcg/loongarch64/tcg-target.c.inc | 103 +++++++++---
100
disas/meson.build | 8 +-
101
45 files changed, 899 insertions(+), 891 deletions(-)
102
create mode 100644 disas/disas-common.c
103
create mode 100644 disas/disas-host.c
104
create mode 100644 disas/disas-target.c
105
delete mode 100644 disas/disas.c
106
create mode 100644 disas/objdump.c
107
34
35
include/tcg/tcg-temp-internal.h | 6 ++++++
36
accel/tcg/plugin-gen.c | 2 +-
37
target/sparc/win_helper.c | 26 ++++++++------------------
38
tcg/tcg.c | 5 ++++-
39
include/exec/helper-head.h.inc | 3 +++
40
tcg/riscv/tcg-target.c.inc | 2 +-
41
6 files changed, 23 insertions(+), 21 deletions(-)
42
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
include/exec/translator.h | 21 +++++++++------------
5
accel/tcg/translator.c | 15 ++++++++-------
6
target/hexagon/translate.c | 1 +
7
target/microblaze/translate.c | 1 +
8
4 files changed, 19 insertions(+), 19 deletions(-)
9
1
10
diff --git a/include/exec/translator.h b/include/exec/translator.h
11
index XXXXXXX..XXXXXXX 100644
12
--- a/include/exec/translator.h
13
+++ b/include/exec/translator.h
14
@@ -XXX,XX +XXX,XX @@
15
*/
16
17
#include "qemu/bswap.h"
18
-#include "exec/cpu-common.h"
19
-#include "exec/cpu-defs.h"
20
-#include "exec/abi_ptr.h"
21
-#include "cpu.h"
22
+#include "exec/vaddr.h"
23
24
/**
25
* gen_intermediate_code
26
@@ -XXX,XX +XXX,XX @@ bool translator_io_start(DisasContextBase *db);
27
* the relevant information at translation time.
28
*/
29
30
-uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
31
-uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
32
-uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
33
-uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
34
+uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc);
35
+uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc);
36
+uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc);
37
+uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc);
38
39
static inline uint16_t
40
translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
41
- abi_ptr pc, bool do_swap)
42
+ vaddr pc, bool do_swap)
43
{
44
uint16_t ret = translator_lduw(env, db, pc);
45
if (do_swap) {
46
@@ -XXX,XX +XXX,XX @@ translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
47
48
static inline uint32_t
49
translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
50
- abi_ptr pc, bool do_swap)
51
+ vaddr pc, bool do_swap)
52
{
53
uint32_t ret = translator_ldl(env, db, pc);
54
if (do_swap) {
55
@@ -XXX,XX +XXX,XX @@ translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
56
57
static inline uint64_t
58
translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
59
- abi_ptr pc, bool do_swap)
60
+ vaddr pc, bool do_swap)
61
{
62
uint64_t ret = translator_ldq(env, db, pc);
63
if (do_swap) {
64
@@ -XXX,XX +XXX,XX @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
65
* re-synthesised for s390x "ex"). It ensures we update other areas of
66
* the translator with details of the executed instruction.
67
*/
68
-void translator_fake_ldb(uint8_t insn8, abi_ptr pc);
69
+void translator_fake_ldb(uint8_t insn8, vaddr pc);
70
71
/*
72
* Return whether addr is on the same page as where disassembly started.
73
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
74
index XXXXXXX..XXXXXXX 100644
75
--- a/accel/tcg/translator.c
76
+++ b/accel/tcg/translator.c
77
@@ -XXX,XX +XXX,XX @@
78
#include "exec/translator.h"
79
#include "exec/cpu_ldst.h"
80
#include "exec/plugin-gen.h"
81
+#include "exec/cpu_ldst.h"
82
#include "tcg/tcg-op-common.h"
83
#include "internal-target.h"
84
85
@@ -XXX,XX +XXX,XX @@ static void *translator_access(CPUArchState *env, DisasContextBase *db,
86
return host + (pc - base);
87
}
88
89
-static void plugin_insn_append(abi_ptr pc, const void *from, size_t size)
90
+static void plugin_insn_append(vaddr pc, const void *from, size_t size)
91
{
92
#ifdef CONFIG_PLUGIN
93
struct qemu_plugin_insn *insn = tcg_ctx->plugin_insn;
94
- abi_ptr off;
95
+ size_t off;
96
97
if (insn == NULL) {
98
return;
99
@@ -XXX,XX +XXX,XX @@ static void plugin_insn_append(abi_ptr pc, const void *from, size_t size)
100
#endif
101
}
102
103
-uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
104
+uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
105
{
106
uint8_t ret;
107
void *p = translator_access(env, db, pc, sizeof(ret));
108
@@ -XXX,XX +XXX,XX @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
109
return ret;
110
}
111
112
-uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
113
+uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
114
{
115
uint16_t ret, plug;
116
void *p = translator_access(env, db, pc, sizeof(ret));
117
@@ -XXX,XX +XXX,XX @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
118
return ret;
119
}
120
121
-uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
122
+uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
123
{
124
uint32_t ret, plug;
125
void *p = translator_access(env, db, pc, sizeof(ret));
126
@@ -XXX,XX +XXX,XX @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
127
return ret;
128
}
129
130
-uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
131
+uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
132
{
133
uint64_t ret, plug;
134
void *p = translator_access(env, db, pc, sizeof(ret));
135
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
136
return ret;
137
}
138
139
-void translator_fake_ldb(uint8_t insn8, abi_ptr pc)
140
+void translator_fake_ldb(uint8_t insn8, vaddr pc)
141
{
142
plugin_insn_append(pc, &insn8, sizeof(insn8));
143
}
144
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
145
index XXXXXXX..XXXXXXX 100644
146
--- a/target/hexagon/translate.c
147
+++ b/target/hexagon/translate.c
148
@@ -XXX,XX +XXX,XX @@
149
#include "exec/translation-block.h"
150
#include "exec/cpu_ldst.h"
151
#include "exec/log.h"
152
+#include "exec/cpu_ldst.h"
153
#include "internal.h"
154
#include "attribs.h"
155
#include "insn.h"
156
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
157
index XXXXXXX..XXXXXXX 100644
158
--- a/target/microblaze/translate.c
159
+++ b/target/microblaze/translate.c
160
@@ -XXX,XX +XXX,XX @@
161
#include "tcg/tcg-op.h"
162
#include "exec/helper-proto.h"
163
#include "exec/helper-gen.h"
164
+#include "exec/cpu_ldst.h"
165
#include "exec/translator.h"
166
#include "qemu/qemu-print.h"
167
168
--
169
2.34.1
170
171
diff view generated by jsdifflib
Deleted patch
1
While there are other methods that could be used to replace
2
TARGET_PAGE_MASK, the function is not really required outside
3
the context of target-specific translation.
4
1
5
This makes the header usable by target independent code.
6
7
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
10
include/exec/translator.h | 2 ++
11
1 file changed, 2 insertions(+)
12
13
diff --git a/include/exec/translator.h b/include/exec/translator.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/exec/translator.h
16
+++ b/include/exec/translator.h
17
@@ -XXX,XX +XXX,XX @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
18
*/
19
void translator_fake_ldb(uint8_t insn8, vaddr pc);
20
21
+#ifdef COMPILING_PER_TARGET
22
/*
23
* Return whether addr is on the same page as where disassembly started.
24
* Translators can use this to enforce the rule that only single-insn
25
@@ -XXX,XX +XXX,XX @@ static inline bool is_same_page(const DisasContextBase *db, vaddr addr)
26
{
27
return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
28
}
29
+#endif
30
31
#endif /* EXEC__TRANSLATOR_H */
32
--
33
2.34.1
34
35
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
include/exec/translator.h | 5 +++--
5
accel/tcg/translator.c | 2 +-
6
target/s390x/tcg/translate.c | 2 +-
7
3 files changed, 5 insertions(+), 4 deletions(-)
8
1
9
diff --git a/include/exec/translator.h b/include/exec/translator.h
10
index XXXXXXX..XXXXXXX 100644
11
--- a/include/exec/translator.h
12
+++ b/include/exec/translator.h
13
@@ -XXX,XX +XXX,XX @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
14
15
/**
16
* translator_fake_ldb - fake instruction load
17
- * @insn8: byte of instruction
18
+ * @db: Disassembly context
19
* @pc: program counter of instruction
20
+ * @insn8: byte of instruction
21
*
22
* This is a special case helper used where the instruction we are
23
* about to translate comes from somewhere else (e.g. being
24
* re-synthesised for s390x "ex"). It ensures we update other areas of
25
* the translator with details of the executed instruction.
26
*/
27
-void translator_fake_ldb(uint8_t insn8, vaddr pc);
28
+void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8);
29
30
#ifdef COMPILING_PER_TARGET
31
/*
32
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
33
index XXXXXXX..XXXXXXX 100644
34
--- a/accel/tcg/translator.c
35
+++ b/accel/tcg/translator.c
36
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
37
return ret;
38
}
39
40
-void translator_fake_ldb(uint8_t insn8, vaddr pc)
41
+void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
42
{
43
plugin_insn_append(pc, &insn8, sizeof(insn8));
44
}
45
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
46
index XXXXXXX..XXXXXXX 100644
47
--- a/target/s390x/tcg/translate.c
48
+++ b/target/s390x/tcg/translate.c
49
@@ -XXX,XX +XXX,XX @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s)
50
/* Register insn bytes with translator so plugins work. */
51
for (int i = 0; i < ilen; i++) {
52
uint8_t byte = extract64(insn, 56 - (i * 8), 8);
53
- translator_fake_ldb(byte, pc + i);
54
+ translator_fake_ldb(&s->base, pc + i, byte);
55
}
56
op = insn >> 56;
57
} else {
58
--
59
2.34.1
60
61
diff view generated by jsdifflib
Deleted patch
1
Reorg translator_access into translator_ld, with a more
2
memcpy-ish interface. If both pages are in ram, do not
3
go through the caller's slow path.
4
1
5
Assert that the access is within the two pages that we are
6
prepared to protect, per TranslationBlock. Allow access
7
prior to pc_first, so long as it is within the first page.
8
9
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
accel/tcg/translator.c | 189 ++++++++++++++++++++++-------------------
13
1 file changed, 101 insertions(+), 88 deletions(-)
14
15
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/accel/tcg/translator.c
18
+++ b/accel/tcg/translator.c
19
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
20
}
21
}
22
23
-static void *translator_access(CPUArchState *env, DisasContextBase *db,
24
- vaddr pc, size_t len)
25
+static bool translator_ld(CPUArchState *env, DisasContextBase *db,
26
+ void *dest, vaddr pc, size_t len)
27
{
28
+ TranslationBlock *tb = db->tb;
29
+ vaddr last = pc + len - 1;
30
void *host;
31
- vaddr base, end;
32
- TranslationBlock *tb;
33
-
34
- tb = db->tb;
35
+ vaddr base;
36
37
/* Use slow path if first page is MMIO. */
38
if (unlikely(tb_page_addr0(tb) == -1)) {
39
- return NULL;
40
+ return false;
41
}
42
43
- end = pc + len - 1;
44
- if (likely(is_same_page(db, end))) {
45
- host = db->host_addr[0];
46
- base = db->pc_first;
47
- } else {
48
+ host = db->host_addr[0];
49
+ base = db->pc_first;
50
+
51
+ if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
52
+ /* Entire read is from the first page. */
53
+ memcpy(dest, host + (pc - base), len);
54
+ return true;
55
+ }
56
+
57
+ if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
58
+ /* Read begins on the first page and extends to the second. */
59
+ size_t len0 = -(pc | TARGET_PAGE_MASK);
60
+ memcpy(dest, host + (pc - base), len0);
61
+ pc += len0;
62
+ dest += len0;
63
+ len -= len0;
64
+ }
65
+
66
+ /*
67
+ * The read must conclude on the second page and not extend to a third.
68
+ *
69
+ * TODO: We could allow the two pages to be virtually discontiguous,
70
+ * since we already allow the two pages to be physically discontiguous.
71
+ * The only reasonable use case would be executing an insn at the end
72
+ * of the address space wrapping around to the beginning. For that,
73
+ * we would need to know the current width of the address space.
74
+ * In the meantime, assert.
75
+ */
76
+ base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
77
+ assert(((base ^ pc) & TARGET_PAGE_MASK) == 0);
78
+ assert(((base ^ last) & TARGET_PAGE_MASK) == 0);
79
+ host = db->host_addr[1];
80
+
81
+ if (host == NULL) {
82
+ tb_page_addr_t page0, old_page1, new_page1;
83
+
84
+ new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]);
85
+
86
+ /*
87
+ * If the second page is MMIO, treat as if the first page
88
+ * was MMIO as well, so that we do not cache the TB.
89
+ */
90
+ if (unlikely(new_page1 == -1)) {
91
+ tb_unlock_pages(tb);
92
+ tb_set_page_addr0(tb, -1);
93
+ return false;
94
+ }
95
+
96
+ /*
97
+ * If this is not the first time around, and page1 matches,
98
+ * then we already have the page locked. Alternately, we're
99
+ * not doing anything to prevent the PTE from changing, so
100
+ * we might wind up with a different page, requiring us to
101
+ * re-do the locking.
102
+ */
103
+ old_page1 = tb_page_addr1(tb);
104
+ if (likely(new_page1 != old_page1)) {
105
+ page0 = tb_page_addr0(tb);
106
+ if (unlikely(old_page1 != -1)) {
107
+ tb_unlock_page1(page0, old_page1);
108
+ }
109
+ tb_set_page_addr1(tb, new_page1);
110
+ tb_lock_page1(page0, new_page1);
111
+ }
112
host = db->host_addr[1];
113
- base = TARGET_PAGE_ALIGN(db->pc_first);
114
- if (host == NULL) {
115
- tb_page_addr_t page0, old_page1, new_page1;
116
-
117
- new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]);
118
-
119
- /*
120
- * If the second page is MMIO, treat as if the first page
121
- * was MMIO as well, so that we do not cache the TB.
122
- */
123
- if (unlikely(new_page1 == -1)) {
124
- tb_unlock_pages(tb);
125
- tb_set_page_addr0(tb, -1);
126
- return NULL;
127
- }
128
-
129
- /*
130
- * If this is not the first time around, and page1 matches,
131
- * then we already have the page locked. Alternately, we're
132
- * not doing anything to prevent the PTE from changing, so
133
- * we might wind up with a different page, requiring us to
134
- * re-do the locking.
135
- */
136
- old_page1 = tb_page_addr1(tb);
137
- if (likely(new_page1 != old_page1)) {
138
- page0 = tb_page_addr0(tb);
139
- if (unlikely(old_page1 != -1)) {
140
- tb_unlock_page1(page0, old_page1);
141
- }
142
- tb_set_page_addr1(tb, new_page1);
143
- tb_lock_page1(page0, new_page1);
144
- }
145
- host = db->host_addr[1];
146
- }
147
-
148
- /* Use slow path when crossing pages. */
149
- if (is_same_page(db, pc)) {
150
- return NULL;
151
- }
152
}
153
154
- tcg_debug_assert(pc >= base);
155
- return host + (pc - base);
156
+ memcpy(dest, host + (pc - base), len);
157
+ return true;
158
}
159
160
static void plugin_insn_append(vaddr pc, const void *from, size_t size)
161
@@ -XXX,XX +XXX,XX @@ static void plugin_insn_append(vaddr pc, const void *from, size_t size)
162
163
uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
164
{
165
- uint8_t ret;
166
- void *p = translator_access(env, db, pc, sizeof(ret));
167
+ uint8_t raw;
168
169
- if (p) {
170
- plugin_insn_append(pc, p, sizeof(ret));
171
- return ldub_p(p);
172
+ if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
173
+ raw = cpu_ldub_code(env, pc);
174
}
175
- ret = cpu_ldub_code(env, pc);
176
- plugin_insn_append(pc, &ret, sizeof(ret));
177
- return ret;
178
+ plugin_insn_append(pc, &raw, sizeof(raw));
179
+ return raw;
180
}
181
182
uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
183
{
184
- uint16_t ret, plug;
185
- void *p = translator_access(env, db, pc, sizeof(ret));
186
+ uint16_t raw, tgt;
187
188
- if (p) {
189
- plugin_insn_append(pc, p, sizeof(ret));
190
- return lduw_p(p);
191
+ if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
192
+ tgt = tswap16(raw);
193
+ } else {
194
+ tgt = cpu_lduw_code(env, pc);
195
+ raw = tswap16(tgt);
196
}
197
- ret = cpu_lduw_code(env, pc);
198
- plug = tswap16(ret);
199
- plugin_insn_append(pc, &plug, sizeof(ret));
200
- return ret;
201
+ plugin_insn_append(pc, &raw, sizeof(raw));
202
+ return tgt;
203
}
204
205
uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
206
{
207
- uint32_t ret, plug;
208
- void *p = translator_access(env, db, pc, sizeof(ret));
209
+ uint32_t raw, tgt;
210
211
- if (p) {
212
- plugin_insn_append(pc, p, sizeof(ret));
213
- return ldl_p(p);
214
+ if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
215
+ tgt = tswap32(raw);
216
+ } else {
217
+ tgt = cpu_ldl_code(env, pc);
218
+ raw = tswap32(tgt);
219
}
220
- ret = cpu_ldl_code(env, pc);
221
- plug = tswap32(ret);
222
- plugin_insn_append(pc, &plug, sizeof(ret));
223
- return ret;
224
+ plugin_insn_append(pc, &raw, sizeof(raw));
225
+ return tgt;
226
}
227
228
uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
229
{
230
- uint64_t ret, plug;
231
- void *p = translator_access(env, db, pc, sizeof(ret));
232
+ uint64_t raw, tgt;
233
234
- if (p) {
235
- plugin_insn_append(pc, p, sizeof(ret));
236
- return ldq_p(p);
237
+ if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
238
+ tgt = tswap64(raw);
239
+ } else {
240
+ tgt = cpu_ldq_code(env, pc);
241
+ raw = tswap64(tgt);
242
}
243
- ret = cpu_ldq_code(env, pc);
244
- plug = tswap64(ret);
245
- plugin_insn_append(pc, &plug, sizeof(ret));
246
- return ret;
247
+ plugin_insn_append(pc, &raw, sizeof(raw));
248
+ return tgt;
249
}
250
251
void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
252
--
253
2.34.1
254
255
diff view generated by jsdifflib
Deleted patch
1
Do not allow translation to proceed beyond one insn with mmio,
2
as we will not be caching the TranslationBlock.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
accel/tcg/translator.c | 4 ++++
8
1 file changed, 4 insertions(+)
9
10
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/accel/tcg/translator.c
13
+++ b/accel/tcg/translator.c
14
@@ -XXX,XX +XXX,XX @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
15
16
/* Use slow path if first page is MMIO. */
17
if (unlikely(tb_page_addr0(tb) == -1)) {
18
+ /* We capped translation with first page MMIO in tb_gen_code. */
19
+ tcg_debug_assert(db->max_insns == 1);
20
return false;
21
}
22
23
@@ -XXX,XX +XXX,XX @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
24
if (unlikely(new_page1 == -1)) {
25
tb_unlock_pages(tb);
26
tb_set_page_addr0(tb, -1);
27
+ /* Require that this be the final insn. */
28
+ db->max_insns = db->num_insns;
29
return false;
30
}
31
32
--
33
2.34.1
34
35
diff view generated by jsdifflib
1
We don't need to allocate plugin context at startup,
1
When allocating new temps during tcg_optmize, do not re-use
2
we can wait until we actually use it.
2
any EBB temps that were used within the TB. We do not have
3
any idea what span of the TB in which the temp was live.
3
4
5
Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
6
as well as replacing the equivalent in plugin_gen_inject and
7
tcg_func_start.
8
9
Cc: qemu-stable@nongnu.org
10
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
11
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
12
Reported-by: wannacu <wannacu2049@gmail.com>
13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
15
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
16
---
7
accel/tcg/plugin-gen.c | 36 ++++++++++++++++++++----------------
17
include/tcg/tcg-temp-internal.h | 6 ++++++
8
tcg/tcg.c | 11 -----------
18
accel/tcg/plugin-gen.c | 2 +-
9
2 files changed, 20 insertions(+), 27 deletions(-)
19
tcg/tcg.c | 5 ++++-
20
3 files changed, 11 insertions(+), 2 deletions(-)
10
21
22
diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
23
index XXXXXXX..XXXXXXX 100644
24
--- a/include/tcg/tcg-temp-internal.h
25
+++ b/include/tcg/tcg-temp-internal.h
26
@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
27
TCGv_ptr tcg_temp_ebb_new_ptr(void);
28
TCGv_i128 tcg_temp_ebb_new_i128(void);
29
30
+/* Forget all freed EBB temps, so that new allocations produce new temps. */
31
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
32
+{
33
+ memset(s->free_temps, 0, sizeof(s->free_temps));
34
+}
35
+
36
#endif /* TCG_TEMP_FREE_H */
11
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
37
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
12
index XXXXXXX..XXXXXXX 100644
38
index XXXXXXX..XXXXXXX 100644
13
--- a/accel/tcg/plugin-gen.c
39
--- a/accel/tcg/plugin-gen.c
14
+++ b/accel/tcg/plugin-gen.c
40
+++ b/accel/tcg/plugin-gen.c
15
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
41
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
16
42
* that might be live within the existing opcode stream.
17
bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db)
43
* The simplest solution is to release them all and create new.
18
{
44
*/
19
- bool ret = false;
45
- memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
20
+ struct qemu_plugin_tb *ptb;
46
+ tcg_temp_ebb_reset_freed(tcg_ctx);
21
47
22
- if (test_bit(QEMU_PLUGIN_EV_VCPU_TB_TRANS, cpu->plugin_state->event_mask)) {
48
QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
23
- struct qemu_plugin_tb *ptb = tcg_ctx->plugin_tb;
49
switch (op->opc) {
24
-
25
- /* reset callbacks */
26
- if (ptb->cbs) {
27
- g_array_set_size(ptb->cbs, 0);
28
- }
29
- ptb->n = 0;
30
-
31
- ret = true;
32
-
33
- ptb->mem_helper = false;
34
-
35
- tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
36
+ if (!test_bit(QEMU_PLUGIN_EV_VCPU_TB_TRANS,
37
+ cpu->plugin_state->event_mask)) {
38
+ return false;
39
}
40
41
tcg_ctx->plugin_db = db;
42
tcg_ctx->plugin_insn = NULL;
43
+ ptb = tcg_ctx->plugin_tb;
44
45
- return ret;
46
+ if (ptb) {
47
+ /* Reset callbacks */
48
+ if (ptb->cbs) {
49
+ g_array_set_size(ptb->cbs, 0);
50
+ }
51
+ ptb->n = 0;
52
+ ptb->mem_helper = false;
53
+ } else {
54
+ ptb = g_new0(struct qemu_plugin_tb, 1);
55
+ tcg_ctx->plugin_tb = ptb;
56
+ ptb->insns = g_ptr_array_new();
57
+ }
58
+
59
+ tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
60
+ return true;
61
}
62
63
void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db)
64
diff --git a/tcg/tcg.c b/tcg/tcg.c
50
diff --git a/tcg/tcg.c b/tcg/tcg.c
65
index XXXXXXX..XXXXXXX 100644
51
index XXXXXXX..XXXXXXX 100644
66
--- a/tcg/tcg.c
52
--- a/tcg/tcg.c
67
+++ b/tcg/tcg.c
53
+++ b/tcg/tcg.c
68
@@ -XXX,XX +XXX,XX @@ QEMU_BUILD_BUG_ON((int)(offsetof(CPUNegativeOffsetState, tlb.f[0]) -
54
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
69
< MIN_TLB_MASK_TABLE_OFS);
55
s->nb_temps = s->nb_globals;
56
57
/* No temps have been previously allocated for size or locality. */
58
- memset(s->free_temps, 0, sizeof(s->free_temps));
59
+ tcg_temp_ebb_reset_freed(s);
60
61
/* No constant temps have been previously allocated. */
62
for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
63
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
64
}
70
#endif
65
#endif
71
66
72
-static void alloc_tcg_plugin_context(TCGContext *s)
67
+ /* Do not reuse any EBB that may be allocated within the TB. */
73
-{
68
+ tcg_temp_ebb_reset_freed(s);
74
-#ifdef CONFIG_PLUGIN
69
+
75
- s->plugin_tb = g_new0(struct qemu_plugin_tb, 1);
70
tcg_optimize(s);
76
- s->plugin_tb->insns = g_ptr_array_new();
71
77
-#endif
72
reachable_code_pass(s);
78
-}
79
-
80
/*
81
* All TCG threads except the parent (i.e. the one that called tcg_context_init
82
* and registered the target's TCG globals) must register with this function
83
@@ -XXX,XX +XXX,XX @@ void tcg_register_thread(void)
84
qatomic_set(&tcg_ctxs[n], s);
85
86
if (n > 0) {
87
- alloc_tcg_plugin_context(s);
88
tcg_region_initial_alloc(s);
89
}
90
91
@@ -XXX,XX +XXX,XX @@ static void tcg_context_init(unsigned max_cpus)
92
indirect_reg_alloc_order[i] = tcg_target_reg_alloc_order[i];
93
}
94
95
- alloc_tcg_plugin_context(s);
96
-
97
tcg_ctx = s;
98
/*
99
* In user-mode we simply share the init context among threads, since we
100
--
73
--
101
2.34.1
74
2.43.0
102
75
103
76
diff view generated by jsdifflib
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
1
From: Roman Artemev <roman.artemev@syntacore.com>
2
3
On RISC-V to StoreStore barrier corresponds
4
`fence w, w` not `fence r, r`
5
6
Cc: qemu-stable@nongnu.org
7
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
10
Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
11
Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
13
---
4
target/s390x/tcg/translate.c | 3 +--
14
tcg/riscv/tcg-target.c.inc | 2 +-
5
1 file changed, 1 insertion(+), 2 deletions(-)
15
1 file changed, 1 insertion(+), 1 deletion(-)
6
16
7
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
17
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
8
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
9
--- a/target/s390x/tcg/translate.c
19
--- a/tcg/riscv/tcg-target.c.inc
10
+++ b/target/s390x/tcg/translate.c
20
+++ b/tcg/riscv/tcg-target.c.inc
11
@@ -XXX,XX +XXX,XX @@
21
@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
12
#include "tcg/tcg-op-gvec.h"
22
insn |= 0x02100000;
13
#include "qemu/log.h"
23
}
14
#include "qemu/host-utils.h"
24
if (a0 & TCG_MO_ST_ST) {
15
-#include "exec/cpu_ldst.h"
25
- insn |= 0x02200000;
16
#include "exec/helper-proto.h"
26
+ insn |= 0x01100000;
17
#include "exec/helper-gen.h"
27
}
18
28
tcg_out32(s, insn);
19
@@ -XXX,XX +XXX,XX @@ static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs)
20
static target_ulong get_next_pc(CPUS390XState *env, DisasContext *s,
21
uint64_t pc)
22
{
23
- uint64_t insn = cpu_lduw_code(env, pc);
24
+ uint64_t insn = translator_lduw(env, &s->base, pc);
25
26
return pc + get_ilen((insn >> 8) & 0xff);
27
}
29
}
28
--
30
--
29
2.34.1
31
2.43.0
30
31
diff view generated by jsdifflib
1
This will be able to replace plugin_insn_append, and will
1
This allows targets to declare that the helper requires a
2
be usable for disassembly.
2
float_status pointer and instead of a generic void pointer.
3
3
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
6
---
7
include/exec/translator.h | 12 ++++++++++++
7
include/exec/helper-head.h.inc | 3 +++
8
accel/tcg/translator.c | 41 +++++++++++++++++++++++++++++++++++++++
8
1 file changed, 3 insertions(+)
9
2 files changed, 53 insertions(+)
10
9
11
diff --git a/include/exec/translator.h b/include/exec/translator.h
10
diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
12
index XXXXXXX..XXXXXXX 100644
11
index XXXXXXX..XXXXXXX 100644
13
--- a/include/exec/translator.h
12
--- a/include/exec/helper-head.h.inc
14
+++ b/include/exec/translator.h
13
+++ b/include/exec/helper-head.h.inc
15
@@ -XXX,XX +XXX,XX @@ typedef struct DisasContextBase {
14
@@ -XXX,XX +XXX,XX @@
16
bool plugin_enabled;
15
#define dh_alias_ptr ptr
17
struct TCGOp *insn_start;
16
#define dh_alias_cptr ptr
18
void *host_addr[2];
17
#define dh_alias_env ptr
19
+
18
+#define dh_alias_fpst ptr
20
+ /*
19
#define dh_alias_void void
21
+ * Record insn data that we cannot read directly from host memory.
20
#define dh_alias_noreturn noreturn
22
+ * There are only two reasons we cannot use host memory:
21
#define dh_alias(t) glue(dh_alias_, t)
23
+ * (1) We are executing from I/O,
22
@@ -XXX,XX +XXX,XX @@
24
+ * (2) We are executing a synthetic instruction (s390x EX).
23
#define dh_ctype_ptr void *
25
+ * In both cases we need record exactly one instruction,
24
#define dh_ctype_cptr const void *
26
+ * and thus the maximum amount of data we record is limited.
25
#define dh_ctype_env CPUArchState *
27
+ */
26
+#define dh_ctype_fpst float_status *
28
+ int record_start;
27
#define dh_ctype_void void
29
+ int record_len;
28
#define dh_ctype_noreturn G_NORETURN void
30
+ uint8_t record[32];
29
#define dh_ctype(t) dh_ctype_##t
31
} DisasContextBase;
30
@@ -XXX,XX +XXX,XX @@
32
31
#define dh_typecode_f64 dh_typecode_i64
33
/**
32
#define dh_typecode_cptr dh_typecode_ptr
34
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
33
#define dh_typecode_env dh_typecode_ptr
35
index XXXXXXX..XXXXXXX 100644
34
+#define dh_typecode_fpst dh_typecode_ptr
36
--- a/accel/tcg/translator.c
35
#define dh_typecode(t) dh_typecode_##t
37
+++ b/accel/tcg/translator.c
36
38
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
37
#define dh_callflag_i32 0
39
db->insn_start = NULL;
40
db->host_addr[0] = host_pc;
41
db->host_addr[1] = NULL;
42
+ db->record_start = 0;
43
+ db->record_len = 0;
44
45
ops->init_disas_context(db, cpu);
46
tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
47
@@ -XXX,XX +XXX,XX @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
48
return true;
49
}
50
51
+static void record_save(DisasContextBase *db, vaddr pc,
52
+ const void *from, int size)
53
+{
54
+ int offset;
55
+
56
+ /* Do not record probes before the start of TB. */
57
+ if (pc < db->pc_first) {
58
+ return;
59
+ }
60
+
61
+ /*
62
+ * In translator_access, we verified that pc is within 2 pages
63
+ * of pc_first, thus this will never overflow.
64
+ */
65
+ offset = pc - db->pc_first;
66
+
67
+ /*
68
+ * Either the first or second page may be I/O. If it is the second,
69
+ * then the first byte we need to record will be at a non-zero offset.
70
+ * In either case, we should not need to record but a single insn.
71
+ */
72
+ if (db->record_len == 0) {
73
+ db->record_start = offset;
74
+ db->record_len = size;
75
+ } else {
76
+ assert(offset == db->record_start + db->record_len);
77
+ assert(db->record_len + size <= sizeof(db->record));
78
+ db->record_len += size;
79
+ }
80
+
81
+ memcpy(db->record + (offset - db->record_start), from, size);
82
+}
83
+
84
static void plugin_insn_append(vaddr pc, const void *from, size_t size)
85
{
86
#ifdef CONFIG_PLUGIN
87
@@ -XXX,XX +XXX,XX @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
88
89
if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
90
raw = cpu_ldub_code(env, pc);
91
+ record_save(db, pc, &raw, sizeof(raw));
92
}
93
plugin_insn_append(pc, &raw, sizeof(raw));
94
return raw;
95
@@ -XXX,XX +XXX,XX @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
96
} else {
97
tgt = cpu_lduw_code(env, pc);
98
raw = tswap16(tgt);
99
+ record_save(db, pc, &raw, sizeof(raw));
100
}
101
plugin_insn_append(pc, &raw, sizeof(raw));
102
return tgt;
103
@@ -XXX,XX +XXX,XX @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
104
} else {
105
tgt = cpu_ldl_code(env, pc);
106
raw = tswap32(tgt);
107
+ record_save(db, pc, &raw, sizeof(raw));
108
}
109
plugin_insn_append(pc, &raw, sizeof(raw));
110
return tgt;
111
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
112
} else {
113
tgt = cpu_ldq_code(env, pc);
114
raw = tswap64(tgt);
115
+ record_save(db, pc, &raw, sizeof(raw));
116
}
117
plugin_insn_append(pc, &raw, sizeof(raw));
118
return tgt;
119
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
120
121
void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
122
{
123
+ assert(pc >= db->pc_first);
124
+ record_save(db, pc, &insn8, sizeof(insn8));
125
plugin_insn_append(pc, &insn8, sizeof(insn8));
126
}
127
--
38
--
128
2.34.1
39
2.43.0
129
40
130
41
diff view generated by jsdifflib
Deleted patch
1
Remove left-over comment from commit dcd092a063
2
("accel/tcg: Improve can_do_io management").
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/translator.h | 3 ++-
8
accel/tcg/translator.c | 2 ++
9
2 files changed, 4 insertions(+), 1 deletion(-)
10
11
diff --git a/include/exec/translator.h b/include/exec/translator.h
12
index XXXXXXX..XXXXXXX 100644
13
--- a/include/exec/translator.h
14
+++ b/include/exec/translator.h
15
@@ -XXX,XX +XXX,XX @@ typedef enum DisasJumpType {
16
* @num_insns: Number of translated instructions (including current).
17
* @max_insns: Maximum number of instructions to be translated in this TB.
18
* @singlestep_enabled: "Hardware" single stepping enabled.
19
- * @saved_can_do_io: Known value of cpu->neg.can_do_io, or -1 for unknown.
20
* @plugin_enabled: TCG plugin enabled in this TB.
21
+ * @fake_insn: True if translator_fake_ldb used.
22
* @insn_start: The last op emitted by the insn_start hook,
23
* which is expected to be INDEX_op_insn_start.
24
*
25
@@ -XXX,XX +XXX,XX @@ typedef struct DisasContextBase {
26
int max_insns;
27
bool singlestep_enabled;
28
bool plugin_enabled;
29
+ bool fake_insn;
30
struct TCGOp *insn_start;
31
void *host_addr[2];
32
33
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
34
index XXXXXXX..XXXXXXX 100644
35
--- a/accel/tcg/translator.c
36
+++ b/accel/tcg/translator.c
37
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
38
db->max_insns = *max_insns;
39
db->singlestep_enabled = cflags & CF_SINGLE_STEP;
40
db->insn_start = NULL;
41
+ db->fake_insn = false;
42
db->host_addr[0] = host_pc;
43
db->host_addr[1] = NULL;
44
db->record_start = 0;
45
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
46
void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
47
{
48
assert(pc >= db->pc_first);
49
+ db->fake_insn = true;
50
record_save(db, pc, &insn8, sizeof(insn8));
51
plugin_insn_append(pc, &insn8, sizeof(insn8));
52
}
53
--
54
2.34.1
55
56
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
include/tcg/tcg.h | 1 +
5
accel/tcg/plugin-gen.c | 1 +
6
2 files changed, 2 insertions(+)
7
1
8
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
9
index XXXXXXX..XXXXXXX 100644
10
--- a/include/tcg/tcg.h
11
+++ b/include/tcg/tcg.h
12
@@ -XXX,XX +XXX,XX @@ struct TCGContext {
13
* space for instructions (for variable-instruction-length ISAs).
14
*/
15
struct qemu_plugin_tb *plugin_tb;
16
+ const struct DisasContextBase *plugin_db;
17
18
/* descriptor of the instruction being translated */
19
struct qemu_plugin_insn *plugin_insn;
20
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
21
index XXXXXXX..XXXXXXX 100644
22
--- a/accel/tcg/plugin-gen.c
23
+++ b/accel/tcg/plugin-gen.c
24
@@ -XXX,XX +XXX,XX @@ bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db,
25
tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
26
}
27
28
+ tcg_ctx->plugin_db = db;
29
tcg_ctx->plugin_insn = NULL;
30
31
return ret;
32
--
33
2.34.1
34
35
diff view generated by jsdifflib
Deleted patch
1
Instead of returning a host pointer, copy the data into
2
storage provided by the caller.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/qemu/qemu-plugin.h | 15 +++++++--------
8
contrib/plugins/execlog.c | 5 +++--
9
contrib/plugins/howvec.c | 4 ++--
10
plugins/api.c | 7 +++++--
11
4 files changed, 17 insertions(+), 14 deletions(-)
12
13
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/qemu/qemu-plugin.h
16
+++ b/include/qemu/qemu-plugin.h
17
@@ -XXX,XX +XXX,XX @@ typedef uint64_t qemu_plugin_id_t;
18
19
extern QEMU_PLUGIN_EXPORT int qemu_plugin_version;
20
21
-#define QEMU_PLUGIN_VERSION 2
22
+#define QEMU_PLUGIN_VERSION 3
23
24
/**
25
* struct qemu_info_t - system information for plugins
26
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_insn *
27
qemu_plugin_tb_get_insn(const struct qemu_plugin_tb *tb, size_t idx);
28
29
/**
30
- * qemu_plugin_insn_data() - return ptr to instruction data
31
+ * qemu_plugin_insn_data() - copy instruction data
32
* @insn: opaque instruction handle from qemu_plugin_tb_get_insn()
33
+ * @dest: destination into which data is copied
34
+ * @len: length of dest
35
*
36
- * Note: data is only valid for duration of callback. See
37
- * qemu_plugin_insn_size() to calculate size of stream.
38
- *
39
- * Returns: pointer to a stream of bytes containing the value of this
40
- * instructions opcode.
41
+ * Returns the number of bytes copied, minimum of @len and insn size.
42
*/
43
QEMU_PLUGIN_API
44
-const void *qemu_plugin_insn_data(const struct qemu_plugin_insn *insn);
45
+size_t qemu_plugin_insn_data(const struct qemu_plugin_insn *insn,
46
+ void *dest, size_t len);
47
48
/**
49
* qemu_plugin_insn_size() - return size of instruction
50
diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c
51
index XXXXXXX..XXXXXXX 100644
52
--- a/contrib/plugins/execlog.c
53
+++ b/contrib/plugins/execlog.c
54
@@ -XXX,XX +XXX,XX @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
55
NULL);
56
}
57
} else {
58
- uint32_t insn_opcode;
59
- insn_opcode = *((uint32_t *)qemu_plugin_insn_data(insn));
60
+ uint32_t insn_opcode = 0;
61
+ qemu_plugin_insn_data(insn, &insn_opcode, sizeof(insn_opcode));
62
+
63
char *output = g_strdup_printf("0x%"PRIx64", 0x%"PRIx32", \"%s\"",
64
insn_vaddr, insn_opcode, insn_disas);
65
66
diff --git a/contrib/plugins/howvec.c b/contrib/plugins/howvec.c
67
index XXXXXXX..XXXXXXX 100644
68
--- a/contrib/plugins/howvec.c
69
+++ b/contrib/plugins/howvec.c
70
@@ -XXX,XX +XXX,XX @@ static struct qemu_plugin_scoreboard *find_counter(
71
{
72
int i;
73
uint64_t *cnt = NULL;
74
- uint32_t opcode;
75
+ uint32_t opcode = 0;
76
InsnClassExecCount *class = NULL;
77
78
/*
79
@@ -XXX,XX +XXX,XX @@ static struct qemu_plugin_scoreboard *find_counter(
80
* They would probably benefit from a more tailored plugin.
81
* However we can fall back to individual instruction counting.
82
*/
83
- opcode = *((uint32_t *)qemu_plugin_insn_data(insn));
84
+ qemu_plugin_insn_data(insn, &opcode, sizeof(opcode));
85
86
for (i = 0; !cnt && i < class_table_sz; i++) {
87
class = &class_table[i];
88
diff --git a/plugins/api.c b/plugins/api.c
89
index XXXXXXX..XXXXXXX 100644
90
--- a/plugins/api.c
91
+++ b/plugins/api.c
92
@@ -XXX,XX +XXX,XX @@ qemu_plugin_tb_get_insn(const struct qemu_plugin_tb *tb, size_t idx)
93
* instruction being translated.
94
*/
95
96
-const void *qemu_plugin_insn_data(const struct qemu_plugin_insn *insn)
97
+size_t qemu_plugin_insn_data(const struct qemu_plugin_insn *insn,
98
+ void *dest, size_t len)
99
{
100
- return insn->data->data;
101
+ len = MIN(len, insn->data->len);
102
+ memcpy(dest, insn->data->data, len);
103
+ return len;
104
}
105
106
size_t qemu_plugin_insn_size(const struct qemu_plugin_insn *insn)
107
--
108
2.34.1
109
110
diff view generated by jsdifflib
Deleted patch
1
Copy data out of a completed translation. This will be used
2
for both plugins and disassembly.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/translator.h | 23 ++++++++++++++++
8
accel/tcg/translator.c | 55 +++++++++++++++++++++++++++++++++++++++
9
2 files changed, 78 insertions(+)
10
11
diff --git a/include/exec/translator.h b/include/exec/translator.h
12
index XXXXXXX..XXXXXXX 100644
13
--- a/include/exec/translator.h
14
+++ b/include/exec/translator.h
15
@@ -XXX,XX +XXX,XX @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
16
*/
17
void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8);
18
19
+/**
20
+ * translator_st
21
+ * @db: disassembly context
22
+ * @dest: address to copy into
23
+ * @addr: virtual address within TB
24
+ * @len: length
25
+ *
26
+ * Copy @len bytes from @addr into @dest.
27
+ * All bytes must have been read during translation.
28
+ * Return true on success or false on failure.
29
+ */
30
+bool translator_st(const DisasContextBase *db, void *dest,
31
+ vaddr addr, size_t len);
32
+
33
+/**
34
+ * translator_st_len
35
+ * @db: disassembly context
36
+ *
37
+ * Return the number of bytes available to copy from the
38
+ * current translation block with translator_st.
39
+ */
40
+size_t translator_st_len(const DisasContextBase *db);
41
+
42
#ifdef COMPILING_PER_TARGET
43
/*
44
* Return whether addr is on the same page as where disassembly started.
45
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
46
index XXXXXXX..XXXXXXX 100644
47
--- a/accel/tcg/translator.c
48
+++ b/accel/tcg/translator.c
49
@@ -XXX,XX +XXX,XX @@ static void record_save(DisasContextBase *db, vaddr pc,
50
memcpy(db->record + (offset - db->record_start), from, size);
51
}
52
53
+size_t translator_st_len(const DisasContextBase *db)
54
+{
55
+ return db->fake_insn ? db->record_len : db->tb->size;
56
+}
57
+
58
+bool translator_st(const DisasContextBase *db, void *dest,
59
+ vaddr addr, size_t len)
60
+{
61
+ size_t offset, offset_end;
62
+
63
+ if (addr < db->pc_first) {
64
+ return false;
65
+ }
66
+ offset = addr - db->pc_first;
67
+ offset_end = offset + len;
68
+ if (offset_end > translator_st_len(db)) {
69
+ return false;
70
+ }
71
+
72
+ if (!db->fake_insn) {
73
+ size_t offset_page1 = -(db->pc_first | TARGET_PAGE_MASK);
74
+
75
+ /* Get all the bytes from the first page. */
76
+ if (db->host_addr[0]) {
77
+ if (offset_end <= offset_page1) {
78
+ memcpy(dest, db->host_addr[0] + offset, len);
79
+ return true;
80
+ }
81
+ if (offset < offset_page1) {
82
+ size_t len0 = offset_page1 - offset;
83
+ memcpy(dest, db->host_addr[0] + offset, len0);
84
+ offset += len0;
85
+ dest += len0;
86
+ }
87
+ }
88
+
89
+ /* Get any bytes from the second page. */
90
+ if (db->host_addr[1] && offset >= offset_page1) {
91
+ memcpy(dest, db->host_addr[1] + (offset - offset_page1),
92
+ offset_end - offset);
93
+ return true;
94
+ }
95
+ }
96
+
97
+ /* Else get recorded bytes. */
98
+ if (db->record_len != 0 &&
99
+ offset >= db->record_start &&
100
+ offset_end <= db->record_start + db->record_len) {
101
+ memcpy(dest, db->record + (offset - db->record_start),
102
+ offset_end - offset);
103
+ return true;
104
+ }
105
+ return false;
106
+}
107
+
108
static void plugin_insn_append(vaddr pc, const void *from, size_t size)
109
{
110
#ifdef CONFIG_PLUGIN
111
--
112
2.34.1
113
114
diff view generated by jsdifflib
Deleted patch
1
Use the bytes that we record for the entire TB, rather than
2
a per-insn GByteArray. Record the length of the insn in
3
plugin_gen_insn_end rather than infering from the length
4
of the array.
5
1
6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
include/qemu/plugin.h | 14 +-------------
10
accel/tcg/plugin-gen.c | 7 +++++--
11
accel/tcg/translator.c | 26 --------------------------
12
plugins/api.c | 12 +++++++-----
13
tcg/tcg.c | 3 +--
14
5 files changed, 14 insertions(+), 48 deletions(-)
15
16
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
17
index XXXXXXX..XXXXXXX 100644
18
--- a/include/qemu/plugin.h
19
+++ b/include/qemu/plugin.h
20
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_dyn_cb {
21
22
/* Internal context for instrumenting an instruction */
23
struct qemu_plugin_insn {
24
- GByteArray *data;
25
uint64_t vaddr;
26
void *haddr;
27
GArray *insn_cbs;
28
GArray *mem_cbs;
29
+ uint8_t len;
30
bool calls_helpers;
31
32
/* if set, the instruction calls helpers that might access guest memory */
33
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_scoreboard {
34
QLIST_ENTRY(qemu_plugin_scoreboard) entry;
35
};
36
37
-/*
38
- * qemu_plugin_insn allocate and cleanup functions. We don't expect to
39
- * cleanup many of these structures. They are reused for each fresh
40
- * translation.
41
- */
42
-
43
-static inline void qemu_plugin_insn_cleanup_fn(gpointer data)
44
-{
45
- struct qemu_plugin_insn *insn = (struct qemu_plugin_insn *) data;
46
- g_byte_array_free(insn->data, true);
47
-}
48
-
49
/* Internal context for this TranslationBlock */
50
struct qemu_plugin_tb {
51
GPtrArray *insns;
52
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
53
index XXXXXXX..XXXXXXX 100644
54
--- a/accel/tcg/plugin-gen.c
55
+++ b/accel/tcg/plugin-gen.c
56
@@ -XXX,XX +XXX,XX @@ void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db)
57
ptb->n = n;
58
if (n <= ptb->insns->len) {
59
insn = g_ptr_array_index(ptb->insns, n - 1);
60
- g_byte_array_set_size(insn->data, 0);
61
} else {
62
assert(n - 1 == ptb->insns->len);
63
insn = g_new0(struct qemu_plugin_insn, 1);
64
- insn->data = g_byte_array_sized_new(4);
65
g_ptr_array_add(ptb->insns, insn);
66
}
67
68
@@ -XXX,XX +XXX,XX @@ void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db)
69
70
void plugin_gen_insn_end(void)
71
{
72
+ const DisasContextBase *db = tcg_ctx->plugin_db;
73
+ struct qemu_plugin_insn *pinsn = tcg_ctx->plugin_insn;
74
+
75
+ pinsn->len = db->fake_insn ? db->record_len : db->pc_next - pinsn->vaddr;
76
+
77
tcg_gen_plugin_cb(PLUGIN_GEN_AFTER_INSN);
78
}
79
80
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
81
index XXXXXXX..XXXXXXX 100644
82
--- a/accel/tcg/translator.c
83
+++ b/accel/tcg/translator.c
84
@@ -XXX,XX +XXX,XX @@ bool translator_st(const DisasContextBase *db, void *dest,
85
return false;
86
}
87
88
-static void plugin_insn_append(vaddr pc, const void *from, size_t size)
89
-{
90
-#ifdef CONFIG_PLUGIN
91
- struct qemu_plugin_insn *insn = tcg_ctx->plugin_insn;
92
- size_t off;
93
-
94
- if (insn == NULL) {
95
- return;
96
- }
97
- off = pc - insn->vaddr;
98
- if (off < insn->data->len) {
99
- g_byte_array_set_size(insn->data, off);
100
- } else if (off > insn->data->len) {
101
- /* we have an unexpected gap */
102
- g_assert_not_reached();
103
- }
104
-
105
- insn->data = g_byte_array_append(insn->data, from, size);
106
-#endif
107
-}
108
-
109
uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
110
{
111
uint8_t raw;
112
@@ -XXX,XX +XXX,XX @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
113
raw = cpu_ldub_code(env, pc);
114
record_save(db, pc, &raw, sizeof(raw));
115
}
116
- plugin_insn_append(pc, &raw, sizeof(raw));
117
return raw;
118
}
119
120
@@ -XXX,XX +XXX,XX @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
121
raw = tswap16(tgt);
122
record_save(db, pc, &raw, sizeof(raw));
123
}
124
- plugin_insn_append(pc, &raw, sizeof(raw));
125
return tgt;
126
}
127
128
@@ -XXX,XX +XXX,XX @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
129
raw = tswap32(tgt);
130
record_save(db, pc, &raw, sizeof(raw));
131
}
132
- plugin_insn_append(pc, &raw, sizeof(raw));
133
return tgt;
134
}
135
136
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
137
raw = tswap64(tgt);
138
record_save(db, pc, &raw, sizeof(raw));
139
}
140
- plugin_insn_append(pc, &raw, sizeof(raw));
141
return tgt;
142
}
143
144
@@ -XXX,XX +XXX,XX @@ void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
145
assert(pc >= db->pc_first);
146
db->fake_insn = true;
147
record_save(db, pc, &insn8, sizeof(insn8));
148
- plugin_insn_append(pc, &insn8, sizeof(insn8));
149
}
150
diff --git a/plugins/api.c b/plugins/api.c
151
index XXXXXXX..XXXXXXX 100644
152
--- a/plugins/api.c
153
+++ b/plugins/api.c
154
@@ -XXX,XX +XXX,XX @@
155
#include "tcg/tcg.h"
156
#include "exec/exec-all.h"
157
#include "exec/gdbstub.h"
158
+#include "exec/translator.h"
159
#include "disas/disas.h"
160
#include "plugin.h"
161
#ifndef CONFIG_USER_ONLY
162
@@ -XXX,XX +XXX,XX @@ qemu_plugin_tb_get_insn(const struct qemu_plugin_tb *tb, size_t idx)
163
size_t qemu_plugin_insn_data(const struct qemu_plugin_insn *insn,
164
void *dest, size_t len)
165
{
166
- len = MIN(len, insn->data->len);
167
- memcpy(dest, insn->data->data, len);
168
- return len;
169
+ const DisasContextBase *db = tcg_ctx->plugin_db;
170
+
171
+ len = MIN(len, insn->len);
172
+ return translator_st(db, dest, insn->vaddr, len) ? len : 0;
173
}
174
175
size_t qemu_plugin_insn_size(const struct qemu_plugin_insn *insn)
176
{
177
- return insn->data->len;
178
+ return insn->len;
179
}
180
181
uint64_t qemu_plugin_insn_vaddr(const struct qemu_plugin_insn *insn)
182
@@ -XXX,XX +XXX,XX @@ void *qemu_plugin_insn_haddr(const struct qemu_plugin_insn *insn)
183
char *qemu_plugin_insn_disas(const struct qemu_plugin_insn *insn)
184
{
185
CPUState *cpu = current_cpu;
186
- return plugin_disas(cpu, insn->vaddr, insn->data->len);
187
+ return plugin_disas(cpu, insn->vaddr, insn->len);
188
}
189
190
const char *qemu_plugin_insn_symbol(const struct qemu_plugin_insn *insn)
191
diff --git a/tcg/tcg.c b/tcg/tcg.c
192
index XXXXXXX..XXXXXXX 100644
193
--- a/tcg/tcg.c
194
+++ b/tcg/tcg.c
195
@@ -XXX,XX +XXX,XX @@ static void alloc_tcg_plugin_context(TCGContext *s)
196
{
197
#ifdef CONFIG_PLUGIN
198
s->plugin_tb = g_new0(struct qemu_plugin_tb, 1);
199
- s->plugin_tb->insns =
200
- g_ptr_array_new_with_free_func(qemu_plugin_insn_cleanup_fn);
201
+ s->plugin_tb->insns = g_ptr_array_new();
202
#endif
203
}
204
205
--
206
2.34.1
207
208
diff view generated by jsdifflib
Deleted patch
1
Do not pass around a boolean between multiple structures,
2
just read it from the TranslationBlock in the TCGContext.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/plugin-gen.h | 7 +++----
8
include/qemu/plugin.h | 3 ---
9
accel/tcg/plugin-gen.c | 4 +---
10
accel/tcg/translator.c | 2 +-
11
plugins/api.c | 14 +++++++++-----
12
5 files changed, 14 insertions(+), 16 deletions(-)
13
14
diff --git a/include/exec/plugin-gen.h b/include/exec/plugin-gen.h
15
index XXXXXXX..XXXXXXX 100644
16
--- a/include/exec/plugin-gen.h
17
+++ b/include/exec/plugin-gen.h
18
@@ -XXX,XX +XXX,XX @@ struct DisasContextBase;
19
20
#ifdef CONFIG_PLUGIN
21
22
-bool plugin_gen_tb_start(CPUState *cpu, const struct DisasContextBase *db,
23
- bool supress);
24
+bool plugin_gen_tb_start(CPUState *cpu, const struct DisasContextBase *db);
25
void plugin_gen_tb_end(CPUState *cpu, size_t num_insns);
26
void plugin_gen_insn_start(CPUState *cpu, const struct DisasContextBase *db);
27
void plugin_gen_insn_end(void);
28
@@ -XXX,XX +XXX,XX @@ void plugin_gen_disable_mem_helpers(void);
29
30
#else /* !CONFIG_PLUGIN */
31
32
-static inline bool
33
-plugin_gen_tb_start(CPUState *cpu, const struct DisasContextBase *db, bool sup)
34
+static inline
35
+bool plugin_gen_tb_start(CPUState *cpu, const struct DisasContextBase *db)
36
{
37
return false;
38
}
39
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
40
index XXXXXXX..XXXXXXX 100644
41
--- a/include/qemu/plugin.h
42
+++ b/include/qemu/plugin.h
43
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_insn {
44
45
/* if set, the instruction calls helpers that might access guest memory */
46
bool mem_helper;
47
-
48
- bool mem_only;
49
};
50
51
/* A scoreboard is an array of values, indexed by vcpu_index */
52
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_tb {
53
uint64_t vaddr2;
54
void *haddr1;
55
void *haddr2;
56
- bool mem_only;
57
58
/* if set, the TB calls helpers that might access guest memory */
59
bool mem_helper;
60
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
61
index XXXXXXX..XXXXXXX 100644
62
--- a/accel/tcg/plugin-gen.c
63
+++ b/accel/tcg/plugin-gen.c
64
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
65
}
66
}
67
68
-bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db,
69
- bool mem_only)
70
+bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db)
71
{
72
bool ret = false;
73
74
@@ -XXX,XX +XXX,XX @@ bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db,
75
ptb->vaddr2 = -1;
76
ptb->haddr1 = db->host_addr[0];
77
ptb->haddr2 = NULL;
78
- ptb->mem_only = mem_only;
79
ptb->mem_helper = false;
80
81
tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
82
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
83
index XXXXXXX..XXXXXXX 100644
84
--- a/accel/tcg/translator.c
85
+++ b/accel/tcg/translator.c
86
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
87
ops->tb_start(db, cpu);
88
tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
89
90
- plugin_enabled = plugin_gen_tb_start(cpu, db, cflags & CF_MEMI_ONLY);
91
+ plugin_enabled = plugin_gen_tb_start(cpu, db);
92
db->plugin_enabled = plugin_enabled;
93
94
while (true) {
95
diff --git a/plugins/api.c b/plugins/api.c
96
index XXXXXXX..XXXXXXX 100644
97
--- a/plugins/api.c
98
+++ b/plugins/api.c
99
@@ -XXX,XX +XXX,XX @@ void qemu_plugin_register_vcpu_exit_cb(qemu_plugin_id_t id,
100
plugin_register_cb(id, QEMU_PLUGIN_EV_VCPU_EXIT, cb);
101
}
102
103
+static bool tb_is_mem_only(void)
104
+{
105
+ return tb_cflags(tcg_ctx->gen_tb) & CF_MEMI_ONLY;
106
+}
107
+
108
void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb,
109
qemu_plugin_vcpu_udata_cb_t cb,
110
enum qemu_plugin_cb_flags flags,
111
void *udata)
112
{
113
- if (!tb->mem_only) {
114
+ if (!tb_is_mem_only()) {
115
plugin_register_dyn_cb__udata(&tb->cbs, cb, flags, udata);
116
}
117
}
118
@@ -XXX,XX +XXX,XX @@ void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu(
119
qemu_plugin_u64 entry,
120
uint64_t imm)
121
{
122
- if (!tb->mem_only) {
123
+ if (!tb_is_mem_only()) {
124
plugin_register_inline_op_on_entry(&tb->cbs, 0, op, entry, imm);
125
}
126
}
127
@@ -XXX,XX +XXX,XX @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn,
128
enum qemu_plugin_cb_flags flags,
129
void *udata)
130
{
131
- if (!insn->mem_only) {
132
+ if (!tb_is_mem_only()) {
133
plugin_register_dyn_cb__udata(&insn->insn_cbs, cb, flags, udata);
134
}
135
}
136
@@ -XXX,XX +XXX,XX @@ void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu(
137
qemu_plugin_u64 entry,
138
uint64_t imm)
139
{
140
- if (!insn->mem_only) {
141
+ if (!tb_is_mem_only()) {
142
plugin_register_inline_op_on_entry(&insn->insn_cbs, 0, op, entry, imm);
143
}
144
}
145
@@ -XXX,XX +XXX,XX @@ qemu_plugin_tb_get_insn(const struct qemu_plugin_tb *tb, size_t idx)
146
return NULL;
147
}
148
insn = g_ptr_array_index(tb->insns, idx);
149
- insn->mem_only = tb->mem_only;
150
return insn;
151
}
152
153
--
154
2.34.1
155
156
diff view generated by jsdifflib
Deleted patch
1
We can delay the computation of haddr until the plugin
2
actually requests it.
3
1
4
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/qemu/plugin.h | 4 ----
8
accel/tcg/plugin-gen.c | 20 --------------------
9
plugins/api.c | 25 ++++++++++++++++++++++++-
10
3 files changed, 24 insertions(+), 25 deletions(-)
11
12
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/qemu/plugin.h
15
+++ b/include/qemu/plugin.h
16
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_dyn_cb {
17
/* Internal context for instrumenting an instruction */
18
struct qemu_plugin_insn {
19
uint64_t vaddr;
20
- void *haddr;
21
GArray *insn_cbs;
22
GArray *mem_cbs;
23
uint8_t len;
24
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_tb {
25
GPtrArray *insns;
26
size_t n;
27
uint64_t vaddr;
28
- uint64_t vaddr2;
29
- void *haddr1;
30
- void *haddr2;
31
32
/* if set, the TB calls helpers that might access guest memory */
33
bool mem_helper;
34
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
35
index XXXXXXX..XXXXXXX 100644
36
--- a/accel/tcg/plugin-gen.c
37
+++ b/accel/tcg/plugin-gen.c
38
@@ -XXX,XX +XXX,XX @@ bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db)
39
ret = true;
40
41
ptb->vaddr = db->pc_first;
42
- ptb->vaddr2 = -1;
43
- ptb->haddr1 = db->host_addr[0];
44
- ptb->haddr2 = NULL;
45
ptb->mem_helper = false;
46
47
tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
48
@@ -XXX,XX +XXX,XX @@ void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db)
49
pc = db->pc_next;
50
insn->vaddr = pc;
51
52
- /*
53
- * Detect page crossing to get the new host address.
54
- * Note that we skip this when haddr1 == NULL, e.g. when we're
55
- * fetching instructions from a region not backed by RAM.
56
- */
57
- if (ptb->haddr1 == NULL) {
58
- insn->haddr = NULL;
59
- } else if (is_same_page(db, db->pc_next)) {
60
- insn->haddr = ptb->haddr1 + pc - ptb->vaddr;
61
- } else {
62
- if (ptb->vaddr2 == -1) {
63
- ptb->vaddr2 = TARGET_PAGE_ALIGN(db->pc_first);
64
- get_page_addr_code_hostp(cpu_env(cpu), ptb->vaddr2, &ptb->haddr2);
65
- }
66
- insn->haddr = ptb->haddr2 + pc - ptb->vaddr2;
67
- }
68
-
69
tcg_gen_plugin_cb(PLUGIN_GEN_FROM_INSN);
70
}
71
72
diff --git a/plugins/api.c b/plugins/api.c
73
index XXXXXXX..XXXXXXX 100644
74
--- a/plugins/api.c
75
+++ b/plugins/api.c
76
@@ -XXX,XX +XXX,XX @@ uint64_t qemu_plugin_insn_vaddr(const struct qemu_plugin_insn *insn)
77
78
void *qemu_plugin_insn_haddr(const struct qemu_plugin_insn *insn)
79
{
80
- return insn->haddr;
81
+ const DisasContextBase *db = tcg_ctx->plugin_db;
82
+ vaddr page0_last = db->pc_first | ~TARGET_PAGE_MASK;
83
+
84
+ if (db->fake_insn) {
85
+ return NULL;
86
+ }
87
+
88
+ /*
89
+ * ??? The return value is not intended for use of host memory,
90
+ * but as a proxy for address space and physical address.
91
+ * Thus we are only interested in the first byte and do not
92
+ * care about spanning pages.
93
+ */
94
+ if (insn->vaddr <= page0_last) {
95
+ if (db->host_addr[0] == NULL) {
96
+ return NULL;
97
+ }
98
+ return db->host_addr[0] + insn->vaddr - db->pc_first;
99
+ } else {
100
+ if (db->host_addr[1] == NULL) {
101
+ return NULL;
102
+ }
103
+ return db->host_addr[1] + insn->vaddr - (page0_last + 1);
104
+ }
105
}
106
107
char *qemu_plugin_insn_disas(const struct qemu_plugin_insn *insn)
108
--
109
2.34.1
diff view generated by jsdifflib
Deleted patch
1
We do not need to separately record the start of the TB.
2
1
3
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
include/qemu/plugin.h | 1 -
7
accel/tcg/plugin-gen.c | 3 +--
8
plugins/api.c | 3 ++-
9
3 files changed, 3 insertions(+), 4 deletions(-)
10
11
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
12
index XXXXXXX..XXXXXXX 100644
13
--- a/include/qemu/plugin.h
14
+++ b/include/qemu/plugin.h
15
@@ -XXX,XX +XXX,XX @@ struct qemu_plugin_scoreboard {
16
struct qemu_plugin_tb {
17
GPtrArray *insns;
18
size_t n;
19
- uint64_t vaddr;
20
21
/* if set, the TB calls helpers that might access guest memory */
22
bool mem_helper;
23
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
24
index XXXXXXX..XXXXXXX 100644
25
--- a/accel/tcg/plugin-gen.c
26
+++ b/accel/tcg/plugin-gen.c
27
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
28
int insn_idx = -1;
29
30
if (unlikely(qemu_loglevel_mask(LOG_TB_OP_PLUGIN)
31
- && qemu_log_in_addr_range(plugin_tb->vaddr))) {
32
+ && qemu_log_in_addr_range(tcg_ctx->plugin_db->pc_first))) {
33
FILE *logfile = qemu_log_trylock();
34
if (logfile) {
35
fprintf(logfile, "OP before plugin injection:\n");
36
@@ -XXX,XX +XXX,XX @@ bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db)
37
38
ret = true;
39
40
- ptb->vaddr = db->pc_first;
41
ptb->mem_helper = false;
42
43
tcg_gen_plugin_cb(PLUGIN_GEN_FROM_TB);
44
diff --git a/plugins/api.c b/plugins/api.c
45
index XXXXXXX..XXXXXXX 100644
46
--- a/plugins/api.c
47
+++ b/plugins/api.c
48
@@ -XXX,XX +XXX,XX @@ size_t qemu_plugin_tb_n_insns(const struct qemu_plugin_tb *tb)
49
50
uint64_t qemu_plugin_tb_vaddr(const struct qemu_plugin_tb *tb)
51
{
52
- return tb->vaddr;
53
+ const DisasContextBase *db = tcg_ctx->plugin_db;
54
+ return db->pc_first;
55
}
56
57
struct qemu_plugin_insn *
58
--
59
2.34.1
60
61
diff view generated by jsdifflib
Deleted patch
1
Almost all of the disas_log implementations are identical.
2
Unify them within translator_loop.
3
1
4
Drop extra Priv/Virt logging from target/riscv.
5
6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
accel/tcg/translator.c | 9 ++++++++-
10
target/alpha/translate.c | 9 ---------
11
target/arm/tcg/translate-a64.c | 11 -----------
12
target/arm/tcg/translate.c | 12 ------------
13
target/avr/translate.c | 8 --------
14
target/cris/translate.c | 11 -----------
15
target/hexagon/translate.c | 9 ---------
16
target/hppa/translate.c | 6 ++++--
17
target/i386/tcg/translate.c | 11 -----------
18
target/loongarch/tcg/translate.c | 8 --------
19
target/m68k/translate.c | 9 ---------
20
target/microblaze/translate.c | 9 ---------
21
target/mips/tcg/translate.c | 9 ---------
22
target/openrisc/translate.c | 11 -----------
23
target/ppc/translate.c | 9 ---------
24
target/riscv/translate.c | 18 ------------------
25
target/rx/translate.c | 8 --------
26
target/sh4/translate.c | 9 ---------
27
target/sparc/translate.c | 9 ---------
28
target/tricore/translate.c | 9 ---------
29
target/xtensa/translate.c | 9 ---------
30
21 files changed, 12 insertions(+), 191 deletions(-)
31
32
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
33
index XXXXXXX..XXXXXXX 100644
34
--- a/accel/tcg/translator.c
35
+++ b/accel/tcg/translator.c
36
@@ -XXX,XX +XXX,XX @@
37
#include "exec/cpu_ldst.h"
38
#include "tcg/tcg-op-common.h"
39
#include "internal-target.h"
40
+#include "disas/disas.h"
41
42
static void set_can_do_io(DisasContextBase *db, bool val)
43
{
44
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
45
FILE *logfile = qemu_log_trylock();
46
if (logfile) {
47
fprintf(logfile, "----------------\n");
48
- ops->disas_log(db, cpu, logfile);
49
+
50
+ if (ops->disas_log) {
51
+ ops->disas_log(db, cpu, logfile);
52
+ } else {
53
+ fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first));
54
+ target_disas(logfile, cpu, db->pc_first, db->tb->size);
55
+ }
56
fprintf(logfile, "\n");
57
qemu_log_unlock(logfile);
58
}
59
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
60
index XXXXXXX..XXXXXXX 100644
61
--- a/target/alpha/translate.c
62
+++ b/target/alpha/translate.c
63
@@ -XXX,XX +XXX,XX @@
64
#include "qemu/osdep.h"
65
#include "cpu.h"
66
#include "sysemu/cpus.h"
67
-#include "disas/disas.h"
68
#include "qemu/host-utils.h"
69
#include "exec/exec-all.h"
70
#include "tcg/tcg-op.h"
71
@@ -XXX,XX +XXX,XX @@ static void alpha_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
72
}
73
}
74
75
-static void alpha_tr_disas_log(const DisasContextBase *dcbase,
76
- CPUState *cpu, FILE *logfile)
77
-{
78
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
79
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
80
-}
81
-
82
static const TranslatorOps alpha_tr_ops = {
83
.init_disas_context = alpha_tr_init_disas_context,
84
.tb_start = alpha_tr_tb_start,
85
.insn_start = alpha_tr_insn_start,
86
.translate_insn = alpha_tr_translate_insn,
87
.tb_stop = alpha_tr_tb_stop,
88
- .disas_log = alpha_tr_disas_log,
89
};
90
91
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
92
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
93
index XXXXXXX..XXXXXXX 100644
94
--- a/target/arm/tcg/translate-a64.c
95
+++ b/target/arm/tcg/translate-a64.c
96
@@ -XXX,XX +XXX,XX @@
97
#include "translate.h"
98
#include "translate-a64.h"
99
#include "qemu/log.h"
100
-#include "disas/disas.h"
101
#include "arm_ldst.h"
102
#include "semihosting/semihost.h"
103
#include "cpregs.h"
104
@@ -XXX,XX +XXX,XX @@ static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
105
}
106
}
107
108
-static void aarch64_tr_disas_log(const DisasContextBase *dcbase,
109
- CPUState *cpu, FILE *logfile)
110
-{
111
- DisasContext *dc = container_of(dcbase, DisasContext, base);
112
-
113
- fprintf(logfile, "IN: %s\n", lookup_symbol(dc->base.pc_first));
114
- target_disas(logfile, cpu, dc->base.pc_first, dc->base.tb->size);
115
-}
116
-
117
const TranslatorOps aarch64_translator_ops = {
118
.init_disas_context = aarch64_tr_init_disas_context,
119
.tb_start = aarch64_tr_tb_start,
120
.insn_start = aarch64_tr_insn_start,
121
.translate_insn = aarch64_tr_translate_insn,
122
.tb_stop = aarch64_tr_tb_stop,
123
- .disas_log = aarch64_tr_disas_log,
124
};
125
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
126
index XXXXXXX..XXXXXXX 100644
127
--- a/target/arm/tcg/translate.c
128
+++ b/target/arm/tcg/translate.c
129
@@ -XXX,XX +XXX,XX @@
130
#include "translate.h"
131
#include "translate-a32.h"
132
#include "qemu/log.h"
133
-#include "disas/disas.h"
134
#include "arm_ldst.h"
135
#include "semihosting/semihost.h"
136
#include "cpregs.h"
137
@@ -XXX,XX +XXX,XX @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
138
}
139
}
140
141
-static void arm_tr_disas_log(const DisasContextBase *dcbase,
142
- CPUState *cpu, FILE *logfile)
143
-{
144
- DisasContext *dc = container_of(dcbase, DisasContext, base);
145
-
146
- fprintf(logfile, "IN: %s\n", lookup_symbol(dc->base.pc_first));
147
- target_disas(logfile, cpu, dc->base.pc_first, dc->base.tb->size);
148
-}
149
-
150
static const TranslatorOps arm_translator_ops = {
151
.init_disas_context = arm_tr_init_disas_context,
152
.tb_start = arm_tr_tb_start,
153
.insn_start = arm_tr_insn_start,
154
.translate_insn = arm_tr_translate_insn,
155
.tb_stop = arm_tr_tb_stop,
156
- .disas_log = arm_tr_disas_log,
157
};
158
159
static const TranslatorOps thumb_translator_ops = {
160
@@ -XXX,XX +XXX,XX @@ static const TranslatorOps thumb_translator_ops = {
161
.insn_start = arm_tr_insn_start,
162
.translate_insn = thumb_tr_translate_insn,
163
.tb_stop = arm_tr_tb_stop,
164
- .disas_log = arm_tr_disas_log,
165
};
166
167
/* generate intermediate code for basic block 'tb'. */
168
diff --git a/target/avr/translate.c b/target/avr/translate.c
169
index XXXXXXX..XXXXXXX 100644
170
--- a/target/avr/translate.c
171
+++ b/target/avr/translate.c
172
@@ -XXX,XX +XXX,XX @@ static void avr_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
173
}
174
}
175
176
-static void avr_tr_disas_log(const DisasContextBase *dcbase,
177
- CPUState *cs, FILE *logfile)
178
-{
179
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
180
- target_disas(logfile, cs, dcbase->pc_first, dcbase->tb->size);
181
-}
182
-
183
static const TranslatorOps avr_tr_ops = {
184
.init_disas_context = avr_tr_init_disas_context,
185
.tb_start = avr_tr_tb_start,
186
.insn_start = avr_tr_insn_start,
187
.translate_insn = avr_tr_translate_insn,
188
.tb_stop = avr_tr_tb_stop,
189
- .disas_log = avr_tr_disas_log,
190
};
191
192
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
193
diff --git a/target/cris/translate.c b/target/cris/translate.c
194
index XXXXXXX..XXXXXXX 100644
195
--- a/target/cris/translate.c
196
+++ b/target/cris/translate.c
197
@@ -XXX,XX +XXX,XX @@
198
199
#include "qemu/osdep.h"
200
#include "cpu.h"
201
-#include "disas/disas.h"
202
#include "exec/exec-all.h"
203
#include "tcg/tcg-op.h"
204
#include "exec/helper-proto.h"
205
@@ -XXX,XX +XXX,XX @@ static void cris_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
206
}
207
}
208
209
-static void cris_tr_disas_log(const DisasContextBase *dcbase,
210
- CPUState *cpu, FILE *logfile)
211
-{
212
- if (!DISAS_CRIS) {
213
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
214
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
215
- }
216
-}
217
-
218
static const TranslatorOps cris_tr_ops = {
219
.init_disas_context = cris_tr_init_disas_context,
220
.tb_start = cris_tr_tb_start,
221
.insn_start = cris_tr_insn_start,
222
.translate_insn = cris_tr_translate_insn,
223
.tb_stop = cris_tr_tb_stop,
224
- .disas_log = cris_tr_disas_log,
225
};
226
227
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
228
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
229
index XXXXXXX..XXXXXXX 100644
230
--- a/target/hexagon/translate.c
231
+++ b/target/hexagon/translate.c
232
@@ -XXX,XX +XXX,XX @@ static void hexagon_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
233
}
234
}
235
236
-static void hexagon_tr_disas_log(const DisasContextBase *dcbase,
237
- CPUState *cpu, FILE *logfile)
238
-{
239
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
240
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
241
-}
242
-
243
-
244
static const TranslatorOps hexagon_tr_ops = {
245
.init_disas_context = hexagon_tr_init_disas_context,
246
.tb_start = hexagon_tr_tb_start,
247
.insn_start = hexagon_tr_insn_start,
248
.translate_insn = hexagon_tr_translate_packet,
249
.tb_stop = hexagon_tr_tb_stop,
250
- .disas_log = hexagon_tr_disas_log,
251
};
252
253
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
254
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
255
index XXXXXXX..XXXXXXX 100644
256
--- a/target/hppa/translate.c
257
+++ b/target/hppa/translate.c
258
@@ -XXX,XX +XXX,XX @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
259
}
260
}
261
262
+#ifdef CONFIG_USER_ONLY
263
static void hppa_tr_disas_log(const DisasContextBase *dcbase,
264
CPUState *cs, FILE *logfile)
265
{
266
target_ulong pc = dcbase->pc_first;
267
268
-#ifdef CONFIG_USER_ONLY
269
switch (pc) {
270
case 0x00:
271
fprintf(logfile, "IN:\n0x00000000: (null)\n");
272
@@ -XXX,XX +XXX,XX @@ static void hppa_tr_disas_log(const DisasContextBase *dcbase,
273
fprintf(logfile, "IN:\n0x00000100: syscall\n");
274
return;
275
}
276
-#endif
277
278
fprintf(logfile, "IN: %s\n", lookup_symbol(pc));
279
target_disas(logfile, cs, pc, dcbase->tb->size);
280
}
281
+#endif
282
283
static const TranslatorOps hppa_tr_ops = {
284
.init_disas_context = hppa_tr_init_disas_context,
285
@@ -XXX,XX +XXX,XX @@ static const TranslatorOps hppa_tr_ops = {
286
.insn_start = hppa_tr_insn_start,
287
.translate_insn = hppa_tr_translate_insn,
288
.tb_stop = hppa_tr_tb_stop,
289
+#ifdef CONFIG_USER_ONLY
290
.disas_log = hppa_tr_disas_log,
291
+#endif
292
};
293
294
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
295
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
296
index XXXXXXX..XXXXXXX 100644
297
--- a/target/i386/tcg/translate.c
298
+++ b/target/i386/tcg/translate.c
299
@@ -XXX,XX +XXX,XX @@
300
301
#include "qemu/host-utils.h"
302
#include "cpu.h"
303
-#include "disas/disas.h"
304
#include "exec/exec-all.h"
305
#include "tcg/tcg-op.h"
306
#include "tcg/tcg-op-gvec.h"
307
@@ -XXX,XX +XXX,XX @@ static void i386_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
308
}
309
}
310
311
-static void i386_tr_disas_log(const DisasContextBase *dcbase,
312
- CPUState *cpu, FILE *logfile)
313
-{
314
- DisasContext *dc = container_of(dcbase, DisasContext, base);
315
-
316
- fprintf(logfile, "IN: %s\n", lookup_symbol(dc->base.pc_first));
317
- target_disas(logfile, cpu, dc->base.pc_first, dc->base.tb->size);
318
-}
319
-
320
static const TranslatorOps i386_tr_ops = {
321
.init_disas_context = i386_tr_init_disas_context,
322
.tb_start = i386_tr_tb_start,
323
.insn_start = i386_tr_insn_start,
324
.translate_insn = i386_tr_translate_insn,
325
.tb_stop = i386_tr_tb_stop,
326
- .disas_log = i386_tr_disas_log,
327
};
328
329
/* generate intermediate code for basic block 'tb'. */
330
diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c
331
index XXXXXXX..XXXXXXX 100644
332
--- a/target/loongarch/tcg/translate.c
333
+++ b/target/loongarch/tcg/translate.c
334
@@ -XXX,XX +XXX,XX @@ static void loongarch_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
335
}
336
}
337
338
-static void loongarch_tr_disas_log(const DisasContextBase *dcbase,
339
- CPUState *cpu, FILE *logfile)
340
-{
341
- qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first));
342
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
343
-}
344
-
345
static const TranslatorOps loongarch_tr_ops = {
346
.init_disas_context = loongarch_tr_init_disas_context,
347
.tb_start = loongarch_tr_tb_start,
348
.insn_start = loongarch_tr_insn_start,
349
.translate_insn = loongarch_tr_translate_insn,
350
.tb_stop = loongarch_tr_tb_stop,
351
- .disas_log = loongarch_tr_disas_log,
352
};
353
354
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
355
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
356
index XXXXXXX..XXXXXXX 100644
357
--- a/target/m68k/translate.c
358
+++ b/target/m68k/translate.c
359
@@ -XXX,XX +XXX,XX @@
360
361
#include "qemu/osdep.h"
362
#include "cpu.h"
363
-#include "disas/disas.h"
364
#include "exec/exec-all.h"
365
#include "tcg/tcg-op.h"
366
#include "qemu/log.h"
367
@@ -XXX,XX +XXX,XX @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
368
}
369
}
370
371
-static void m68k_tr_disas_log(const DisasContextBase *dcbase,
372
- CPUState *cpu, FILE *logfile)
373
-{
374
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
375
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
376
-}
377
-
378
static const TranslatorOps m68k_tr_ops = {
379
.init_disas_context = m68k_tr_init_disas_context,
380
.tb_start = m68k_tr_tb_start,
381
.insn_start = m68k_tr_insn_start,
382
.translate_insn = m68k_tr_translate_insn,
383
.tb_stop = m68k_tr_tb_stop,
384
- .disas_log = m68k_tr_disas_log,
385
};
386
387
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
388
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
389
index XXXXXXX..XXXXXXX 100644
390
--- a/target/microblaze/translate.c
391
+++ b/target/microblaze/translate.c
392
@@ -XXX,XX +XXX,XX @@
393
394
#include "qemu/osdep.h"
395
#include "cpu.h"
396
-#include "disas/disas.h"
397
#include "exec/exec-all.h"
398
#include "exec/cpu_ldst.h"
399
#include "tcg/tcg-op.h"
400
@@ -XXX,XX +XXX,XX @@ static void mb_tr_tb_stop(DisasContextBase *dcb, CPUState *cs)
401
}
402
}
403
404
-static void mb_tr_disas_log(const DisasContextBase *dcb,
405
- CPUState *cs, FILE *logfile)
406
-{
407
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcb->pc_first));
408
- target_disas(logfile, cs, dcb->pc_first, dcb->tb->size);
409
-}
410
-
411
static const TranslatorOps mb_tr_ops = {
412
.init_disas_context = mb_tr_init_disas_context,
413
.tb_start = mb_tr_tb_start,
414
.insn_start = mb_tr_insn_start,
415
.translate_insn = mb_tr_translate_insn,
416
.tb_stop = mb_tr_tb_stop,
417
- .disas_log = mb_tr_disas_log,
418
};
419
420
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
421
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
422
index XXXXXXX..XXXXXXX 100644
423
--- a/target/mips/tcg/translate.c
424
+++ b/target/mips/tcg/translate.c
425
@@ -XXX,XX +XXX,XX @@
426
#include "exec/translation-block.h"
427
#include "semihosting/semihost.h"
428
#include "trace.h"
429
-#include "disas/disas.h"
430
#include "fpu_helper.h"
431
432
#define HELPER_H "helper.h"
433
@@ -XXX,XX +XXX,XX @@ static void mips_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
434
}
435
}
436
437
-static void mips_tr_disas_log(const DisasContextBase *dcbase,
438
- CPUState *cs, FILE *logfile)
439
-{
440
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
441
- target_disas(logfile, cs, dcbase->pc_first, dcbase->tb->size);
442
-}
443
-
444
static const TranslatorOps mips_tr_ops = {
445
.init_disas_context = mips_tr_init_disas_context,
446
.tb_start = mips_tr_tb_start,
447
.insn_start = mips_tr_insn_start,
448
.translate_insn = mips_tr_translate_insn,
449
.tb_stop = mips_tr_tb_stop,
450
- .disas_log = mips_tr_disas_log,
451
};
452
453
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
454
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
455
index XXXXXXX..XXXXXXX 100644
456
--- a/target/openrisc/translate.c
457
+++ b/target/openrisc/translate.c
458
@@ -XXX,XX +XXX,XX @@
459
#include "qemu/osdep.h"
460
#include "cpu.h"
461
#include "exec/exec-all.h"
462
-#include "disas/disas.h"
463
#include "tcg/tcg-op.h"
464
#include "qemu/log.h"
465
#include "qemu/bitops.h"
466
@@ -XXX,XX +XXX,XX @@ static void openrisc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
467
}
468
}
469
470
-static void openrisc_tr_disas_log(const DisasContextBase *dcbase,
471
- CPUState *cs, FILE *logfile)
472
-{
473
- DisasContext *s = container_of(dcbase, DisasContext, base);
474
-
475
- fprintf(logfile, "IN: %s\n", lookup_symbol(s->base.pc_first));
476
- target_disas(logfile, cs, s->base.pc_first, s->base.tb->size);
477
-}
478
-
479
static const TranslatorOps openrisc_tr_ops = {
480
.init_disas_context = openrisc_tr_init_disas_context,
481
.tb_start = openrisc_tr_tb_start,
482
.insn_start = openrisc_tr_insn_start,
483
.translate_insn = openrisc_tr_translate_insn,
484
.tb_stop = openrisc_tr_tb_stop,
485
- .disas_log = openrisc_tr_disas_log,
486
};
487
488
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
489
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
490
index XXXXXXX..XXXXXXX 100644
491
--- a/target/ppc/translate.c
492
+++ b/target/ppc/translate.c
493
@@ -XXX,XX +XXX,XX @@
494
#include "qemu/osdep.h"
495
#include "cpu.h"
496
#include "internal.h"
497
-#include "disas/disas.h"
498
#include "exec/exec-all.h"
499
#include "tcg/tcg-op.h"
500
#include "tcg/tcg-op-gvec.h"
501
@@ -XXX,XX +XXX,XX @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
502
}
503
}
504
505
-static void ppc_tr_disas_log(const DisasContextBase *dcbase,
506
- CPUState *cs, FILE *logfile)
507
-{
508
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
509
- target_disas(logfile, cs, dcbase->pc_first, dcbase->tb->size);
510
-}
511
-
512
static const TranslatorOps ppc_tr_ops = {
513
.init_disas_context = ppc_tr_init_disas_context,
514
.tb_start = ppc_tr_tb_start,
515
.insn_start = ppc_tr_insn_start,
516
.translate_insn = ppc_tr_translate_insn,
517
.tb_stop = ppc_tr_tb_stop,
518
- .disas_log = ppc_tr_disas_log,
519
};
520
521
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
522
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
523
index XXXXXXX..XXXXXXX 100644
524
--- a/target/riscv/translate.c
525
+++ b/target/riscv/translate.c
526
@@ -XXX,XX +XXX,XX @@
527
#include "qemu/log.h"
528
#include "cpu.h"
529
#include "tcg/tcg-op.h"
530
-#include "disas/disas.h"
531
#include "exec/cpu_ldst.h"
532
#include "exec/exec-all.h"
533
#include "exec/helper-proto.h"
534
@@ -XXX,XX +XXX,XX @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
535
}
536
}
537
538
-static void riscv_tr_disas_log(const DisasContextBase *dcbase,
539
- CPUState *cpu, FILE *logfile)
540
-{
541
-#ifndef CONFIG_USER_ONLY
542
- RISCVCPU *rvcpu = RISCV_CPU(cpu);
543
- CPURISCVState *env = &rvcpu->env;
544
-#endif
545
-
546
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
547
-#ifndef CONFIG_USER_ONLY
548
- fprintf(logfile, "Priv: "TARGET_FMT_ld"; Virt: %d\n",
549
- env->priv, env->virt_enabled);
550
-#endif
551
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
552
-}
553
-
554
static const TranslatorOps riscv_tr_ops = {
555
.init_disas_context = riscv_tr_init_disas_context,
556
.tb_start = riscv_tr_tb_start,
557
.insn_start = riscv_tr_insn_start,
558
.translate_insn = riscv_tr_translate_insn,
559
.tb_stop = riscv_tr_tb_stop,
560
- .disas_log = riscv_tr_disas_log,
561
};
562
563
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
564
diff --git a/target/rx/translate.c b/target/rx/translate.c
565
index XXXXXXX..XXXXXXX 100644
566
--- a/target/rx/translate.c
567
+++ b/target/rx/translate.c
568
@@ -XXX,XX +XXX,XX @@ static void rx_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
569
}
570
}
571
572
-static void rx_tr_disas_log(const DisasContextBase *dcbase,
573
- CPUState *cs, FILE *logfile)
574
-{
575
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
576
- target_disas(logfile, cs, dcbase->pc_first, dcbase->tb->size);
577
-}
578
-
579
static const TranslatorOps rx_tr_ops = {
580
.init_disas_context = rx_tr_init_disas_context,
581
.tb_start = rx_tr_tb_start,
582
.insn_start = rx_tr_insn_start,
583
.translate_insn = rx_tr_translate_insn,
584
.tb_stop = rx_tr_tb_stop,
585
- .disas_log = rx_tr_disas_log,
586
};
587
588
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
589
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
590
index XXXXXXX..XXXXXXX 100644
591
--- a/target/sh4/translate.c
592
+++ b/target/sh4/translate.c
593
@@ -XXX,XX +XXX,XX @@
594
595
#include "qemu/osdep.h"
596
#include "cpu.h"
597
-#include "disas/disas.h"
598
#include "exec/exec-all.h"
599
#include "tcg/tcg-op.h"
600
#include "exec/helper-proto.h"
601
@@ -XXX,XX +XXX,XX @@ static void sh4_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
602
}
603
}
604
605
-static void sh4_tr_disas_log(const DisasContextBase *dcbase,
606
- CPUState *cs, FILE *logfile)
607
-{
608
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
609
- target_disas(logfile, cs, dcbase->pc_first, dcbase->tb->size);
610
-}
611
-
612
static const TranslatorOps sh4_tr_ops = {
613
.init_disas_context = sh4_tr_init_disas_context,
614
.tb_start = sh4_tr_tb_start,
615
.insn_start = sh4_tr_insn_start,
616
.translate_insn = sh4_tr_translate_insn,
617
.tb_stop = sh4_tr_tb_stop,
618
- .disas_log = sh4_tr_disas_log,
619
};
620
621
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
622
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
623
index XXXXXXX..XXXXXXX 100644
624
--- a/target/sparc/translate.c
625
+++ b/target/sparc/translate.c
626
@@ -XXX,XX +XXX,XX @@
627
#include "qemu/osdep.h"
628
629
#include "cpu.h"
630
-#include "disas/disas.h"
631
#include "exec/helper-proto.h"
632
#include "exec/exec-all.h"
633
#include "tcg/tcg-op.h"
634
@@ -XXX,XX +XXX,XX @@ static void sparc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
635
}
636
}
637
638
-static void sparc_tr_disas_log(const DisasContextBase *dcbase,
639
- CPUState *cpu, FILE *logfile)
640
-{
641
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
642
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
643
-}
644
-
645
static const TranslatorOps sparc_tr_ops = {
646
.init_disas_context = sparc_tr_init_disas_context,
647
.tb_start = sparc_tr_tb_start,
648
.insn_start = sparc_tr_insn_start,
649
.translate_insn = sparc_tr_translate_insn,
650
.tb_stop = sparc_tr_tb_stop,
651
- .disas_log = sparc_tr_disas_log,
652
};
653
654
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
655
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
656
index XXXXXXX..XXXXXXX 100644
657
--- a/target/tricore/translate.c
658
+++ b/target/tricore/translate.c
659
@@ -XXX,XX +XXX,XX @@
660
661
#include "qemu/osdep.h"
662
#include "cpu.h"
663
-#include "disas/disas.h"
664
#include "exec/exec-all.h"
665
#include "tcg/tcg-op.h"
666
#include "exec/cpu_ldst.h"
667
@@ -XXX,XX +XXX,XX @@ static void tricore_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
668
}
669
}
670
671
-static void tricore_tr_disas_log(const DisasContextBase *dcbase,
672
- CPUState *cpu, FILE *logfile)
673
-{
674
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
675
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
676
-}
677
-
678
static const TranslatorOps tricore_tr_ops = {
679
.init_disas_context = tricore_tr_init_disas_context,
680
.tb_start = tricore_tr_tb_start,
681
.insn_start = tricore_tr_insn_start,
682
.translate_insn = tricore_tr_translate_insn,
683
.tb_stop = tricore_tr_tb_stop,
684
- .disas_log = tricore_tr_disas_log,
685
};
686
687
688
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
689
index XXXXXXX..XXXXXXX 100644
690
--- a/target/xtensa/translate.c
691
+++ b/target/xtensa/translate.c
692
@@ -XXX,XX +XXX,XX @@
693
694
#include "cpu.h"
695
#include "exec/exec-all.h"
696
-#include "disas/disas.h"
697
#include "tcg/tcg-op.h"
698
#include "qemu/log.h"
699
#include "qemu/qemu-print.h"
700
@@ -XXX,XX +XXX,XX @@ static void xtensa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
701
}
702
}
703
704
-static void xtensa_tr_disas_log(const DisasContextBase *dcbase,
705
- CPUState *cpu, FILE *logfile)
706
-{
707
- fprintf(logfile, "IN: %s\n", lookup_symbol(dcbase->pc_first));
708
- target_disas(logfile, cpu, dcbase->pc_first, dcbase->tb->size);
709
-}
710
-
711
static const TranslatorOps xtensa_translator_ops = {
712
.init_disas_context = xtensa_tr_init_disas_context,
713
.tb_start = xtensa_tr_tb_start,
714
.insn_start = xtensa_tr_insn_start,
715
.translate_insn = xtensa_tr_translate_insn,
716
.tb_stop = xtensa_tr_tb_stop,
717
- .disas_log = xtensa_tr_disas_log,
718
};
719
720
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
721
--
722
2.34.1
723
724
diff view generated by jsdifflib
Deleted patch
1
We have eliminated most uses of this hook. Reduce
2
further by allowing the hook to handle only the
3
special cases, returning false for normal processing.
4
1
5
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
include/exec/translator.h | 2 +-
9
accel/tcg/translator.c | 5 ++---
10
target/hppa/translate.c | 15 ++++++---------
11
target/s390x/tcg/translate.c | 8 +++-----
12
4 files changed, 12 insertions(+), 18 deletions(-)
13
14
diff --git a/include/exec/translator.h b/include/exec/translator.h
15
index XXXXXXX..XXXXXXX 100644
16
--- a/include/exec/translator.h
17
+++ b/include/exec/translator.h
18
@@ -XXX,XX +XXX,XX @@ typedef struct TranslatorOps {
19
void (*insn_start)(DisasContextBase *db, CPUState *cpu);
20
void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
21
void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
22
- void (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
23
+ bool (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
24
} TranslatorOps;
25
26
/**
27
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
28
index XXXXXXX..XXXXXXX 100644
29
--- a/accel/tcg/translator.c
30
+++ b/accel/tcg/translator.c
31
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
32
if (logfile) {
33
fprintf(logfile, "----------------\n");
34
35
- if (ops->disas_log) {
36
- ops->disas_log(db, cpu, logfile);
37
- } else {
38
+ if (!ops->disas_log ||
39
+ !ops->disas_log(db, cpu, logfile)) {
40
fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first));
41
target_disas(logfile, cpu, db->pc_first, db->tb->size);
42
}
43
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
44
index XXXXXXX..XXXXXXX 100644
45
--- a/target/hppa/translate.c
46
+++ b/target/hppa/translate.c
47
@@ -XXX,XX +XXX,XX @@
48
49
#include "qemu/osdep.h"
50
#include "cpu.h"
51
-#include "disas/disas.h"
52
#include "qemu/host-utils.h"
53
#include "exec/exec-all.h"
54
#include "exec/page-protection.h"
55
@@ -XXX,XX +XXX,XX @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
56
}
57
58
#ifdef CONFIG_USER_ONLY
59
-static void hppa_tr_disas_log(const DisasContextBase *dcbase,
60
+static bool hppa_tr_disas_log(const DisasContextBase *dcbase,
61
CPUState *cs, FILE *logfile)
62
{
63
target_ulong pc = dcbase->pc_first;
64
@@ -XXX,XX +XXX,XX @@ static void hppa_tr_disas_log(const DisasContextBase *dcbase,
65
switch (pc) {
66
case 0x00:
67
fprintf(logfile, "IN:\n0x00000000: (null)\n");
68
- return;
69
+ return true;
70
case 0xb0:
71
fprintf(logfile, "IN:\n0x000000b0: light-weight-syscall\n");
72
- return;
73
+ return true;
74
case 0xe0:
75
fprintf(logfile, "IN:\n0x000000e0: set-thread-pointer-syscall\n");
76
- return;
77
+ return true;
78
case 0x100:
79
fprintf(logfile, "IN:\n0x00000100: syscall\n");
80
- return;
81
+ return true;
82
}
83
-
84
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc));
85
- target_disas(logfile, cs, pc, dcbase->tb->size);
86
+ return false;
87
}
88
#endif
89
90
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
91
index XXXXXXX..XXXXXXX 100644
92
--- a/target/s390x/tcg/translate.c
93
+++ b/target/s390x/tcg/translate.c
94
@@ -XXX,XX +XXX,XX @@
95
#include "qemu/osdep.h"
96
#include "cpu.h"
97
#include "s390x-internal.h"
98
-#include "disas/disas.h"
99
#include "exec/exec-all.h"
100
#include "tcg/tcg-op.h"
101
#include "tcg/tcg-op-gvec.h"
102
@@ -XXX,XX +XXX,XX @@ static void s390x_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
103
}
104
}
105
106
-static void s390x_tr_disas_log(const DisasContextBase *dcbase,
107
+static bool s390x_tr_disas_log(const DisasContextBase *dcbase,
108
CPUState *cs, FILE *logfile)
109
{
110
DisasContext *dc = container_of(dcbase, DisasContext, base);
111
@@ -XXX,XX +XXX,XX @@ static void s390x_tr_disas_log(const DisasContextBase *dcbase,
112
if (unlikely(dc->ex_value)) {
113
/* ??? Unfortunately target_disas can't use host memory. */
114
fprintf(logfile, "IN: EXECUTE %016" PRIx64, dc->ex_value);
115
- } else {
116
- fprintf(logfile, "IN: %s\n", lookup_symbol(dc->base.pc_first));
117
- target_disas(logfile, cs, dc->base.pc_first, dc->base.tb->size);
118
+ return true;
119
}
120
+ return false;
121
}
122
123
static const TranslatorOps s390x_tr_ops = {
124
--
125
2.34.1
126
127
diff view generated by jsdifflib
Deleted patch
1
The routines in disas-common.c are also used from disas-mon.c.
2
Otherwise the rest of disassembly is only used from tcg.
3
While we're at it, put host and target code into separate files.
4
1
5
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
disas/disas-internal.h | 4 +
9
include/disas/disas.h | 4 +
10
disas/disas-common.c | 118 ++++++++++++++
11
disas/disas-host.c | 129 ++++++++++++++++
12
disas/disas-target.c | 84 ++++++++++
13
disas/disas.c | 338 -----------------------------------------
14
disas/objdump.c | 37 +++++
15
disas/meson.build | 8 +-
16
8 files changed, 382 insertions(+), 340 deletions(-)
17
create mode 100644 disas/disas-common.c
18
create mode 100644 disas/disas-host.c
19
create mode 100644 disas/disas-target.c
20
delete mode 100644 disas/disas.c
21
create mode 100644 disas/objdump.c
22
23
diff --git a/disas/disas-internal.h b/disas/disas-internal.h
24
index XXXXXXX..XXXXXXX 100644
25
--- a/disas/disas-internal.h
26
+++ b/disas/disas-internal.h
27
@@ -XXX,XX +XXX,XX @@ typedef struct CPUDebug {
28
CPUState *cpu;
29
} CPUDebug;
30
31
+void disas_initialize_debug(CPUDebug *s);
32
void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu);
33
int disas_gstring_printf(FILE *stream, const char *fmt, ...)
34
G_GNUC_PRINTF(2, 3);
35
36
+int print_insn_od_host(bfd_vma pc, disassemble_info *info);
37
+int print_insn_od_target(bfd_vma pc, disassemble_info *info);
38
+
39
#endif
40
diff --git a/include/disas/disas.h b/include/disas/disas.h
41
index XXXXXXX..XXXXXXX 100644
42
--- a/include/disas/disas.h
43
+++ b/include/disas/disas.h
44
@@ -XXX,XX +XXX,XX @@
45
#define QEMU_DISAS_H
46
47
/* Disassemble this for me please... (debugging). */
48
+#ifdef CONFIG_TCG
49
void disas(FILE *out, const void *code, size_t size);
50
void target_disas(FILE *out, CPUState *cpu, uint64_t code, size_t size);
51
+#endif
52
53
void monitor_disas(Monitor *mon, CPUState *cpu, uint64_t pc,
54
int nb_insn, bool is_physical);
55
56
+#ifdef CONFIG_PLUGIN
57
char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size);
58
+#endif
59
60
/* Look up symbol for debugging purpose. Returns "" if unknown. */
61
const char *lookup_symbol(uint64_t orig_addr);
62
diff --git a/disas/disas-common.c b/disas/disas-common.c
63
new file mode 100644
64
index XXXXXXX..XXXXXXX
65
--- /dev/null
66
+++ b/disas/disas-common.c
67
@@ -XXX,XX +XXX,XX @@
68
+/*
69
+ * Common routines for disassembly.
70
+ * SPDX-License-Identifier: GPL-2.0-or-later
71
+ */
72
+
73
+#include "qemu/osdep.h"
74
+#include "disas/disas.h"
75
+#include "disas/capstone.h"
76
+#include "hw/core/cpu.h"
77
+#include "exec/tswap.h"
78
+#include "exec/memory.h"
79
+#include "disas-internal.h"
80
+
81
+
82
+/* Filled in by elfload.c. Simplistic, but will do for now. */
83
+struct syminfo *syminfos = NULL;
84
+
85
+/*
86
+ * Get LENGTH bytes from info's buffer, at target address memaddr.
87
+ * Transfer them to myaddr.
88
+ */
89
+static int target_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
90
+ struct disassemble_info *info)
91
+{
92
+ CPUDebug *s = container_of(info, CPUDebug, info);
93
+ int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
94
+ return r ? EIO : 0;
95
+}
96
+
97
+/*
98
+ * Print an error message. We can assume that this is in response to
99
+ * an error return from {host,target}_read_memory.
100
+ */
101
+static void perror_memory(int status, bfd_vma memaddr,
102
+ struct disassemble_info *info)
103
+{
104
+ if (status != EIO) {
105
+ /* Can't happen. */
106
+ info->fprintf_func(info->stream, "Unknown error %d\n", status);
107
+ } else {
108
+ /* Address between memaddr and memaddr + len was out of bounds. */
109
+ info->fprintf_func(info->stream,
110
+ "Address 0x%" PRIx64 " is out of bounds.\n",
111
+ memaddr);
112
+ }
113
+}
114
+
115
+/* Print address in hex. */
116
+static void print_address(bfd_vma addr, struct disassemble_info *info)
117
+{
118
+ info->fprintf_func(info->stream, "0x%" PRIx64, addr);
119
+}
120
+
121
+/* Stub prevents some fruitless earching in optabs disassemblers. */
122
+static int symbol_at_address(bfd_vma addr, struct disassemble_info *info)
123
+{
124
+ return 1;
125
+}
126
+
127
+void disas_initialize_debug(CPUDebug *s)
128
+{
129
+ memset(s, 0, sizeof(*s));
130
+ s->info.arch = bfd_arch_unknown;
131
+ s->info.cap_arch = -1;
132
+ s->info.cap_insn_unit = 4;
133
+ s->info.cap_insn_split = 4;
134
+ s->info.memory_error_func = perror_memory;
135
+ s->info.symbol_at_address_func = symbol_at_address;
136
+}
137
+
138
+void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu)
139
+{
140
+ disas_initialize_debug(s);
141
+
142
+ s->cpu = cpu;
143
+ s->info.read_memory_func = target_read_memory;
144
+ s->info.print_address_func = print_address;
145
+ if (target_words_bigendian()) {
146
+ s->info.endian = BFD_ENDIAN_BIG;
147
+ } else {
148
+ s->info.endian = BFD_ENDIAN_LITTLE;
149
+ }
150
+
151
+ CPUClass *cc = CPU_GET_CLASS(cpu);
152
+ if (cc->disas_set_info) {
153
+ cc->disas_set_info(cpu, &s->info);
154
+ }
155
+}
156
+
157
+int disas_gstring_printf(FILE *stream, const char *fmt, ...)
158
+{
159
+ /* We abuse the FILE parameter to pass a GString. */
160
+ GString *s = (GString *)stream;
161
+ int initial_len = s->len;
162
+ va_list va;
163
+
164
+ va_start(va, fmt);
165
+ g_string_append_vprintf(s, fmt, va);
166
+ va_end(va);
167
+
168
+ return s->len - initial_len;
169
+}
170
+
171
+/* Look up symbol for debugging purpose. Returns "" if unknown. */
172
+const char *lookup_symbol(uint64_t orig_addr)
173
+{
174
+ const char *symbol = "";
175
+ struct syminfo *s;
176
+
177
+ for (s = syminfos; s; s = s->next) {
178
+ symbol = s->lookup_symbol(s, orig_addr);
179
+ if (symbol[0] != '\0') {
180
+ break;
181
+ }
182
+ }
183
+
184
+ return symbol;
185
+}
186
diff --git a/disas/disas-host.c b/disas/disas-host.c
187
new file mode 100644
188
index XXXXXXX..XXXXXXX
189
--- /dev/null
190
+++ b/disas/disas-host.c
191
@@ -XXX,XX +XXX,XX @@
192
+/*
193
+ * Routines for host instruction disassembly.
194
+ * SPDX-License-Identifier: GPL-2.0-or-later
195
+ */
196
+
197
+#include "qemu/osdep.h"
198
+#include "disas/disas.h"
199
+#include "disas/capstone.h"
200
+#include "disas-internal.h"
201
+
202
+
203
+/*
204
+ * Get LENGTH bytes from info's buffer, at host address memaddr.
205
+ * Transfer them to myaddr.
206
+ */
207
+static int host_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
208
+ struct disassemble_info *info)
209
+{
210
+ if (memaddr < info->buffer_vma
211
+ || memaddr + length > info->buffer_vma + info->buffer_length) {
212
+ /* Out of bounds. Use EIO because GDB uses it. */
213
+ return EIO;
214
+ }
215
+ memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
216
+ return 0;
217
+}
218
+
219
+/* Print address in hex, truncated to the width of a host virtual address. */
220
+static void host_print_address(bfd_vma addr, struct disassemble_info *info)
221
+{
222
+ info->fprintf_func(info->stream, "0x%" PRIxPTR, (uintptr_t)addr);
223
+}
224
+
225
+static void initialize_debug_host(CPUDebug *s)
226
+{
227
+ disas_initialize_debug(s);
228
+
229
+ s->info.read_memory_func = host_read_memory;
230
+ s->info.print_address_func = host_print_address;
231
+#if HOST_BIG_ENDIAN
232
+ s->info.endian = BFD_ENDIAN_BIG;
233
+#else
234
+ s->info.endian = BFD_ENDIAN_LITTLE;
235
+#endif
236
+#if defined(CONFIG_TCG_INTERPRETER)
237
+ s->info.print_insn = print_insn_tci;
238
+#elif defined(__i386__)
239
+ s->info.mach = bfd_mach_i386_i386;
240
+ s->info.cap_arch = CS_ARCH_X86;
241
+ s->info.cap_mode = CS_MODE_32;
242
+ s->info.cap_insn_unit = 1;
243
+ s->info.cap_insn_split = 8;
244
+#elif defined(__x86_64__)
245
+ s->info.mach = bfd_mach_x86_64;
246
+ s->info.cap_arch = CS_ARCH_X86;
247
+ s->info.cap_mode = CS_MODE_64;
248
+ s->info.cap_insn_unit = 1;
249
+ s->info.cap_insn_split = 8;
250
+#elif defined(_ARCH_PPC)
251
+ s->info.cap_arch = CS_ARCH_PPC;
252
+# ifdef _ARCH_PPC64
253
+ s->info.cap_mode = CS_MODE_64;
254
+# endif
255
+#elif defined(__riscv)
256
+#if defined(_ILP32) || (__riscv_xlen == 32)
257
+ s->info.print_insn = print_insn_riscv32;
258
+#elif defined(_LP64)
259
+ s->info.print_insn = print_insn_riscv64;
260
+#else
261
+#error unsupported RISC-V ABI
262
+#endif
263
+#elif defined(__aarch64__)
264
+ s->info.cap_arch = CS_ARCH_ARM64;
265
+#elif defined(__alpha__)
266
+ s->info.print_insn = print_insn_alpha;
267
+#elif defined(__sparc__)
268
+ s->info.print_insn = print_insn_sparc;
269
+ s->info.mach = bfd_mach_sparc_v9b;
270
+#elif defined(__arm__)
271
+ /* TCG only generates code for arm mode. */
272
+ s->info.cap_arch = CS_ARCH_ARM;
273
+#elif defined(__MIPSEB__)
274
+ s->info.print_insn = print_insn_big_mips;
275
+#elif defined(__MIPSEL__)
276
+ s->info.print_insn = print_insn_little_mips;
277
+#elif defined(__m68k__)
278
+ s->info.print_insn = print_insn_m68k;
279
+#elif defined(__s390__)
280
+ s->info.cap_arch = CS_ARCH_SYSZ;
281
+ s->info.cap_insn_unit = 2;
282
+ s->info.cap_insn_split = 6;
283
+#elif defined(__hppa__)
284
+ s->info.print_insn = print_insn_hppa;
285
+#elif defined(__loongarch__)
286
+ s->info.print_insn = print_insn_loongarch;
287
+#endif
288
+}
289
+
290
+/* Disassemble this for me please... (debugging). */
291
+void disas(FILE *out, const void *code, size_t size)
292
+{
293
+ uintptr_t pc;
294
+ int count;
295
+ CPUDebug s;
296
+
297
+ initialize_debug_host(&s);
298
+ s.info.fprintf_func = fprintf;
299
+ s.info.stream = out;
300
+ s.info.buffer = code;
301
+ s.info.buffer_vma = (uintptr_t)code;
302
+ s.info.buffer_length = size;
303
+ s.info.show_opcodes = true;
304
+
305
+ if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
306
+ return;
307
+ }
308
+
309
+ if (s.info.print_insn == NULL) {
310
+ s.info.print_insn = print_insn_od_host;
311
+ }
312
+ for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
313
+ fprintf(out, "0x%08" PRIxPTR ": ", pc);
314
+ count = s.info.print_insn(pc, &s.info);
315
+ fprintf(out, "\n");
316
+ if (count < 0) {
317
+ break;
318
+ }
319
+ }
320
+}
321
diff --git a/disas/disas-target.c b/disas/disas-target.c
322
new file mode 100644
323
index XXXXXXX..XXXXXXX
324
--- /dev/null
325
+++ b/disas/disas-target.c
326
@@ -XXX,XX +XXX,XX @@
327
+/*
328
+ * Routines for target instruction disassembly.
329
+ * SPDX-License-Identifier: GPL-2.0-or-later
330
+ */
331
+
332
+#include "qemu/osdep.h"
333
+#include "disas/disas.h"
334
+#include "disas/capstone.h"
335
+#include "disas-internal.h"
336
+
337
+
338
+void target_disas(FILE *out, CPUState *cpu, uint64_t code, size_t size)
339
+{
340
+ uint64_t pc;
341
+ int count;
342
+ CPUDebug s;
343
+
344
+ disas_initialize_debug_target(&s, cpu);
345
+ s.info.fprintf_func = fprintf;
346
+ s.info.stream = out;
347
+ s.info.buffer_vma = code;
348
+ s.info.buffer_length = size;
349
+ s.info.show_opcodes = true;
350
+
351
+ if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
352
+ return;
353
+ }
354
+
355
+ if (s.info.print_insn == NULL) {
356
+ s.info.print_insn = print_insn_od_target;
357
+ }
358
+
359
+ for (pc = code; size > 0; pc += count, size -= count) {
360
+ fprintf(out, "0x%08" PRIx64 ": ", pc);
361
+ count = s.info.print_insn(pc, &s.info);
362
+ fprintf(out, "\n");
363
+ if (count < 0) {
364
+ break;
365
+ }
366
+ if (size < count) {
367
+ fprintf(out,
368
+ "Disassembler disagrees with translator over instruction "
369
+ "decoding\n"
370
+ "Please report this to qemu-devel@nongnu.org\n");
371
+ break;
372
+ }
373
+ }
374
+}
375
+
376
+#ifdef CONFIG_PLUGIN
377
+static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
378
+{
379
+ /* does nothing */
380
+}
381
+
382
+/*
383
+ * We should only be dissembling one instruction at a time here. If
384
+ * there is left over it usually indicates the front end has read more
385
+ * bytes than it needed.
386
+ */
387
+char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
388
+{
389
+ CPUDebug s;
390
+ GString *ds = g_string_new(NULL);
391
+
392
+ disas_initialize_debug_target(&s, cpu);
393
+ s.info.fprintf_func = disas_gstring_printf;
394
+ s.info.stream = (FILE *)ds; /* abuse this slot */
395
+ s.info.buffer_vma = addr;
396
+ s.info.buffer_length = size;
397
+ s.info.print_address_func = plugin_print_address;
398
+
399
+ if (s.info.cap_arch >= 0 && cap_disas_plugin(&s.info, addr, size)) {
400
+ ; /* done */
401
+ } else if (s.info.print_insn) {
402
+ s.info.print_insn(addr, &s.info);
403
+ } else {
404
+ ; /* cannot disassemble -- return empty string */
405
+ }
406
+
407
+ /* Return the buffer, freeing the GString container. */
408
+ return g_string_free(ds, false);
409
+}
410
+#endif /* CONFIG_PLUGIN */
411
diff --git a/disas/disas.c b/disas/disas.c
412
deleted file mode 100644
413
index XXXXXXX..XXXXXXX
414
--- a/disas/disas.c
415
+++ /dev/null
416
@@ -XXX,XX +XXX,XX @@
417
-/* General "disassemble this chunk" code. Used for debugging. */
418
-#include "qemu/osdep.h"
419
-#include "disas/disas-internal.h"
420
-#include "elf.h"
421
-#include "qemu/qemu-print.h"
422
-#include "disas/disas.h"
423
-#include "disas/capstone.h"
424
-#include "hw/core/cpu.h"
425
-#include "exec/tswap.h"
426
-#include "exec/memory.h"
427
-
428
-/* Filled in by elfload.c. Simplistic, but will do for now. */
429
-struct syminfo *syminfos = NULL;
430
-
431
-/*
432
- * Get LENGTH bytes from info's buffer, at host address memaddr.
433
- * Transfer them to myaddr.
434
- */
435
-static int host_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
436
- struct disassemble_info *info)
437
-{
438
- if (memaddr < info->buffer_vma
439
- || memaddr + length > info->buffer_vma + info->buffer_length) {
440
- /* Out of bounds. Use EIO because GDB uses it. */
441
- return EIO;
442
- }
443
- memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
444
- return 0;
445
-}
446
-
447
-/*
448
- * Get LENGTH bytes from info's buffer, at target address memaddr.
449
- * Transfer them to myaddr.
450
- */
451
-static int target_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
452
- struct disassemble_info *info)
453
-{
454
- CPUDebug *s = container_of(info, CPUDebug, info);
455
- int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
456
- return r ? EIO : 0;
457
-}
458
-
459
-/*
460
- * Print an error message. We can assume that this is in response to
461
- * an error return from {host,target}_read_memory.
462
- */
463
-static void perror_memory(int status, bfd_vma memaddr,
464
- struct disassemble_info *info)
465
-{
466
- if (status != EIO) {
467
- /* Can't happen. */
468
- info->fprintf_func(info->stream, "Unknown error %d\n", status);
469
- } else {
470
- /* Address between memaddr and memaddr + len was out of bounds. */
471
- info->fprintf_func(info->stream,
472
- "Address 0x%" PRIx64 " is out of bounds.\n",
473
- memaddr);
474
- }
475
-}
476
-
477
-/* Print address in hex. */
478
-static void print_address(bfd_vma addr, struct disassemble_info *info)
479
-{
480
- info->fprintf_func(info->stream, "0x%" PRIx64, addr);
481
-}
482
-
483
-/* Print address in hex, truncated to the width of a host virtual address. */
484
-static void host_print_address(bfd_vma addr, struct disassemble_info *info)
485
-{
486
- print_address((uintptr_t)addr, info);
487
-}
488
-
489
-/* Stub prevents some fruitless earching in optabs disassemblers. */
490
-static int symbol_at_address(bfd_vma addr, struct disassemble_info *info)
491
-{
492
- return 1;
493
-}
494
-
495
-static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
496
- const char *prefix)
497
-{
498
- int i, n = info->buffer_length;
499
- g_autofree uint8_t *buf = g_malloc(n);
500
-
501
- if (info->read_memory_func(pc, buf, n, info) == 0) {
502
- for (i = 0; i < n; ++i) {
503
- if (i % 32 == 0) {
504
- info->fprintf_func(info->stream, "\n%s: ", prefix);
505
- }
506
- info->fprintf_func(info->stream, "%02x", buf[i]);
507
- }
508
- } else {
509
- info->fprintf_func(info->stream, "unable to read memory");
510
- }
511
- return n;
512
-}
513
-
514
-static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
515
-{
516
- return print_insn_objdump(pc, info, "OBJD-H");
517
-}
518
-
519
-static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
520
-{
521
- return print_insn_objdump(pc, info, "OBJD-T");
522
-}
523
-
524
-static void initialize_debug(CPUDebug *s)
525
-{
526
- memset(s, 0, sizeof(*s));
527
- s->info.arch = bfd_arch_unknown;
528
- s->info.cap_arch = -1;
529
- s->info.cap_insn_unit = 4;
530
- s->info.cap_insn_split = 4;
531
- s->info.memory_error_func = perror_memory;
532
- s->info.symbol_at_address_func = symbol_at_address;
533
-}
534
-
535
-void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu)
536
-{
537
- initialize_debug(s);
538
-
539
- s->cpu = cpu;
540
- s->info.read_memory_func = target_read_memory;
541
- s->info.print_address_func = print_address;
542
- if (target_words_bigendian()) {
543
- s->info.endian = BFD_ENDIAN_BIG;
544
- } else {
545
- s->info.endian = BFD_ENDIAN_LITTLE;
546
- }
547
-
548
- CPUClass *cc = CPU_GET_CLASS(cpu);
549
- if (cc->disas_set_info) {
550
- cc->disas_set_info(cpu, &s->info);
551
- }
552
-}
553
-
554
-static void initialize_debug_host(CPUDebug *s)
555
-{
556
- initialize_debug(s);
557
-
558
- s->info.read_memory_func = host_read_memory;
559
- s->info.print_address_func = host_print_address;
560
-#if HOST_BIG_ENDIAN
561
- s->info.endian = BFD_ENDIAN_BIG;
562
-#else
563
- s->info.endian = BFD_ENDIAN_LITTLE;
564
-#endif
565
-#if defined(CONFIG_TCG_INTERPRETER)
566
- s->info.print_insn = print_insn_tci;
567
-#elif defined(__i386__)
568
- s->info.mach = bfd_mach_i386_i386;
569
- s->info.cap_arch = CS_ARCH_X86;
570
- s->info.cap_mode = CS_MODE_32;
571
- s->info.cap_insn_unit = 1;
572
- s->info.cap_insn_split = 8;
573
-#elif defined(__x86_64__)
574
- s->info.mach = bfd_mach_x86_64;
575
- s->info.cap_arch = CS_ARCH_X86;
576
- s->info.cap_mode = CS_MODE_64;
577
- s->info.cap_insn_unit = 1;
578
- s->info.cap_insn_split = 8;
579
-#elif defined(_ARCH_PPC)
580
- s->info.cap_arch = CS_ARCH_PPC;
581
-# ifdef _ARCH_PPC64
582
- s->info.cap_mode = CS_MODE_64;
583
-# endif
584
-#elif defined(__riscv)
585
-#if defined(_ILP32) || (__riscv_xlen == 32)
586
- s->info.print_insn = print_insn_riscv32;
587
-#elif defined(_LP64)
588
- s->info.print_insn = print_insn_riscv64;
589
-#else
590
-#error unsupported RISC-V ABI
591
-#endif
592
-#elif defined(__aarch64__)
593
- s->info.cap_arch = CS_ARCH_ARM64;
594
-#elif defined(__alpha__)
595
- s->info.print_insn = print_insn_alpha;
596
-#elif defined(__sparc__)
597
- s->info.print_insn = print_insn_sparc;
598
- s->info.mach = bfd_mach_sparc_v9b;
599
-#elif defined(__arm__)
600
- /* TCG only generates code for arm mode. */
601
- s->info.cap_arch = CS_ARCH_ARM;
602
-#elif defined(__MIPSEB__)
603
- s->info.print_insn = print_insn_big_mips;
604
-#elif defined(__MIPSEL__)
605
- s->info.print_insn = print_insn_little_mips;
606
-#elif defined(__m68k__)
607
- s->info.print_insn = print_insn_m68k;
608
-#elif defined(__s390__)
609
- s->info.cap_arch = CS_ARCH_SYSZ;
610
- s->info.cap_insn_unit = 2;
611
- s->info.cap_insn_split = 6;
612
-#elif defined(__hppa__)
613
- s->info.print_insn = print_insn_hppa;
614
-#elif defined(__loongarch__)
615
- s->info.print_insn = print_insn_loongarch;
616
-#endif
617
-}
618
-
619
-/* Disassemble this for me please... (debugging). */
620
-void target_disas(FILE *out, CPUState *cpu, uint64_t code, size_t size)
621
-{
622
- uint64_t pc;
623
- int count;
624
- CPUDebug s;
625
-
626
- disas_initialize_debug_target(&s, cpu);
627
- s.info.fprintf_func = fprintf;
628
- s.info.stream = out;
629
- s.info.buffer_vma = code;
630
- s.info.buffer_length = size;
631
- s.info.show_opcodes = true;
632
-
633
- if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
634
- return;
635
- }
636
-
637
- if (s.info.print_insn == NULL) {
638
- s.info.print_insn = print_insn_od_target;
639
- }
640
-
641
- for (pc = code; size > 0; pc += count, size -= count) {
642
- fprintf(out, "0x%08" PRIx64 ": ", pc);
643
- count = s.info.print_insn(pc, &s.info);
644
- fprintf(out, "\n");
645
- if (count < 0) {
646
- break;
647
- }
648
- if (size < count) {
649
- fprintf(out,
650
- "Disassembler disagrees with translator over instruction "
651
- "decoding\n"
652
- "Please report this to qemu-devel@nongnu.org\n");
653
- break;
654
- }
655
- }
656
-}
657
-
658
-int disas_gstring_printf(FILE *stream, const char *fmt, ...)
659
-{
660
- /* We abuse the FILE parameter to pass a GString. */
661
- GString *s = (GString *)stream;
662
- int initial_len = s->len;
663
- va_list va;
664
-
665
- va_start(va, fmt);
666
- g_string_append_vprintf(s, fmt, va);
667
- va_end(va);
668
-
669
- return s->len - initial_len;
670
-}
671
-
672
-static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
673
-{
674
- /* does nothing */
675
-}
676
-
677
-
678
-/*
679
- * We should only be dissembling one instruction at a time here. If
680
- * there is left over it usually indicates the front end has read more
681
- * bytes than it needed.
682
- */
683
-char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
684
-{
685
- CPUDebug s;
686
- GString *ds = g_string_new(NULL);
687
-
688
- disas_initialize_debug_target(&s, cpu);
689
- s.info.fprintf_func = disas_gstring_printf;
690
- s.info.stream = (FILE *)ds; /* abuse this slot */
691
- s.info.buffer_vma = addr;
692
- s.info.buffer_length = size;
693
- s.info.print_address_func = plugin_print_address;
694
-
695
- if (s.info.cap_arch >= 0 && cap_disas_plugin(&s.info, addr, size)) {
696
- ; /* done */
697
- } else if (s.info.print_insn) {
698
- s.info.print_insn(addr, &s.info);
699
- } else {
700
- ; /* cannot disassemble -- return empty string */
701
- }
702
-
703
- /* Return the buffer, freeing the GString container. */
704
- return g_string_free(ds, false);
705
-}
706
-
707
-/* Disassemble this for me please... (debugging). */
708
-void disas(FILE *out, const void *code, size_t size)
709
-{
710
- uintptr_t pc;
711
- int count;
712
- CPUDebug s;
713
-
714
- initialize_debug_host(&s);
715
- s.info.fprintf_func = fprintf;
716
- s.info.stream = out;
717
- s.info.buffer = code;
718
- s.info.buffer_vma = (uintptr_t)code;
719
- s.info.buffer_length = size;
720
- s.info.show_opcodes = true;
721
-
722
- if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
723
- return;
724
- }
725
-
726
- if (s.info.print_insn == NULL) {
727
- s.info.print_insn = print_insn_od_host;
728
- }
729
- for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
730
- fprintf(out, "0x%08" PRIxPTR ": ", pc);
731
- count = s.info.print_insn(pc, &s.info);
732
- fprintf(out, "\n");
733
- if (count < 0) {
734
- break;
735
- }
736
- }
737
-
738
-}
739
-
740
-/* Look up symbol for debugging purpose. Returns "" if unknown. */
741
-const char *lookup_symbol(uint64_t orig_addr)
742
-{
743
- const char *symbol = "";
744
- struct syminfo *s;
745
-
746
- for (s = syminfos; s; s = s->next) {
747
- symbol = s->lookup_symbol(s, orig_addr);
748
- if (symbol[0] != '\0') {
749
- break;
750
- }
751
- }
752
-
753
- return symbol;
754
-}
755
diff --git a/disas/objdump.c b/disas/objdump.c
756
new file mode 100644
757
index XXXXXXX..XXXXXXX
758
--- /dev/null
759
+++ b/disas/objdump.c
760
@@ -XXX,XX +XXX,XX @@
761
+/*
762
+ * Dump disassembly as text, for processing by scripts/disas-objdump.pl.
763
+ * SPDX-License-Identifier: GPL-2.0-or-later
764
+ */
765
+
766
+#include "qemu/osdep.h"
767
+#include "disas-internal.h"
768
+
769
+
770
+static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
771
+ const char *prefix)
772
+{
773
+ int i, n = info->buffer_length;
774
+ g_autofree uint8_t *buf = g_malloc(n);
775
+
776
+ if (info->read_memory_func(pc, buf, n, info) == 0) {
777
+ for (i = 0; i < n; ++i) {
778
+ if (i % 32 == 0) {
779
+ info->fprintf_func(info->stream, "\n%s: ", prefix);
780
+ }
781
+ info->fprintf_func(info->stream, "%02x", buf[i]);
782
+ }
783
+ } else {
784
+ info->fprintf_func(info->stream, "unable to read memory");
785
+ }
786
+ return n;
787
+}
788
+
789
+int print_insn_od_host(bfd_vma pc, disassemble_info *info)
790
+{
791
+ return print_insn_objdump(pc, info, "OBJD-H");
792
+}
793
+
794
+int print_insn_od_target(bfd_vma pc, disassemble_info *info)
795
+{
796
+ return print_insn_objdump(pc, info, "OBJD-T");
797
+}
798
diff --git a/disas/meson.build b/disas/meson.build
799
index XXXXXXX..XXXXXXX 100644
800
--- a/disas/meson.build
801
+++ b/disas/meson.build
802
@@ -XXX,XX +XXX,XX @@ common_ss.add(when: 'CONFIG_SH4_DIS', if_true: files('sh4.c'))
803
common_ss.add(when: 'CONFIG_SPARC_DIS', if_true: files('sparc.c'))
804
common_ss.add(when: 'CONFIG_XTENSA_DIS', if_true: files('xtensa.c'))
805
common_ss.add(when: capstone, if_true: [files('capstone.c'), capstone])
806
-common_ss.add(files('disas.c'))
807
-
808
+common_ss.add(when: 'CONFIG_TCG', if_true: files(
809
+ 'disas-host.c',
810
+ 'disas-target.c',
811
+ 'objdump.c'
812
+))
813
+common_ss.add(files('disas-common.c'))
814
system_ss.add(files('disas-mon.c'))
815
specific_ss.add(capstone)
816
--
817
2.34.1
818
819
diff view generated by jsdifflib
Deleted patch
1
Read from already translated pages, or saved mmio data.
2
1
3
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
include/disas/disas.h | 5 +++--
7
include/exec/translator.h | 4 ++--
8
include/qemu/typedefs.h | 1 +
9
accel/tcg/translator.c | 2 +-
10
disas/disas-common.c | 14 --------------
11
disas/disas-mon.c | 15 +++++++++++++++
12
disas/disas-target.c | 19 +++++++++++++++++--
13
plugins/api.c | 4 ++--
14
8 files changed, 41 insertions(+), 23 deletions(-)
15
16
diff --git a/include/disas/disas.h b/include/disas/disas.h
17
index XXXXXXX..XXXXXXX 100644
18
--- a/include/disas/disas.h
19
+++ b/include/disas/disas.h
20
@@ -XXX,XX +XXX,XX @@
21
/* Disassemble this for me please... (debugging). */
22
#ifdef CONFIG_TCG
23
void disas(FILE *out, const void *code, size_t size);
24
-void target_disas(FILE *out, CPUState *cpu, uint64_t code, size_t size);
25
+void target_disas(FILE *out, CPUState *cpu, const DisasContextBase *db);
26
#endif
27
28
void monitor_disas(Monitor *mon, CPUState *cpu, uint64_t pc,
29
int nb_insn, bool is_physical);
30
31
#ifdef CONFIG_PLUGIN
32
-char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size);
33
+char *plugin_disas(CPUState *cpu, const DisasContextBase *db,
34
+ uint64_t addr, size_t size);
35
#endif
36
37
/* Look up symbol for debugging purpose. Returns "" if unknown. */
38
diff --git a/include/exec/translator.h b/include/exec/translator.h
39
index XXXXXXX..XXXXXXX 100644
40
--- a/include/exec/translator.h
41
+++ b/include/exec/translator.h
42
@@ -XXX,XX +XXX,XX @@ typedef enum DisasJumpType {
43
*
44
* Architecture-agnostic disassembly context.
45
*/
46
-typedef struct DisasContextBase {
47
+struct DisasContextBase {
48
TranslationBlock *tb;
49
vaddr pc_first;
50
vaddr pc_next;
51
@@ -XXX,XX +XXX,XX @@ typedef struct DisasContextBase {
52
int record_start;
53
int record_len;
54
uint8_t record[32];
55
-} DisasContextBase;
56
+};
57
58
/**
59
* TranslatorOps:
60
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
61
index XXXXXXX..XXXXXXX 100644
62
--- a/include/qemu/typedefs.h
63
+++ b/include/qemu/typedefs.h
64
@@ -XXX,XX +XXX,XX @@ typedef struct CPUPluginState CPUPluginState;
65
typedef struct CPUState CPUState;
66
typedef struct DeviceState DeviceState;
67
typedef struct DirtyBitmapSnapshot DirtyBitmapSnapshot;
68
+typedef struct DisasContextBase DisasContextBase;
69
typedef struct DisplayChangeListener DisplayChangeListener;
70
typedef struct DriveInfo DriveInfo;
71
typedef struct DumpState DumpState;
72
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
73
index XXXXXXX..XXXXXXX 100644
74
--- a/accel/tcg/translator.c
75
+++ b/accel/tcg/translator.c
76
@@ -XXX,XX +XXX,XX @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
77
if (!ops->disas_log ||
78
!ops->disas_log(db, cpu, logfile)) {
79
fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first));
80
- target_disas(logfile, cpu, db->pc_first, db->tb->size);
81
+ target_disas(logfile, cpu, db);
82
}
83
fprintf(logfile, "\n");
84
qemu_log_unlock(logfile);
85
diff --git a/disas/disas-common.c b/disas/disas-common.c
86
index XXXXXXX..XXXXXXX 100644
87
--- a/disas/disas-common.c
88
+++ b/disas/disas-common.c
89
@@ -XXX,XX +XXX,XX @@
90
#include "disas/capstone.h"
91
#include "hw/core/cpu.h"
92
#include "exec/tswap.h"
93
-#include "exec/memory.h"
94
#include "disas-internal.h"
95
96
97
/* Filled in by elfload.c. Simplistic, but will do for now. */
98
struct syminfo *syminfos = NULL;
99
100
-/*
101
- * Get LENGTH bytes from info's buffer, at target address memaddr.
102
- * Transfer them to myaddr.
103
- */
104
-static int target_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
105
- struct disassemble_info *info)
106
-{
107
- CPUDebug *s = container_of(info, CPUDebug, info);
108
- int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
109
- return r ? EIO : 0;
110
-}
111
-
112
/*
113
* Print an error message. We can assume that this is in response to
114
* an error return from {host,target}_read_memory.
115
@@ -XXX,XX +XXX,XX @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu)
116
disas_initialize_debug(s);
117
118
s->cpu = cpu;
119
- s->info.read_memory_func = target_read_memory;
120
s->info.print_address_func = print_address;
121
if (target_words_bigendian()) {
122
s->info.endian = BFD_ENDIAN_BIG;
123
diff --git a/disas/disas-mon.c b/disas/disas-mon.c
124
index XXXXXXX..XXXXXXX 100644
125
--- a/disas/disas-mon.c
126
+++ b/disas/disas-mon.c
127
@@ -XXX,XX +XXX,XX @@
128
#include "hw/core/cpu.h"
129
#include "monitor/monitor.h"
130
131
+/*
132
+ * Get LENGTH bytes from info's buffer, at target address memaddr.
133
+ * Transfer them to myaddr.
134
+ */
135
+static int
136
+virtual_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
137
+ struct disassemble_info *info)
138
+{
139
+ CPUDebug *s = container_of(info, CPUDebug, info);
140
+ int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
141
+ return r ? EIO : 0;
142
+}
143
+
144
static int
145
physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
146
struct disassemble_info *info)
147
@@ -XXX,XX +XXX,XX @@ void monitor_disas(Monitor *mon, CPUState *cpu, uint64_t pc,
148
149
if (is_physical) {
150
s.info.read_memory_func = physical_read_memory;
151
+ } else {
152
+ s.info.read_memory_func = virtual_read_memory;
153
}
154
s.info.buffer_vma = pc;
155
156
diff --git a/disas/disas-target.c b/disas/disas-target.c
157
index XXXXXXX..XXXXXXX 100644
158
--- a/disas/disas-target.c
159
+++ b/disas/disas-target.c
160
@@ -XXX,XX +XXX,XX @@
161
#include "qemu/osdep.h"
162
#include "disas/disas.h"
163
#include "disas/capstone.h"
164
+#include "exec/translator.h"
165
#include "disas-internal.h"
166
167
168
-void target_disas(FILE *out, CPUState *cpu, uint64_t code, size_t size)
169
+static int translator_read_memory(bfd_vma memaddr, bfd_byte *myaddr,
170
+ int length, struct disassemble_info *info)
171
{
172
+ const DisasContextBase *db = info->application_data;
173
+ return translator_st(db, myaddr, memaddr, length) ? 0 : EIO;
174
+}
175
+
176
+void target_disas(FILE *out, CPUState *cpu, const struct DisasContextBase *db)
177
+{
178
+ uint64_t code = db->pc_first;
179
+ size_t size = translator_st_len(db);
180
uint64_t pc;
181
int count;
182
CPUDebug s;
183
184
disas_initialize_debug_target(&s, cpu);
185
+ s.info.read_memory_func = translator_read_memory;
186
+ s.info.application_data = (void *)db;
187
s.info.fprintf_func = fprintf;
188
s.info.stream = out;
189
s.info.buffer_vma = code;
190
@@ -XXX,XX +XXX,XX @@ static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
191
* there is left over it usually indicates the front end has read more
192
* bytes than it needed.
193
*/
194
-char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
195
+char *plugin_disas(CPUState *cpu, const DisasContextBase *db,
196
+ uint64_t addr, size_t size)
197
{
198
CPUDebug s;
199
GString *ds = g_string_new(NULL);
200
201
disas_initialize_debug_target(&s, cpu);
202
+ s.info.read_memory_func = translator_read_memory;
203
+ s.info.application_data = (void *)db;
204
s.info.fprintf_func = disas_gstring_printf;
205
s.info.stream = (FILE *)ds; /* abuse this slot */
206
s.info.buffer_vma = addr;
207
diff --git a/plugins/api.c b/plugins/api.c
208
index XXXXXXX..XXXXXXX 100644
209
--- a/plugins/api.c
210
+++ b/plugins/api.c
211
@@ -XXX,XX +XXX,XX @@ void *qemu_plugin_insn_haddr(const struct qemu_plugin_insn *insn)
212
213
char *qemu_plugin_insn_disas(const struct qemu_plugin_insn *insn)
214
{
215
- CPUState *cpu = current_cpu;
216
- return plugin_disas(cpu, insn->vaddr, insn->len);
217
+ return plugin_disas(tcg_ctx->cpu, tcg_ctx->plugin_db,
218
+ insn->vaddr, insn->len);
219
}
220
221
const char *qemu_plugin_insn_symbol(const struct qemu_plugin_insn *insn)
222
--
223
2.34.1
224
225
diff view generated by jsdifflib
Deleted patch
1
Replace translator_fake_ldb, which required multiple calls,
2
with translator_fake_ld, which can take all data at once.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/translator.h | 8 ++++----
8
accel/tcg/translator.c | 5 ++---
9
target/s390x/tcg/translate.c | 8 ++++----
10
3 files changed, 10 insertions(+), 11 deletions(-)
11
12
diff --git a/include/exec/translator.h b/include/exec/translator.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/exec/translator.h
15
+++ b/include/exec/translator.h
16
@@ -XXX,XX +XXX,XX @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
17
}
18
19
/**
20
- * translator_fake_ldb - fake instruction load
21
+ * translator_fake_ld - fake instruction load
22
* @db: Disassembly context
23
- * @pc: program counter of instruction
24
- * @insn8: byte of instruction
25
+ * @data: bytes of instruction
26
+ * @len: number of bytes
27
*
28
* This is a special case helper used where the instruction we are
29
* about to translate comes from somewhere else (e.g. being
30
* re-synthesised for s390x "ex"). It ensures we update other areas of
31
* the translator with details of the executed instruction.
32
*/
33
-void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8);
34
+void translator_fake_ld(DisasContextBase *db, const void *data, size_t len);
35
36
/**
37
* translator_st
38
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
39
index XXXXXXX..XXXXXXX 100644
40
--- a/accel/tcg/translator.c
41
+++ b/accel/tcg/translator.c
42
@@ -XXX,XX +XXX,XX @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
43
return tgt;
44
}
45
46
-void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
47
+void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
48
{
49
- assert(pc >= db->pc_first);
50
db->fake_insn = true;
51
- record_save(db, pc, &insn8, sizeof(insn8));
52
+ record_save(db, db->pc_first, data, len);
53
}
54
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
55
index XXXXXXX..XXXXXXX 100644
56
--- a/target/s390x/tcg/translate.c
57
+++ b/target/s390x/tcg/translate.c
58
@@ -XXX,XX +XXX,XX @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s)
59
const DisasInsn *info;
60
61
if (unlikely(s->ex_value)) {
62
+ uint64_t be_insn;
63
+
64
/* Drop the EX data now, so that it's clear on exception paths. */
65
tcg_gen_st_i64(tcg_constant_i64(0), tcg_env,
66
offsetof(CPUS390XState, ex_value));
67
@@ -XXX,XX +XXX,XX @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s)
68
ilen = s->ex_value & 0xf;
69
70
/* Register insn bytes with translator so plugins work. */
71
- for (int i = 0; i < ilen; i++) {
72
- uint8_t byte = extract64(insn, 56 - (i * 8), 8);
73
- translator_fake_ldb(&s->base, pc + i, byte);
74
- }
75
+ be_insn = cpu_to_be64(insn);
76
+ translator_fake_ld(&s->base, &be_insn, ilen);
77
op = insn >> 56;
78
} else {
79
insn = ld_code2(env, s, pc);
80
--
81
2.34.1
82
83
diff view generated by jsdifflib
Deleted patch
1
The ilen value extracted from ex_value is the length of the
2
EXECUTE instruction itself, and so is the increment to the pc.
3
However, the length of the synthetic insn is located in the
4
opcode like all other instructions.
5
1
6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
target/s390x/tcg/translate.c | 4 ++--
10
1 file changed, 2 insertions(+), 2 deletions(-)
11
12
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/target/s390x/tcg/translate.c
15
+++ b/target/s390x/tcg/translate.c
16
@@ -XXX,XX +XXX,XX @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s)
17
/* Extract the values saved by EXECUTE. */
18
insn = s->ex_value & 0xffffffffffff0000ull;
19
ilen = s->ex_value & 0xf;
20
+ op = insn >> 56;
21
22
/* Register insn bytes with translator so plugins work. */
23
be_insn = cpu_to_be64(insn);
24
- translator_fake_ld(&s->base, &be_insn, ilen);
25
- op = insn >> 56;
26
+ translator_fake_ld(&s->base, &be_insn, get_ilen(op));
27
} else {
28
insn = ld_code2(env, s, pc);
29
op = (insn >> 8) & 0xff;
30
--
31
2.34.1
32
33
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
target/s390x/tcg/translate.c | 5 +++--
5
1 file changed, 3 insertions(+), 2 deletions(-)
6
1
7
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/target/s390x/tcg/translate.c
10
+++ b/target/s390x/tcg/translate.c
11
@@ -XXX,XX +XXX,XX @@ static bool s390x_tr_disas_log(const DisasContextBase *dcbase,
12
DisasContext *dc = container_of(dcbase, DisasContext, base);
13
14
if (unlikely(dc->ex_value)) {
15
- /* ??? Unfortunately target_disas can't use host memory. */
16
- fprintf(logfile, "IN: EXECUTE %016" PRIx64, dc->ex_value);
17
+ /* The ex_value has been recorded with translator_fake_ld. */
18
+ fprintf(logfile, "IN: EXECUTE\n");
19
+ target_disas(logfile, cs, &dc->base);
20
return true;
21
}
22
return false;
23
--
24
2.34.1
25
26
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
target/hexagon/translate.c | 3 +--
5
1 file changed, 1 insertion(+), 2 deletions(-)
6
1
7
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/target/hexagon/translate.c
10
+++ b/target/hexagon/translate.c
11
@@ -XXX,XX +XXX,XX @@
12
#include "exec/translation-block.h"
13
#include "exec/cpu_ldst.h"
14
#include "exec/log.h"
15
-#include "exec/cpu_ldst.h"
16
#include "internal.h"
17
#include "attribs.h"
18
#include "insn.h"
19
@@ -XXX,XX +XXX,XX @@ static bool pkt_crosses_page(CPUHexagonState *env, DisasContext *ctx)
20
int nwords;
21
22
for (nwords = 0; !found_end && nwords < PACKET_WORDS_MAX; nwords++) {
23
- uint32_t word = cpu_ldl_code(env,
24
+ uint32_t word = translator_ldl(env, &ctx->base,
25
ctx->base.pc_next + nwords * sizeof(uint32_t));
26
found_end = is_packet_end(word);
27
}
28
--
29
2.34.1
30
31
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
target/microblaze/translate.c | 3 +--
6
1 file changed, 1 insertion(+), 2 deletions(-)
7
1
8
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
9
index XXXXXXX..XXXXXXX 100644
10
--- a/target/microblaze/translate.c
11
+++ b/target/microblaze/translate.c
12
@@ -XXX,XX +XXX,XX @@
13
#include "tcg/tcg-op.h"
14
#include "exec/helper-proto.h"
15
#include "exec/helper-gen.h"
16
-#include "exec/cpu_ldst.h"
17
#include "exec/translator.h"
18
#include "qemu/qemu-print.h"
19
20
@@ -XXX,XX +XXX,XX @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs)
21
22
dc->tb_flags_to_set = 0;
23
24
- ir = cpu_ldl_code(cpu_env(cs), dc->base.pc_next);
25
+ ir = translator_ldl(cpu_env(cs), &dc->base, dc->base.pc_next);
26
if (!decode(dc, ir)) {
27
trap_illegal(dc, true);
28
}
29
--
30
2.34.1
31
32
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
target/i386/tcg/translate.c | 8 +++-----
5
1 file changed, 3 insertions(+), 5 deletions(-)
6
1
7
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/target/i386/tcg/translate.c
10
+++ b/target/i386/tcg/translate.c
11
@@ -XXX,XX +XXX,XX @@
12
#include "exec/exec-all.h"
13
#include "tcg/tcg-op.h"
14
#include "tcg/tcg-op-gvec.h"
15
-#include "exec/cpu_ldst.h"
16
#include "exec/translator.h"
17
#include "fpu/softfloat.h"
18
19
@@ -XXX,XX +XXX,XX @@ static uint64_t advance_pc(CPUX86State *env, DisasContext *s, int num_bytes)
20
* This can happen even if the operand is only one byte long!
21
*/
22
if (((s->pc - 1) ^ (pc - 1)) & TARGET_PAGE_MASK) {
23
- volatile uint8_t unused =
24
- cpu_ldub_code(env, (s->pc - 1) & TARGET_PAGE_MASK);
25
- (void) unused;
26
+ (void)translator_ldub(env, &s->base,
27
+ (s->pc - 1) & TARGET_PAGE_MASK);
28
}
29
siglongjmp(s->jmpbuf, 1);
30
}
31
@@ -XXX,XX +XXX,XX @@ static void gen_unknown_opcode(CPUX86State *env, DisasContext *s)
32
33
fprintf(logfile, "ILLOPC: " TARGET_FMT_lx ":", pc);
34
for (; pc < end; ++pc) {
35
- fprintf(logfile, " %02x", cpu_ldub_code(env, pc));
36
+ fprintf(logfile, " %02x", translator_ldub(env, &s->base, pc));
37
}
38
fprintf(logfile, "\n");
39
qemu_log_unlock(logfile);
40
--
41
2.34.1
42
43
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
target/avr/translate.c | 3 +--
5
1 file changed, 1 insertion(+), 2 deletions(-)
6
1
7
diff --git a/target/avr/translate.c b/target/avr/translate.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/target/avr/translate.c
10
+++ b/target/avr/translate.c
11
@@ -XXX,XX +XXX,XX @@
12
#include "cpu.h"
13
#include "exec/exec-all.h"
14
#include "tcg/tcg-op.h"
15
-#include "exec/cpu_ldst.h"
16
#include "exec/helper-proto.h"
17
#include "exec/helper-gen.h"
18
#include "exec/log.h"
19
@@ -XXX,XX +XXX,XX @@ static int to_regs_00_30_by_two(DisasContext *ctx, int indx)
20
21
static uint16_t next_word(DisasContext *ctx)
22
{
23
- return cpu_lduw_code(ctx->env, ctx->npc++ * 2);
24
+ return translator_lduw(ctx->env, &ctx->base, ctx->npc++ * 2);
25
}
26
27
static int append_16(DisasContext *ctx, int x)
28
--
29
2.34.1
30
31
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
target/cris/translate.c | 25 ++++++++-----------------
6
1 file changed, 8 insertions(+), 17 deletions(-)
7
1
8
diff --git a/target/cris/translate.c b/target/cris/translate.c
9
index XXXXXXX..XXXXXXX 100644
10
--- a/target/cris/translate.c
11
+++ b/target/cris/translate.c
12
@@ -XXX,XX +XXX,XX @@ static int sign_extend(unsigned int val, unsigned int width)
13
}
14
15
static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr,
16
- unsigned int size, unsigned int sign)
17
+ unsigned int size, bool sign)
18
{
19
int r;
20
21
switch (size) {
22
case 4:
23
- {
24
- r = cpu_ldl_code(env, addr);
25
+ r = translator_ldl(env, &dc->base, addr);
26
break;
27
- }
28
case 2:
29
- {
30
+ r = translator_lduw(env, &dc->base, addr);
31
if (sign) {
32
- r = cpu_ldsw_code(env, addr);
33
- } else {
34
- r = cpu_lduw_code(env, addr);
35
+ r = (int16_t)r;
36
}
37
break;
38
- }
39
case 1:
40
- {
41
+ r = translator_ldub(env, &dc->base, addr);
42
if (sign) {
43
- r = cpu_ldsb_code(env, addr);
44
- } else {
45
- r = cpu_ldub_code(env, addr);
46
+ r = (int8_t)r;
47
}
48
break;
49
- }
50
default:
51
- cpu_abort(CPU(dc->cpu), "Invalid fetch size %d\n", size);
52
- break;
53
+ g_assert_not_reached();
54
}
55
return r;
56
}
57
@@ -XXX,XX +XXX,XX @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc)
58
int i;
59
60
/* Load a halfword onto the instruction register. */
61
- dc->ir = cris_fetch(env, dc, dc->pc, 2, 0);
62
+ dc->ir = cris_fetch(env, dc, dc->pc, 2, 0);
63
64
/* Now decode it. */
65
dc->opcode = EXTRACT_FIELD(dc->ir, 4, 11);
66
--
67
2.34.1
68
69
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
target/cris/translate.c | 1 -
6
target/cris/translate_v10.c.inc | 30 +++++++++---------------------
7
2 files changed, 9 insertions(+), 22 deletions(-)
8
1
9
diff --git a/target/cris/translate.c b/target/cris/translate.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/target/cris/translate.c
12
+++ b/target/cris/translate.c
13
@@ -XXX,XX +XXX,XX @@
14
#include "tcg/tcg-op.h"
15
#include "exec/helper-proto.h"
16
#include "mmu.h"
17
-#include "exec/cpu_ldst.h"
18
#include "exec/translator.h"
19
#include "crisv32-decode.h"
20
#include "qemu/qemu-print.h"
21
diff --git a/target/cris/translate_v10.c.inc b/target/cris/translate_v10.c.inc
22
index XXXXXXX..XXXXXXX 100644
23
--- a/target/cris/translate_v10.c.inc
24
+++ b/target/cris/translate_v10.c.inc
25
@@ -XXX,XX +XXX,XX @@ static int dec10_prep_move_m(CPUCRISState *env, DisasContext *dc,
26
27
/* Load [$rs] onto T1. */
28
if (is_imm) {
29
- if (memsize != 4) {
30
- if (s_ext) {
31
- if (memsize == 1)
32
- imm = cpu_ldsb_code(env, dc->pc + 2);
33
- else
34
- imm = cpu_ldsw_code(env, dc->pc + 2);
35
- } else {
36
- if (memsize == 1)
37
- imm = cpu_ldub_code(env, dc->pc + 2);
38
- else
39
- imm = cpu_lduw_code(env, dc->pc + 2);
40
- }
41
- } else
42
- imm = cpu_ldl_code(env, dc->pc + 2);
43
+ imm = cris_fetch(env, dc, dc->pc + 2, memsize, s_ext);
44
45
tcg_gen_movi_tl(dst, imm);
46
47
@@ -XXX,XX +XXX,XX @@ static int dec10_dip(CPUCRISState *env, DisasContext *dc)
48
LOG_DIS("dip pc=%x opcode=%d r%d r%d\n",
49
dc->pc, dc->opcode, dc->src, dc->dst);
50
if (dc->src == 15) {
51
- imm = cpu_ldl_code(env, dc->pc + 2);
52
+ imm = cris_fetch(env, dc, dc->pc + 2, 4, 0);
53
tcg_gen_movi_tl(cpu_PR[PR_PREFIX], imm);
54
- if (dc->postinc)
55
+ if (dc->postinc) {
56
insn_len += 4;
57
+ }
58
tcg_gen_addi_tl(cpu_R[15], cpu_R[15], insn_len - 2);
59
} else {
60
gen_load(dc, cpu_PR[PR_PREFIX], cpu_R[dc->src], 4, 0);
61
@@ -XXX,XX +XXX,XX @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
62
if (dc->src == 15) {
63
LOG_DIS("jump.%d %d r%d r%d direct\n", size,
64
dc->opcode, dc->src, dc->dst);
65
- imm = cpu_ldl_code(env, dc->pc + 2);
66
- if (dc->mode == CRISV10_MODE_AUTOINC)
67
+ imm = cris_fetch(env, dc, dc->pc + 2, size, 0);
68
+ if (dc->mode == CRISV10_MODE_AUTOINC) {
69
insn_len += size;
70
-
71
+ }
72
c = tcg_constant_tl(dc->pc + insn_len);
73
t_gen_mov_preg_TN(dc, dc->dst, c);
74
dc->jmp_pc = imm;
75
@@ -XXX,XX +XXX,XX @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
76
case CRISV10_IND_BCC_M:
77
78
cris_cc_mask(dc, 0);
79
- simm = cpu_ldsw_code(env, dc->pc + 2);
80
+ simm = cris_fetch(env, dc, dc->pc + 2, 2, 1);
81
simm += 4;
82
83
LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm);
84
@@ -XXX,XX +XXX,XX @@ static unsigned int crisv10_decoder(CPUCRISState *env, DisasContext *dc)
85
unsigned int insn_len = 2;
86
87
/* Load a halfword onto the instruction register. */
88
- dc->ir = cpu_lduw_code(env, dc->pc);
89
+ dc->ir = cris_fetch(env, dc, dc->pc, 2, 0);
90
91
/* Now decode it. */
92
dc->opcode = EXTRACT_FIELD(dc->ir, 6, 9);
93
--
94
2.34.1
95
96
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
target/riscv/translate.c | 6 +++---
6
1 file changed, 3 insertions(+), 3 deletions(-)
7
1
8
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
9
index XXXXXXX..XXXXXXX 100644
10
--- a/target/riscv/translate.c
11
+++ b/target/riscv/translate.c
12
@@ -XXX,XX +XXX,XX @@
13
#include "qemu/log.h"
14
#include "cpu.h"
15
#include "tcg/tcg-op.h"
16
-#include "exec/cpu_ldst.h"
17
#include "exec/exec-all.h"
18
#include "exec/helper-proto.h"
19
#include "exec/helper-gen.h"
20
@@ -XXX,XX +XXX,XX @@ static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc)
21
CPUState *cpu = ctx->cs;
22
CPURISCVState *env = cpu_env(cpu);
23
24
- return cpu_ldl_code(env, pc);
25
+ return translator_ldl(env, &ctx->base, pc);
26
}
27
28
/* Include insn module translation function */
29
@@ -XXX,XX +XXX,XX @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
30
unsigned page_ofs = ctx->base.pc_next & ~TARGET_PAGE_MASK;
31
32
if (page_ofs > TARGET_PAGE_SIZE - MAX_INSN_LEN) {
33
- uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next);
34
+ uint16_t next_insn =
35
+ translator_lduw(env, &ctx->base, ctx->base.pc_next);
36
int len = insn_len(next_insn);
37
38
if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
39
--
40
2.34.1
41
42
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
target/rx/translate.c | 27 ++++++++++++++-------------
6
1 file changed, 14 insertions(+), 13 deletions(-)
7
1
8
diff --git a/target/rx/translate.c b/target/rx/translate.c
9
index XXXXXXX..XXXXXXX 100644
10
--- a/target/rx/translate.c
11
+++ b/target/rx/translate.c
12
@@ -XXX,XX +XXX,XX @@
13
#include "cpu.h"
14
#include "exec/exec-all.h"
15
#include "tcg/tcg-op.h"
16
-#include "exec/cpu_ldst.h"
17
#include "exec/helper-proto.h"
18
#include "exec/helper-gen.h"
19
#include "exec/translator.h"
20
@@ -XXX,XX +XXX,XX @@ static TCGv_i64 cpu_acc;
21
22
/* decoder helper */
23
static uint32_t decode_load_bytes(DisasContext *ctx, uint32_t insn,
24
- int i, int n)
25
+ int i, int n)
26
{
27
while (++i <= n) {
28
- uint8_t b = cpu_ldub_code(ctx->env, ctx->base.pc_next++);
29
+ uint8_t b = translator_ldub(ctx->env, &ctx->base, ctx->base.pc_next++);
30
insn |= b << (32 - i * 8);
31
}
32
return insn;
33
@@ -XXX,XX +XXX,XX @@ static uint32_t li(DisasContext *ctx, int sz)
34
CPURXState *env = ctx->env;
35
addr = ctx->base.pc_next;
36
37
- tcg_debug_assert(sz < 4);
38
switch (sz) {
39
case 1:
40
ctx->base.pc_next += 1;
41
- return cpu_ldsb_code(env, addr);
42
+ return (int8_t)translator_ldub(env, &ctx->base, addr);
43
case 2:
44
ctx->base.pc_next += 2;
45
- return cpu_ldsw_code(env, addr);
46
+ return (int16_t)translator_lduw(env, &ctx->base, addr);
47
case 3:
48
ctx->base.pc_next += 3;
49
- tmp = cpu_ldsb_code(env, addr + 2) << 16;
50
- tmp |= cpu_lduw_code(env, addr) & 0xffff;
51
+ tmp = (int8_t)translator_ldub(env, &ctx->base, addr + 2);
52
+ tmp <<= 16;
53
+ tmp |= translator_lduw(env, &ctx->base, addr);
54
return tmp;
55
case 0:
56
ctx->base.pc_next += 4;
57
- return cpu_ldl_code(env, addr);
58
+ return translator_ldl(env, &ctx->base, addr);
59
+ default:
60
+ g_assert_not_reached();
61
}
62
return 0;
63
}
64
@@ -XXX,XX +XXX,XX @@ static inline TCGv rx_index_addr(DisasContext *ctx, TCGv mem,
65
{
66
uint32_t dsp;
67
68
- tcg_debug_assert(ld < 3);
69
switch (ld) {
70
case 0:
71
return cpu_regs[reg];
72
case 1:
73
- dsp = cpu_ldub_code(ctx->env, ctx->base.pc_next) << size;
74
+ dsp = translator_ldub(ctx->env, &ctx->base, ctx->base.pc_next) << size;
75
tcg_gen_addi_i32(mem, cpu_regs[reg], dsp);
76
ctx->base.pc_next += 1;
77
return mem;
78
case 2:
79
- dsp = cpu_lduw_code(ctx->env, ctx->base.pc_next) << size;
80
+ dsp = translator_lduw(ctx->env, &ctx->base, ctx->base.pc_next) << size;
81
tcg_gen_addi_i32(mem, cpu_regs[reg], dsp);
82
ctx->base.pc_next += 2;
83
return mem;
84
+ default:
85
+ g_assert_not_reached();
86
}
87
- return NULL;
88
}
89
90
static inline MemOp mi_to_mop(unsigned mi)
91
--
92
2.34.1
93
94
diff view generated by jsdifflib
Deleted patch
1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
target/xtensa/translate.c | 3 +--
5
1 file changed, 1 insertion(+), 2 deletions(-)
6
1
7
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/target/xtensa/translate.c
10
+++ b/target/xtensa/translate.c
11
@@ -XXX,XX +XXX,XX @@
12
#include "tcg/tcg-op.h"
13
#include "qemu/log.h"
14
#include "qemu/qemu-print.h"
15
-#include "exec/cpu_ldst.h"
16
#include "semihosting/semihost.h"
17
#include "exec/translator.h"
18
19
@@ -XXX,XX +XXX,XX @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
20
21
static inline unsigned xtensa_insn_len(CPUXtensaState *env, DisasContext *dc)
22
{
23
- uint8_t b0 = cpu_ldub_code(env, dc->pc);
24
+ uint8_t b0 = translator_ldub(env, &dc->base, dc->pc);
25
return xtensa_op0_insn_len(dc, b0);
26
}
27
28
--
29
2.34.1
30
31
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Previous commits replaced them by translator_ld* calls.
3
Rather than manually copying each register, use
4
the libc memcpy(), which is well optimized nowadays.
4
5
6
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
7
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
6
Message-Id: <20240405131532.40913-1-philmd@linaro.org>
10
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
12
---
9
include/exec/cpu_ldst.h | 10 ----------
13
target/sparc/win_helper.c | 26 ++++++++------------------
10
1 file changed, 10 deletions(-)
14
1 file changed, 8 insertions(+), 18 deletions(-)
11
15
12
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
16
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
13
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
14
--- a/include/exec/cpu_ldst.h
18
--- a/target/sparc/win_helper.c
15
+++ b/include/exec/cpu_ldst.h
19
+++ b/target/sparc/win_helper.c
16
@@ -XXX,XX +XXX,XX @@ uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr);
20
@@ -XXX,XX +XXX,XX @@
17
uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr);
21
#include "exec/helper-proto.h"
18
uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr);
22
#include "trace.h"
19
23
20
-static inline int cpu_ldsb_code(CPUArchState *env, abi_ptr addr)
24
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
21
-{
25
-{
22
- return (int8_t)cpu_ldub_code(env, addr);
26
- dst[0] = src[0];
27
- dst[1] = src[1];
28
- dst[2] = src[2];
29
- dst[3] = src[3];
30
- dst[4] = src[4];
31
- dst[5] = src[5];
32
- dst[6] = src[6];
33
- dst[7] = src[7];
23
-}
34
-}
24
-
35
-
25
-static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr)
36
void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
26
-{
37
{
27
- return (int16_t)cpu_lduw_code(env, addr);
38
/* put the modified wrap registers at their proper location */
28
-}
39
if (env->cwp == env->nwindows - 1) {
29
-
40
- memcpy32(env->regbase, env->regbase + env->nwindows * 16);
30
/**
41
+ memcpy(env->regbase, env->regbase + env->nwindows * 16,
31
* tlb_vaddr_to_host:
42
+ sizeof(env->gregs));
32
* @env: CPUArchState
43
}
44
env->cwp = new_cwp;
45
46
/* put the wrap registers at their temporary location */
47
if (new_cwp == env->nwindows - 1) {
48
- memcpy32(env->regbase + env->nwindows * 16, env->regbase);
49
+ memcpy(env->regbase + env->nwindows * 16, env->regbase,
50
+ sizeof(env->gregs));
51
}
52
env->regwptr = env->regbase + (new_cwp * 16);
53
}
54
@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
55
dst = get_gl_gregset(env, env->gl);
56
57
if (src != dst) {
58
- memcpy32(dst, env->gregs);
59
- memcpy32(env->gregs, src);
60
+ memcpy(dst, env->gregs, sizeof(env->gregs));
61
+ memcpy(env->gregs, src, sizeof(env->gregs));
62
}
63
}
64
65
@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
66
/* Switch global register bank */
67
src = get_gregset(env, new_pstate_regs);
68
dst = get_gregset(env, pstate_regs);
69
- memcpy32(dst, env->gregs);
70
- memcpy32(env->gregs, src);
71
+ memcpy(dst, env->gregs, sizeof(env->gregs));
72
+ memcpy(env->gregs, src, sizeof(env->gregs));
73
} else {
74
trace_win_helper_no_switch_pstate(new_pstate_regs);
75
}
33
--
76
--
34
2.34.1
77
2.43.0
35
78
36
79
diff view generated by jsdifflib
Deleted patch
1
TCG register spill/fill uses tcg_out_ld/st with all types,
2
not necessarily going through INDEX_op_{ld,st}_vec.
3
1
4
Cc: qemu-stable@nongnu.org
5
Fixes: 16288ded944 ("tcg/loongarch64: Lower basic tcg vec ops to LSX")
6
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2336
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Song Gao <gaosong@loongson.cn>
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Tested-by: Song Gao <gaosong@loongson.cn>
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---
11
tcg/loongarch64/tcg-target.c.inc | 103 ++++++++++++++++++++++++-------
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1 file changed, 80 insertions(+), 23 deletions(-)
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14
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
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index XXXXXXX..XXXXXXX 100644
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--- a/tcg/loongarch64/tcg-target.c.inc
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+++ b/tcg/loongarch64/tcg-target.c.inc
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@@ -XXX,XX +XXX,XX @@ static void tcg_out_ldst(TCGContext *s, LoongArchInsn opc, TCGReg data,
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}
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}
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-static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
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- TCGReg arg1, intptr_t arg2)
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+static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg dest,
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+ TCGReg base, intptr_t offset)
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{
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- bool is_32bit = type == TCG_TYPE_I32;
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- tcg_out_ldst(s, is_32bit ? OPC_LD_W : OPC_LD_D, arg, arg1, arg2);
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+ switch (type) {
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+ case TCG_TYPE_I32:
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+ if (dest < TCG_REG_V0) {
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+ tcg_out_ldst(s, OPC_LD_W, dest, base, offset);
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+ } else {
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+ tcg_out_dupm_vec(s, TCG_TYPE_I128, MO_32, dest, base, offset);
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+ }
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+ break;
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+ case TCG_TYPE_I64:
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+ if (dest < TCG_REG_V0) {
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+ tcg_out_ldst(s, OPC_LD_D, dest, base, offset);
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+ } else {
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+ tcg_out_dupm_vec(s, TCG_TYPE_I128, MO_64, dest, base, offset);
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+ }
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+ break;
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+ case TCG_TYPE_V128:
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+ if (-0x800 <= offset && offset <= 0x7ff) {
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+ tcg_out_opc_vld(s, dest, base, offset);
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+ } else {
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+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset);
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+ tcg_out_opc_vldx(s, dest, base, TCG_REG_TMP0);
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+ }
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+ break;
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+ default:
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+ g_assert_not_reached();
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+ }
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}
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-static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
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- TCGReg arg1, intptr_t arg2)
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+static void tcg_out_st(TCGContext *s, TCGType type, TCGReg src,
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+ TCGReg base, intptr_t offset)
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{
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- bool is_32bit = type == TCG_TYPE_I32;
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- tcg_out_ldst(s, is_32bit ? OPC_ST_W : OPC_ST_D, arg, arg1, arg2);
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+ switch (type) {
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+ case TCG_TYPE_I32:
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+ if (src < TCG_REG_V0) {
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+ tcg_out_ldst(s, OPC_ST_W, src, base, offset);
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+ } else {
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+ /* TODO: Could use fst_s, fstx_s */
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+ if (offset < -0x100 || offset > 0xff || (offset & 3)) {
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+ if (-0x800 <= offset && offset <= 0x7ff) {
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+ tcg_out_opc_addi_d(s, TCG_REG_TMP0, base, offset);
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+ } else {
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+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset);
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+ tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP0, base);
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+ }
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+ base = TCG_REG_TMP0;
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+ offset = 0;
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+ }
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+ tcg_out_opc_vstelm_w(s, src, base, offset, 0);
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+ }
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+ break;
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+ case TCG_TYPE_I64:
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+ if (src < TCG_REG_V0) {
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+ tcg_out_ldst(s, OPC_ST_D, src, base, offset);
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+ } else {
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+ /* TODO: Could use fst_d, fstx_d */
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+ if (offset < -0x100 || offset > 0xff || (offset & 7)) {
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+ if (-0x800 <= offset && offset <= 0x7ff) {
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+ tcg_out_opc_addi_d(s, TCG_REG_TMP0, base, offset);
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+ } else {
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+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset);
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+ tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP0, base);
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+ }
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+ base = TCG_REG_TMP0;
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+ offset = 0;
97
+ }
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+ tcg_out_opc_vstelm_d(s, src, base, offset, 0);
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+ }
100
+ break;
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+ case TCG_TYPE_V128:
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+ if (-0x800 <= offset && offset <= 0x7ff) {
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+ tcg_out_opc_vst(s, src, base, offset);
104
+ } else {
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+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset);
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+ tcg_out_opc_vstx(s, src, base, TCG_REG_TMP0);
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+ }
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+ break;
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+ default:
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+ g_assert_not_reached();
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+ }
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}
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114
static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
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@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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{
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TCGType type = vecl + TCG_TYPE_V64;
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TCGArg a0, a1, a2, a3;
119
- TCGReg temp = TCG_REG_TMP0;
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TCGReg temp_vec = TCG_VEC_TMP0;
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122
static const LoongArchInsn cmp_vec_insn[16][4] = {
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@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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125
switch (opc) {
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case INDEX_op_st_vec:
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- /* Try to fit vst imm */
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- if (-0x800 <= a2 && a2 <= 0x7ff) {
129
- tcg_out_opc_vst(s, a0, a1, a2);
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- } else {
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- tcg_out_movi(s, TCG_TYPE_I64, temp, a2);
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- tcg_out_opc_vstx(s, a0, a1, temp);
133
- }
134
+ tcg_out_st(s, type, a0, a1, a2);
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break;
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case INDEX_op_ld_vec:
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- /* Try to fit vld imm */
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- if (-0x800 <= a2 && a2 <= 0x7ff) {
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- tcg_out_opc_vld(s, a0, a1, a2);
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- } else {
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- tcg_out_movi(s, TCG_TYPE_I64, temp, a2);
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- tcg_out_opc_vldx(s, a0, a1, temp);
143
- }
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+ tcg_out_ld(s, type, a0, a1, a2);
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break;
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case INDEX_op_and_vec:
147
tcg_out_opc_vand_v(s, a0, a1, a2);
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--
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2.34.1
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