[PULL 0/5] target-arm queue

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240402102951.3099078-1-peter.maydell@linaro.org
Maintainers: Radoslaw Biernacki <rad@semihalf.com>, Peter Maydell <peter.maydell@linaro.org>, Leif Lindholm <quic_llindhol@quicinc.com>, Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>, Thomas Huth <thuth@redhat.com>, Laurent Vivier <lvivier@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
There is a newer version of this series
docs/system/arm/sbsa.rst          | 35 +++++++++++++++++------
hw/arm/raspi4b.c                  |  4 +++
hw/intc/arm_gicv3_cpuif.c         |  4 +--
target/arm/tcg/translate.c        |  2 +-
tests/qtest/stm32l4x5_gpio-test.c | 59 +++++++++++++++++++++++----------------
5 files changed, 68 insertions(+), 36 deletions(-)
[PULL 0/5] target-arm queue
Posted by Peter Maydell 1 month ago
Nothing exciting here: two minor bug fixes, some fixes for
running on a 32-bit host, and a docs tweak.

thanks
-- PMM

The following changes since commit 6af9d12c88b9720f209912f6e4b01fefe5906d59:

  Merge tag 'migration-20240331-pull-request' of https://gitlab.com/peterx/qemu into staging (2024-04-01 13:12:40 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240402

for you to fetch changes up to 393770d7a02135e7468018f52da610712f151ec0:

  raspi4b: Reduce RAM to 1Gb on 32-bit hosts (2024-04-02 10:13:48 +0100)

----------------------------------------------------------------
target-arm queue:
 * take HSTR traps of cp15 accesses to EL2, not EL1
 * docs: sbsa: update specs, add dt note
 * hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled
 * tests/qtest: Fix STM32L4x5 GPIO test on 32-bit
 * raspi4b: Reduce RAM to 1Gb on 32-bit hosts

----------------------------------------------------------------
Cédric Le Goater (2):
      tests/qtest: Fix STM32L4x5 GPIO test on 32-bit
      raspi4b: Reduce RAM to 1Gb on 32-bit hosts

Marcin Juszkiewicz (1):
      docs: sbsa: update specs, add dt note

Peter Maydell (2):
      target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
      hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled

 docs/system/arm/sbsa.rst          | 35 +++++++++++++++++------
 hw/arm/raspi4b.c                  |  4 +++
 hw/intc/arm_gicv3_cpuif.c         |  4 +--
 target/arm/tcg/translate.c        |  2 +-
 tests/qtest/stm32l4x5_gpio-test.c | 59 +++++++++++++++++++++++----------------
 5 files changed, 68 insertions(+), 36 deletions(-)

Re: [PULL 0/5] target-arm queue
Posted by Peter Maydell 1 month ago
On Tue, 2 Apr 2024 at 11:29, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Nothing exciting here: two minor bug fixes, some fixes for
> running on a 32-bit host, and a docs tweak.
>
> thanks
> -- PMM
>
> The following changes since commit 6af9d12c88b9720f209912f6e4b01fefe5906d59:
>
>   Merge tag 'migration-20240331-pull-request' of https://gitlab.com/peterx/qemu into staging (2024-04-01 13:12:40 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240402
>
> for you to fetch changes up to 393770d7a02135e7468018f52da610712f151ec0:
>
>   raspi4b: Reduce RAM to 1Gb on 32-bit hosts (2024-04-02 10:13:48 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * take HSTR traps of cp15 accesses to EL2, not EL1
>  * docs: sbsa: update specs, add dt note
>  * hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled
>  * tests/qtest: Fix STM32L4x5 GPIO test on 32-bit
>  * raspi4b: Reduce RAM to 1Gb on 32-bit hosts


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.

-- PMM