move it to cpu.h, so it can also be used in hppa_form_gva_psw()

Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
 target/hppa/cpu.h       | 10 ++++++++--
 target/hppa/translate.c | 12 +++---------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index a92dc352cb..a072d0bb63 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -285,14 +285,20 @@ void hppa_translate_init(void);
 
 #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
 
+static inline uint64_t gva_offset_mask(target_ulong psw)
+{
+    return (psw & PSW_W
+            ? MAKE_64BIT_MASK(0, 62)
+            : MAKE_64BIT_MASK(0, 32));
+}
+
 static inline target_ulong hppa_form_gva_psw(target_ulong psw, uint64_t spc,
                                              target_ulong off)
 {
 #ifdef CONFIG_USER_ONLY
     return off;
 #else
-    off &= psw & PSW_W ? MAKE_64BIT_MASK(0, 62) : MAKE_64BIT_MASK(0, 32);
-    return spc | off;
+    return spc | (off & gva_offset_mask(psw));
 #endif
 }
 
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 19594f917e..0af125ed74 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -586,17 +586,10 @@ static bool nullify_end(DisasContext *ctx)
     return true;
 }
 
-static uint64_t gva_offset_mask(DisasContext *ctx)
-{
-    return (ctx->tb_flags & PSW_W
-            ? MAKE_64BIT_MASK(0, 62)
-            : MAKE_64BIT_MASK(0, 32));
-}
-
 static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest,
                             uint64_t ival, TCGv_i64 vval)
 {
-    uint64_t mask = gva_offset_mask(ctx);
+    uint64_t mask = gva_offset_mask(ctx->tb_flags);
 
     if (ival != -1) {
         tcg_gen_movi_i64(dest, ival & mask);
@@ -1403,7 +1396,8 @@ static void form_gva(DisasContext *ctx, TCGv_i64 *pgva, TCGv_i64 *pofs,
 
     *pofs = ofs;
     *pgva = addr = tcg_temp_new_i64();
-    tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base, gva_offset_mask(ctx));
+    tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base,
+                     gva_offset_mask(ctx->tb_flags));
 #ifndef CONFIG_USER_ONLY
     if (!is_phys) {
         tcg_gen_or_i64(addr, addr, space_select(ctx, sp, base));
-- 
2.43.2

On 3/23/24 22:09, Sven Schnelle wrote:
> move it to cpu.h, so it can also be used in hppa_form_gva_psw()
> 
> Signed-off-by: Sven Schnelle<svens@stackframe.org>
> ---
>   target/hppa/cpu.h       | 10 ++++++++--
>   target/hppa/translate.c | 12 +++---------
>   2 files changed, 11 insertions(+), 11 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

On 3/24/24 09:09, Sven Schnelle wrote:
> move it to cpu.h, so it can also be used in hppa_form_gva_psw()
>
> Signed-off-by: Sven Schnelle <svens@stackframe.org>

Reviewed-by: Helge Deller <deller@gmx.de>

Helge

> ---
>   target/hppa/cpu.h       | 10 ++++++++--
>   target/hppa/translate.c | 12 +++---------
>   2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
> index a92dc352cb..a072d0bb63 100644
> --- a/target/hppa/cpu.h
> +++ b/target/hppa/cpu.h
> @@ -285,14 +285,20 @@ void hppa_translate_init(void);
>
>   #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
>
> +static inline uint64_t gva_offset_mask(target_ulong psw)
> +{
> +    return (psw & PSW_W
> +            ? MAKE_64BIT_MASK(0, 62)
> +            : MAKE_64BIT_MASK(0, 32));
> +}
> +
>   static inline target_ulong hppa_form_gva_psw(target_ulong psw, uint64_t spc,
>                                                target_ulong off)
>   {
>   #ifdef CONFIG_USER_ONLY
>       return off;
>   #else
> -    off &= psw & PSW_W ? MAKE_64BIT_MASK(0, 62) : MAKE_64BIT_MASK(0, 32);
> -    return spc | off;
> +    return spc | (off & gva_offset_mask(psw));
>   #endif
>   }
>
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 19594f917e..0af125ed74 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -586,17 +586,10 @@ static bool nullify_end(DisasContext *ctx)
>       return true;
>   }
>
> -static uint64_t gva_offset_mask(DisasContext *ctx)
> -{
> -    return (ctx->tb_flags & PSW_W
> -            ? MAKE_64BIT_MASK(0, 62)
> -            : MAKE_64BIT_MASK(0, 32));
> -}
> -
>   static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest,
>                               uint64_t ival, TCGv_i64 vval)
>   {
> -    uint64_t mask = gva_offset_mask(ctx);
> +    uint64_t mask = gva_offset_mask(ctx->tb_flags);
>
>       if (ival != -1) {
>           tcg_gen_movi_i64(dest, ival & mask);
> @@ -1403,7 +1396,8 @@ static void form_gva(DisasContext *ctx, TCGv_i64 *pgva, TCGv_i64 *pofs,
>
>       *pofs = ofs;
>       *pgva = addr = tcg_temp_new_i64();
> -    tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base, gva_offset_mask(ctx));
> +    tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base,
> +                     gva_offset_mask(ctx->tb_flags));
>   #ifndef CONFIG_USER_ONLY
>       if (!is_phys) {
>           tcg_gen_or_i64(addr, addr, space_select(ctx, sp, base));