[v1] target/riscv: Fix mode in riscv_tlb_fill

[PATCH] target/riscv: Fix mode in riscv_tlb_fill

Posted by Irina Ryapolova 1 month, 1 week ago

Need to convert mmu_idx to privilege mode for PMP function.

Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>
---
 target/riscv/cpu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index ce7322011d..fc090d729a 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -1315,7 +1315,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     bool two_stage_lookup = mmuidx_2stage(mmu_idx);
     bool two_stage_indirect_error = false;
     int ret = TRANSLATE_FAIL;
-    int mode = mmu_idx;
+    int mode = mmuidx_priv(mmu_idx);
     /* default TLB page size */
     target_ulong tlb_size = TARGET_PAGE_SIZE;
 
-- 
2.25.1

Re: [PATCH] target/riscv: Fix mode in riscv_tlb_fill

Posted by Alistair Francis 1 month, 1 week ago

On Thu, Mar 21, 2024 at 3:29 AM Irina Ryapolova
<irina.ryapolova@syntacore.com> wrote:
>
> Need to convert mmu_idx to privilege mode for PMP function.
>
> Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  target/riscv/cpu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ce7322011d..fc090d729a 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1315,7 +1315,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      bool two_stage_lookup = mmuidx_2stage(mmu_idx);
>      bool two_stage_indirect_error = false;
>      int ret = TRANSLATE_FAIL;
> -    int mode = mmu_idx;
> +    int mode = mmuidx_priv(mmu_idx);
>      /* default TLB page size */
>      target_ulong tlb_size = TARGET_PAGE_SIZE;
>
> --
> 2.25.1
>
>

Re: [PATCH] target/riscv: Fix mode in riscv_tlb_fill

Posted by Alistair Francis 1 month, 1 week ago

On Thu, Mar 21, 2024 at 3:29 AM Irina Ryapolova
<irina.ryapolova@syntacore.com> wrote:
>
> Need to convert mmu_idx to privilege mode for PMP function.
>
> Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ce7322011d..fc090d729a 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1315,7 +1315,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      bool two_stage_lookup = mmuidx_2stage(mmu_idx);
>      bool two_stage_indirect_error = false;
>      int ret = TRANSLATE_FAIL;
> -    int mode = mmu_idx;
> +    int mode = mmuidx_priv(mmu_idx);
>      /* default TLB page size */
>      target_ulong tlb_size = TARGET_PAGE_SIZE;
>
> --
> 2.25.1
>
>

Re: [PATCH] target/riscv: Fix mode in riscv_tlb_fill

Posted by Daniel Henrique Barboza 1 month, 1 week ago


On 3/20/24 14:28, Irina Ryapolova wrote:
> Need to convert mmu_idx to privilege mode for PMP function.
> 

Please add:

Fixes: b297129ae1 ("target/riscv: propagate PMP permission to TLB page")

> Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/cpu_helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ce7322011d..fc090d729a 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1315,7 +1315,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>       bool two_stage_lookup = mmuidx_2stage(mmu_idx);
>       bool two_stage_indirect_error = false;
>       int ret = TRANSLATE_FAIL;
> -    int mode = mmu_idx;
> +    int mode = mmuidx_priv(mmu_idx);
>       /* default TLB page size */
>       target_ulong tlb_size = TARGET_PAGE_SIZE;
>