[v2] Add RISC-V Server Platform Reference Board

[RFC v2 0/2] Add RISC-V Server Platform Reference Board

Fei Wu posted 2 patches 1 month, 2 weeks ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240312135222.3187945-1-fei2.wu@intel.com

Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

configs/devices/riscv64-softmmu/default.mak |    1 +
hw/riscv/Kconfig                            |   12 +
hw/riscv/meson.build                        |    1 +
hw/riscv/server_platform_ref.c              | 1276 +++++++++++++++++++
target/riscv/cpu-qom.h                      |    1 +
target/riscv/cpu.c                          |   61 +
6 files changed, 1352 insertions(+)
create mode 100644 hw/riscv/server_platform_ref.c

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[RFC v2 0/2] Add RISC-V Server Platform Reference Board

Posted by Fei Wu 1 month, 2 weeks ago

The RISC-V Server Platform specification[1] defines a standardized set
of hardware and software capabilities, that portable system software,
such as OS and hypervisors can rely on being present in a RISC-V server
platform. This patchset provides a RISC-V Server Platform (RVSP)
reference implementation on qemu which is in compliance with the spec
as faithful as possible.

The reference board can be running with tag edk2-stable202308 in
upstream edk2 repo[2].

The qemu command line used:

$QEMU -nographic -m 4G -smp 2 \
    -machine rvsp-ref,pflash0=pflash0,pflash1=pflash1 \
    -blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd \
    -blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd \
    -bios fw_dynamic.bin \
    -drive file=$BRS_IMG,if=ide,format=raw

Since there is no ACPI table generated in this new machine type, a
corresponding EDK-II platform (WIP) is needed to provide related ACPI
tables.

For testing purposes only, we used a workaround to generate the ACPI
tables in Qemu with a dedicated downstream patch.

[1] https://github.com/riscv-non-isa/riscv-server-platform
[2] https://github.com/tianocore/edk2.git


v2:
- move cpu definition the 1st patch
- replace sifive_test with power reset syscon
- add versioning scheme to fdt
- integrate recent changes in virt.c
  - use g_autofree
  - create_fdt/finalize_fdt
  - riscv_isa_write_fdt
- some cleanups


Fei Wu (2):
  target/riscv: Add server platform reference cpu
  hw/riscv: Add server platform reference machine

 configs/devices/riscv64-softmmu/default.mak |    1 +
 hw/riscv/Kconfig                            |   12 +
 hw/riscv/meson.build                        |    1 +
 hw/riscv/server_platform_ref.c              | 1276 +++++++++++++++++++
 target/riscv/cpu-qom.h                      |    1 +
 target/riscv/cpu.c                          |   61 +
 6 files changed, 1352 insertions(+)
 create mode 100644 hw/riscv/server_platform_ref.c

-- 
2.34.1