[PATCH 09/13] target/ppc: Prevent supervisor from modifying MSR[ME]

Nicholas Piggin posted 13 patches 8 months, 2 weeks ago
Maintainers: "Cédric Le Goater" <clg@kaod.org>, Nicholas Piggin <npiggin@gmail.com>, "Frédéric Barrat" <fbarrat@linux.ibm.com>, Daniel Henrique Barboza <danielhb413@gmail.com>, David Gibson <david@gibson.dropbear.id.au>, Harsh Prateek Bora <harshpb@linux.ibm.com>, Paolo Bonzini <pbonzini@redhat.com>
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[PATCH 09/13] target/ppc: Prevent supervisor from modifying MSR[ME]
Posted by Nicholas Piggin 8 months, 2 weeks ago
Prevent guest state modifying the MSR[ME] bit. Per ISA:

  An attempt to modify MSRME in privileged but non-hypervisor state is
  ignored (i.e., the bit is not changed).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/ppc/helper_regs.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 410b39c231..25258986e3 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -264,6 +264,11 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
         value &= ~MSR_HVB;
         value |= env->msr & MSR_HVB;
     }
+    /* Attempt to modify MSR[ME] in guest state is ignored */
+    if (is_book3s_arch2x(env) && !(env->msr & MSR_HVB)) {
+        value &= ~(1 << MSR_ME);
+        value |= env->msr & (1 << MSR_ME);
+    }
     if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
         cpu_interrupt_exittb(cs);
     }
-- 
2.42.0
Re: [PATCH 09/13] target/ppc: Prevent supervisor from modifying MSR[ME]
Posted by Harsh Prateek Bora 8 months, 2 weeks ago

On 3/12/24 00:21, Nicholas Piggin wrote:
> Prevent guest state modifying the MSR[ME] bit. Per ISA:
> 
>    An attempt to modify MSRME in privileged but non-hypervisor state is

s/MSRME/MSR[ME] ?

>    ignored (i.e., the bit is not changed).
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>   target/ppc/helper_regs.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
> index 410b39c231..25258986e3 100644
> --- a/target/ppc/helper_regs.c
> +++ b/target/ppc/helper_regs.c
> @@ -264,6 +264,11 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
>           value &= ~MSR_HVB;
>           value |= env->msr & MSR_HVB;
>       }
> +    /* Attempt to modify MSR[ME] in guest state is ignored */
> +    if (is_book3s_arch2x(env) && !(env->msr & MSR_HVB)) {
> +        value &= ~(1 << MSR_ME);
> +        value |= env->msr & (1 << MSR_ME);
> +    }

Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

>       if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
>           cpu_interrupt_exittb(cs);
>       }
Re: [PATCH 09/13] target/ppc: Prevent supervisor from modifying MSR[ME]
Posted by Nicholas Piggin 8 months, 2 weeks ago
On Tue Mar 12, 2024 at 8:27 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 3/12/24 00:21, Nicholas Piggin wrote:
> > Prevent guest state modifying the MSR[ME] bit. Per ISA:
> > 
> >    An attempt to modify MSRME in privileged but non-hypervisor state is
>
> s/MSRME/MSR[ME] ?

Yes, thanks.

>
> >    ignored (i.e., the bit is not changed).
> > 
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> >   target/ppc/helper_regs.c | 5 +++++
> >   1 file changed, 5 insertions(+)
> > 
> > diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
> > index 410b39c231..25258986e3 100644
> > --- a/target/ppc/helper_regs.c
> > +++ b/target/ppc/helper_regs.c
> > @@ -264,6 +264,11 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
> >           value &= ~MSR_HVB;
> >           value |= env->msr & MSR_HVB;
> >       }
> > +    /* Attempt to modify MSR[ME] in guest state is ignored */
> > +    if (is_book3s_arch2x(env) && !(env->msr & MSR_HVB)) {
> > +        value &= ~(1 << MSR_ME);
> > +        value |= env->msr & (1 << MSR_ME);
> > +    }
>
> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
>
> >       if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
> >           cpu_interrupt_exittb(cs);
> >       }