[PATCH v10 00/10] riscv: set vstart_eq_zero on mark_vs_dirty

Daniel Henrique Barboza posted 10 patches 1 month, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240310115315.187283-1-dbarboza@ventanamicro.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
target/riscv/insn_trans/trans_rvbf16.c.inc |  18 +-
target/riscv/insn_trans/trans_rvv.c.inc    | 198 +++++----------------
target/riscv/insn_trans/trans_rvvk.c.inc   |  30 +---
target/riscv/translate.c                   |   6 +
target/riscv/vcrypto_helper.c              |  63 +++----
target/riscv/vector_helper.c               | 192 +++++++++-----------
target/riscv/vector_internals.c            |  29 +++
target/riscv/vector_internals.h            |   4 +
8 files changed, 207 insertions(+), 333 deletions(-)
[PATCH v10 00/10] riscv: set vstart_eq_zero on mark_vs_dirty
Posted by Daniel Henrique Barboza 1 month, 2 weeks ago
Hi,

This version has changes in the wording on patch 9 subject and commit
msg. The previous subject, "target/riscv: Clear vstart_qe_zero flag",
isn't accurate. We're not clearing (i.e. setting to false/zero) the
flag, we're setting the flag to 'true' in the end of each insns.

The first paragraph of the commit msg was changed a bit for more clarity
too.

No other changes made.

Series based on master since RISC-V latest PR was merged.

All patches acked/reviewed.

Changes from v9:
- patch 9:
  - changed subject to
    "enable 'vstart_qe_zero' in the end of insns"
  - changed first line of the commit msg from:
    "The vstart_qe_zero flag is set at the beginning of the translation"
     to:
    "The vstart_qe_zero flag is updated at the beginning of the translation"
- v9 link: https://lore.kernel.org/qemu-riscv/20240309204347.174251-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (9):
  target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
  target/riscv: handle vstart >= vl in vext_set_tail_elems_1s()
  target/riscv/vector_helper.c: do vstart=0 after updating tail
  target/riscv/vector_helper.c: update tail with
    vext_set_tail_elems_1s()
  target/riscv: use vext_set_tail_elems_1s() in vcrypto insns
  trans_rvv.c.inc: set vstart = 0 in int scalar move insns
  target/riscv: remove 'over' brconds from vector trans
  trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
  target/riscv/vector_helper.c: optimize loops in ldst helpers

Ivan Klokov (1):
  target/riscv: enable 'vstart_qe_zero' in the end of insns

 target/riscv/insn_trans/trans_rvbf16.c.inc |  18 +-
 target/riscv/insn_trans/trans_rvv.c.inc    | 198 +++++----------------
 target/riscv/insn_trans/trans_rvvk.c.inc   |  30 +---
 target/riscv/translate.c                   |   6 +
 target/riscv/vcrypto_helper.c              |  63 +++----
 target/riscv/vector_helper.c               | 192 +++++++++-----------
 target/riscv/vector_internals.c            |  29 +++
 target/riscv/vector_internals.h            |   4 +
 8 files changed, 207 insertions(+), 333 deletions(-)

-- 
2.43.2