On 2024/3/8 上午12:48, Song Gao wrote:
> fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'.
>
> See:
> https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c
> https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.yang@flygoat.com
>
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> Message-Id: <20240301093839.663947-14-gaosong@loongson.cn>
> ---
> hw/loongarch/virt.c | 33 ++++++++++++++++++++++++++++++++-
> include/hw/pci-host/ls7a.h | 1 +
> 2 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 2b7b653fc1..1e767c49f8 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -173,6 +173,34 @@ static void fdt_add_pch_pic_node(LoongArchMachineState *lams,
> g_free(nodename);
> }
>
> +static void fdt_add_pch_msi_node(LoongArchMachineState *lams,
> + uint32_t *eiointc_phandle,
> + uint32_t *pch_msi_phandle)
> +{
> + MachineState *ms = MACHINE(lams);
> + char *nodename;
> + hwaddr pch_msi_base = VIRT_PCH_MSI_ADDR_LOW;
> + hwaddr pch_msi_size = VIRT_PCH_MSI_SIZE;
> +
> + *pch_msi_phandle = qemu_fdt_alloc_phandle(ms->fdt);
> + nodename = g_strdup_printf("/msi@%" PRIx64, pch_msi_base);
> + qemu_fdt_add_subnode(ms->fdt, nodename);
> + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_msi_phandle);
> + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
> + "loongson,pch-msi-1.0");
> + qemu_fdt_setprop_cells(ms->fdt, nodename, "reg",
> + 0, pch_msi_base,
> + 0, pch_msi_size);
> + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
> + qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
> + *eiointc_phandle);
> + qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-base-vec",
> + VIRT_PCH_PIC_IRQ_NUM);
> + qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-num-vecs",
> + EXTIOI_IRQS - VIRT_PCH_PIC_IRQ_NUM);
> + g_free(nodename);
> +}
> +
> static void fdt_add_flash_node(LoongArchMachineState *lams)
> {
> MachineState *ms = MACHINE(lams);
> @@ -594,7 +622,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
> CPULoongArchState *env;
> CPUState *cpu_state;
> int cpu, pin, i, start, num;
> - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle;
> + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
>
> /*
> * The connection of interrupts:
> @@ -702,6 +730,9 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
> qdev_get_gpio_in(extioi, i + start));
> }
>
> + /* Add PCH MSI node */
> + fdt_add_pch_msi_node(lams, &eiointc_phandle, &pch_msi_phandle);
> +
> loongarch_devices_init(pch_pic, lams);
> }
>
> diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
> index fe260f0183..cd7c9ec7bc 100644
> --- a/include/hw/pci-host/ls7a.h
> +++ b/include/hw/pci-host/ls7a.h
> @@ -25,6 +25,7 @@
> #define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
> #define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
> #define VIRT_PCH_REG_SIZE 0x400
> +#define VIRT_PCH_MSI_SIZE 0x8
>
> /*
> * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>