This patch adds the STM32L4x5 RCC (Reset and Clock Control) device and is part
of a series implementing the STM32L4x5 with a few peripherals.

Due to the high number of lines, I tried to split the patch into several independent commits.
Each commit compiles on its own but I had to add temporary workarounds in intermediary commits to allow them to compile even if some functions are not used. However, they have been removed once the functions were used. Tell me if this is ok or if I should remove them.

Also, the tests are not very exhaustive for the moment. I have not found a way to test the clocks' frequency from the qtests, which limits severely the exhaustiveness of the tests.

Thanks to Philippe Mathieu-Daudé and Luc Michel for guiding me toward the hw/misc/bcm2835_cprman.c implementation and answering my questions about clock emulation in qemu !

Changes from v1 to v2:
- Removed a mention in the tests
- Added an early return to prevent a clang compilation error in rcc_update_pllsaixcfgr()

Changes from v2 to v3:
- Changed the timeout method used in the tests
- Added a real value for ICSR register
- Replaced some TODOs with correct error handling
- Added a commit that implements correct write protections for the CR register

Changes from v3 to v4:
- Rebased on top of current master
- Implemented reset functions for the multiplexers and the PLLs
- Added explanatory messages to every commit
- Addded logs for unimplemented registers
- Completed the VMState for the multiplexers and the PLLs

Changes from v4 to v5:
- Abort when trying to set an out-of-bound pll vco multiplier

Changes from v5 to v6:
- Handle three phases reset for ClockMuxes and PLLs
- Use FIELD_EX32 macro instead of a custom one
- Remove useless "" from trace functions
- Remove waiting functions in tests
- Added access sizes for the RCC
- Use clock_update() instead of clock_update_hz() where appropriate

Arnaud Minier (8):
  hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton
  hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object
  hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object
  hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers
  hw/misc/stm32l4x5_rcc: Handle Register Updates
  hw/misc/stm32l4x5_rcc: Add write protections to CR register
  hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk
  tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC

 MAINTAINERS                               |    5 +-
 docs/system/arm/b-l475e-iot01a.rst        |    2 +-
 hw/arm/Kconfig                            |    1 +
 hw/arm/b-l475e-iot01a.c                   |   10 +-
 hw/arm/stm32l4x5_soc.c                    |   45 +-
 hw/misc/Kconfig                           |    3 +
 hw/misc/meson.build                       |    1 +
 hw/misc/stm32l4x5_rcc.c                   | 1457 +++++++++++++++++++++
 hw/misc/trace-events                      |   14 +
 include/hw/arm/stm32l4x5_soc.h            |    5 +-
 include/hw/misc/stm32l4x5_rcc.h           |  239 ++++
 include/hw/misc/stm32l4x5_rcc_internals.h | 1042 +++++++++++++++
 tests/qtest/meson.build                   |    3 +-
 tests/qtest/stm32l4x5_rcc-test.c          |  189 +++
 14 files changed, 2971 insertions(+), 45 deletions(-)
 create mode 100644 hw/misc/stm32l4x5_rcc.c
 create mode 100644 include/hw/misc/stm32l4x5_rcc.h
 create mode 100644 include/hw/misc/stm32l4x5_rcc_internals.h
 create mode 100644 tests/qtest/stm32l4x5_rcc-test.c

-- 
2.34.1

On Sun, 3 Mar 2024 at 14:07, Arnaud Minier
<arnaud.minier@telecom-paris.fr> wrote:
>
> This patch adds the STM32L4x5 RCC (Reset and Clock Control) device and is part
> of a series implementing the STM32L4x5 with a few peripherals.
>
> Due to the high number of lines, I tried to split the patch into several independent commits.
> Each commit compiles on its own but I had to add temporary workarounds in intermediary commits to allow them to compile even if some functions are not used. However, they have been removed once the functions were used. Tell me if this is ok or if I should remove them.
>
> Also, the tests are not very exhaustive for the moment. I have not found a way to test the clocks' frequency from the qtests, which limits severely the exhaustiveness of the tests.
>
> Thanks to Philippe Mathieu-Daudé and Luc Michel for guiding me toward the hw/misc/bcm2835_cprman.c implementation and answering my questions about clock emulation in qemu !



Applied to target-arm.next, thanks.

-- PMM