[RFC PATCH 0/3] real ll/sc emulation

Nicholas Piggin posted 3 patches 8 months, 3 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240220041922.373029-1-npiggin@gmail.com
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Yanan Wang <wangyanan55@huawei.com>, Alex Williamson <alex.williamson@redhat.com>, "Cédric Le Goater" <clg@redhat.com>, "Michael S. Tsirkin" <mst@redhat.com>, Peter Xu <peterx@redhat.com>, David Hildenbrand <david@redhat.com>, Nicholas Piggin <npiggin@gmail.com>, Daniel Henrique Barboza <danielhb413@gmail.com>
include/exec/cputlb.h    |   7 ++
include/exec/exec-all.h  |   1 -
include/exec/ram_addr.h  |  42 ++++++-
include/exec/ramlist.h   |  10 ++
include/hw/core/cpu.h    |   5 +
target/ppc/cpu-param.h   |   4 +
target/ppc/helper.h      |   2 +
accel/stubs/tcg-stub.c   |   4 -
accel/tcg/cputlb.c       | 235 ++++++++++++++++++++++++++++++++++++---
hw/core/cpu-common.c     |   5 +
hw/vfio/common.c         |   2 +-
hw/virtio/vhost.c        |   1 +
system/memory.c          |   3 +
system/physmem.c         |   7 ++
target/ppc/cpu_init.c    |   4 +
target/ppc/mem_helper.c  | 132 ++++++++++++++++++++++
target/ppc/translate.c   | 128 +++++----------------
system/memory_ldst.c.inc |   3 +-
18 files changed, 467 insertions(+), 128 deletions(-)
[RFC PATCH 0/3] real ll/sc emulation
Posted by Nicholas Piggin 8 months, 3 weeks ago
I've been toying with how we might do a more faithful ll/sc emulation.
Our cmpxchg based one actually had problems on some firmware code we're
testing.

The using the dirty memory bitmap to detect stores coming from other
CPUs and invalidating active protection / reservations seems to be a
possibility. This passes some basic atomic and locking stress tests
with mttcg, and boots Linux.

Excuse some of the hacky / ugly / unfinished bits of code, I missed
getting into details of vfio, migration, and making it clean. Just
wanted to hear thoughts on the general idea at the moment.

The code doesn't seem to be _terribly_ tricky, but there are some
tricks around the store-conditional side of it where we have to
take a mutex, do the tlb lookup with possible recursion into the
code protected by that mutex, verify the protection is still active,
and then modify memory.

There is only a single lock now, but if that beomes a problem we
*might* be able to split it via physical address hash. But that
doesn't help uncontended performance or contention on the same
address, which are probably the two most important cases.

(I will submit the TCG TLB coherency fix patch separately, difficulty
at the moment is creating a test case for it that does not require
subsequent patches!)

Thanks,
Nick

Nicholas Piggin (3):
  accel/tcg: Fix TCG TLB coherency race with physical dirty bit clearing
  tcg: add a ll/sc protection facility
  target/ppc: Implement reservation protection for larx/stcx

 include/exec/cputlb.h    |   7 ++
 include/exec/exec-all.h  |   1 -
 include/exec/ram_addr.h  |  42 ++++++-
 include/exec/ramlist.h   |  10 ++
 include/hw/core/cpu.h    |   5 +
 target/ppc/cpu-param.h   |   4 +
 target/ppc/helper.h      |   2 +
 accel/stubs/tcg-stub.c   |   4 -
 accel/tcg/cputlb.c       | 235 ++++++++++++++++++++++++++++++++++++---
 hw/core/cpu-common.c     |   5 +
 hw/vfio/common.c         |   2 +-
 hw/virtio/vhost.c        |   1 +
 system/memory.c          |   3 +
 system/physmem.c         |   7 ++
 target/ppc/cpu_init.c    |   4 +
 target/ppc/mem_helper.c  | 132 ++++++++++++++++++++++
 target/ppc/translate.c   | 128 +++++----------------
 system/memory_ldst.c.inc |   3 +-
 18 files changed, 467 insertions(+), 128 deletions(-)

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2.42.0