Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231103173841.33651-11-richard.henderson@linaro.org>
---
target/sparc/helper.h | 16 ++++++------
target/sparc/fop_helper.c | 23 +++++++++--------
target/sparc/translate.c | 54 +++++++++++++++------------------------
3 files changed, 41 insertions(+), 52 deletions(-)
diff --git a/target/sparc/helper.h b/target/sparc/helper.h
index 4cb3451878..7caae9a441 100644
--- a/target/sparc/helper.h
+++ b/target/sparc/helper.h
@@ -44,8 +44,8 @@ DEF_HELPER_FLAGS_3(fcmpd, TCG_CALL_NO_WG, tl, env, f64, f64)
DEF_HELPER_FLAGS_3(fcmpes, TCG_CALL_NO_WG, tl, env, f32, f32)
DEF_HELPER_FLAGS_3(fcmped, TCG_CALL_NO_WG, tl, env, f64, f64)
DEF_HELPER_FLAGS_2(fsqrtq, TCG_CALL_NO_RWG, i128, env, i128)
-DEF_HELPER_FLAGS_1(fcmpq, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpeq, TCG_CALL_NO_WG, tl, env)
+DEF_HELPER_FLAGS_3(fcmpq, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpeq, TCG_CALL_NO_WG, tl, env, i128, i128)
#ifdef TARGET_SPARC64
DEF_HELPER_FLAGS_3(fcmps_fcc1, TCG_CALL_NO_WG, tl, env, f32, f32)
DEF_HELPER_FLAGS_3(fcmps_fcc2, TCG_CALL_NO_WG, tl, env, f32, f32)
@@ -59,12 +59,12 @@ DEF_HELPER_FLAGS_3(fcmpes_fcc3, TCG_CALL_NO_WG, tl, env, f32, f32)
DEF_HELPER_FLAGS_3(fcmped_fcc1, TCG_CALL_NO_WG, tl, env, f64, f64)
DEF_HELPER_FLAGS_3(fcmped_fcc2, TCG_CALL_NO_WG, tl, env, f64, f64)
DEF_HELPER_FLAGS_3(fcmped_fcc3, TCG_CALL_NO_WG, tl, env, f64, f64)
-DEF_HELPER_FLAGS_1(fcmpq_fcc1, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpq_fcc2, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpq_fcc3, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpeq_fcc1, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpeq_fcc2, TCG_CALL_NO_WG, tl, env)
-DEF_HELPER_FLAGS_1(fcmpeq_fcc3, TCG_CALL_NO_WG, tl, env)
+DEF_HELPER_FLAGS_3(fcmpq_fcc1, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpq_fcc2, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpq_fcc3, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpeq_fcc1, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpeq_fcc2, TCG_CALL_NO_WG, tl, env, i128, i128)
+DEF_HELPER_FLAGS_3(fcmpeq_fcc3, TCG_CALL_NO_WG, tl, env, i128, i128)
#endif
DEF_HELPER_2(raise_exception, noreturn, env, int)
diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c
index 9f39b933e8..faf75e651f 100644
--- a/target/sparc/fop_helper.c
+++ b/target/sparc/fop_helper.c
@@ -248,9 +248,12 @@ Int128 helper_fsqrtq(CPUSPARCState *env, Int128 src)
return f128_ret(float128_sqrt(f128_in(src), &env->fp_status));
}
-#define GEN_FCMP(name, size, reg1, reg2, FS, E) \
- target_ulong glue(helper_, name) (CPUSPARCState *env) \
+#define GEN_FCMP(name, size, FS, E) \
+ target_ulong glue(helper_, name) (CPUSPARCState *env, \
+ Int128 src1, Int128 src2) \
{ \
+ float128 reg1 = f128_in(src1); \
+ float128 reg2 = f128_in(src2); \
FloatRelation ret; \
target_ulong fsr; \
if (E) { \
@@ -316,33 +319,33 @@ GEN_FCMP_T(fcmpd, float64, 0, 0);
GEN_FCMP_T(fcmpes, float32, 0, 1);
GEN_FCMP_T(fcmped, float64, 0, 1);
-GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0);
-GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1);
+GEN_FCMP(fcmpq, float128, 0, 0);
+GEN_FCMP(fcmpeq, float128, 0, 1);
#ifdef TARGET_SPARC64
GEN_FCMP_T(fcmps_fcc1, float32, 22, 0);
GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0);
-GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0);
+GEN_FCMP(fcmpq_fcc1, float128, 22, 0);
GEN_FCMP_T(fcmps_fcc2, float32, 24, 0);
GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0);
-GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0);
+GEN_FCMP(fcmpq_fcc2, float128, 24, 0);
GEN_FCMP_T(fcmps_fcc3, float32, 26, 0);
GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0);
-GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0);
+GEN_FCMP(fcmpq_fcc3, float128, 26, 0);
GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1);
GEN_FCMP_T(fcmped_fcc1, float64, 22, 1);
-GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1);
+GEN_FCMP(fcmpeq_fcc1, float128, 22, 1);
GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1);
GEN_FCMP_T(fcmped_fcc2, float64, 24, 1);
-GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1);
+GEN_FCMP(fcmpeq_fcc2, float128, 24, 1);
GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1);
GEN_FCMP_T(fcmped_fcc3, float64, 26, 1);
-GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
+GEN_FCMP(fcmpeq_fcc3, float128, 26, 1);
#endif
#undef GEN_FCMP_T
#undef GEN_FCMP
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 6f75f4d5d6..6c003eed7c 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -276,22 +276,6 @@ static void gen_store_fpr_Q(DisasContext *dc, unsigned int dst, TCGv_i128 v)
gen_update_fprs_dirty(dc, dst);
}
-static void gen_op_load_fpr_QT0(unsigned int src)
-{
- tcg_gen_st_i64(cpu_fpr[src / 2], tcg_env, offsetof(CPUSPARCState, qt0) +
- offsetof(CPU_QuadU, ll.upper));
- tcg_gen_st_i64(cpu_fpr[src/2 + 1], tcg_env, offsetof(CPUSPARCState, qt0) +
- offsetof(CPU_QuadU, ll.lower));
-}
-
-static void gen_op_load_fpr_QT1(unsigned int src)
-{
- tcg_gen_st_i64(cpu_fpr[src / 2], tcg_env, offsetof(CPUSPARCState, qt1) +
- offsetof(CPU_QuadU, ll.upper));
- tcg_gen_st_i64(cpu_fpr[src/2 + 1], tcg_env, offsetof(CPUSPARCState, qt1) +
- offsetof(CPU_QuadU, ll.lower));
-}
-
static void gen_op_store_QT0_fpr(unsigned int dst)
{
tcg_gen_ld_i64(cpu_fpr[dst / 2], tcg_env, offsetof(CPUSPARCState, qt0) +
@@ -1319,20 +1303,20 @@ static void gen_op_fcmpd(int fccno, TCGv_i64 r_rs1, TCGv_i64 r_rs2)
}
}
-static void gen_op_fcmpq(int fccno)
+static void gen_op_fcmpq(int fccno, TCGv_i128 r_rs1, TCGv_i128 r_rs2)
{
switch (fccno) {
case 0:
- gen_helper_fcmpq(cpu_fsr, tcg_env);
+ gen_helper_fcmpq(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 1:
- gen_helper_fcmpq_fcc1(cpu_fsr, tcg_env);
+ gen_helper_fcmpq_fcc1(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 2:
- gen_helper_fcmpq_fcc2(cpu_fsr, tcg_env);
+ gen_helper_fcmpq_fcc2(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 3:
- gen_helper_fcmpq_fcc3(cpu_fsr, tcg_env);
+ gen_helper_fcmpq_fcc3(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
}
}
@@ -1373,20 +1357,20 @@ static void gen_op_fcmped(int fccno, TCGv_i64 r_rs1, TCGv_i64 r_rs2)
}
}
-static void gen_op_fcmpeq(int fccno)
+static void gen_op_fcmpeq(int fccno, TCGv_i128 r_rs1, TCGv_i128 r_rs2)
{
switch (fccno) {
case 0:
- gen_helper_fcmpeq(cpu_fsr, tcg_env);
+ gen_helper_fcmpeq(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 1:
- gen_helper_fcmpeq_fcc1(cpu_fsr, tcg_env);
+ gen_helper_fcmpeq_fcc1(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 2:
- gen_helper_fcmpeq_fcc2(cpu_fsr, tcg_env);
+ gen_helper_fcmpeq_fcc2(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
case 3:
- gen_helper_fcmpeq_fcc3(cpu_fsr, tcg_env);
+ gen_helper_fcmpeq_fcc3(cpu_fsr, tcg_env, r_rs1, r_rs2);
break;
}
}
@@ -1403,9 +1387,9 @@ static void gen_op_fcmpd(int fccno, TCGv_i64 r_rs1, TCGv_i64 r_rs2)
gen_helper_fcmpd(cpu_fsr, tcg_env, r_rs1, r_rs2);
}
-static void gen_op_fcmpq(int fccno)
+static void gen_op_fcmpq(int fccno, TCGv_i128 r_rs1, TCGv_i128 r_rs2)
{
- gen_helper_fcmpq(cpu_fsr, tcg_env);
+ gen_helper_fcmpq(cpu_fsr, tcg_env, r_rs1, r_rs2);
}
static void gen_op_fcmpes(int fccno, TCGv r_rs1, TCGv r_rs2)
@@ -1418,9 +1402,9 @@ static void gen_op_fcmped(int fccno, TCGv_i64 r_rs1, TCGv_i64 r_rs2)
gen_helper_fcmped(cpu_fsr, tcg_env, r_rs1, r_rs2);
}
-static void gen_op_fcmpeq(int fccno)
+static void gen_op_fcmpeq(int fccno, TCGv_i128 r_rs1, TCGv_i128 r_rs2)
{
- gen_helper_fcmpeq(cpu_fsr, tcg_env);
+ gen_helper_fcmpeq(cpu_fsr, tcg_env, r_rs1, r_rs2);
}
#endif
@@ -5144,6 +5128,8 @@ TRANS(FCMPEd, ALL, do_fcmpd, a, true)
static bool do_fcmpq(DisasContext *dc, arg_FCMPq *a, bool e)
{
+ TCGv_i128 src1, src2;
+
if (avail_32(dc) && a->cc != 0) {
return false;
}
@@ -5155,12 +5141,12 @@ static bool do_fcmpq(DisasContext *dc, arg_FCMPq *a, bool e)
}
gen_op_clear_ieee_excp_and_FTT();
- gen_op_load_fpr_QT0(QFPREG(a->rs1));
- gen_op_load_fpr_QT1(QFPREG(a->rs2));
+ src1 = gen_load_fpr_Q(dc, a->rs1);
+ src2 = gen_load_fpr_Q(dc, a->rs2);
if (e) {
- gen_op_fcmpeq(a->cc);
+ gen_op_fcmpeq(a->cc, src1, src2);
} else {
- gen_op_fcmpq(a->cc);
+ gen_op_fcmpq(a->cc, src1, src2);
}
return advance_pc(dc);
}
--
2.34.1