[v1] target/riscv: Support mxstatus CSR for thead-c906

[PATCH 0/2] target/riscv: Support mxstatus CSR for thead-c906

LIU Zhiwei posted 2 patches 10 months ago

Diff against v2
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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240130111159.532-1-zhiwei._5Fliu@linux.alibaba.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

There is a newer version of this series

target/riscv/cpu.c         |  9 ++++++
target/riscv/cpu.h         |  9 ++++++
target/riscv/cpu_bits.h    |  6 ++++
target/riscv/cpu_cfg.h     |  4 ++-
target/riscv/cpu_helper.c  | 25 ++++++++-------
target/riscv/meson.build   |  1 +
target/riscv/tcg/tcg-cpu.c | 25 ++++++++++++++-
target/riscv/tcg/tcg-cpu.h |  1 +
target/riscv/xthead_csr.c  | 63 ++++++++++++++++++++++++++++++++++++++
9 files changed, 130 insertions(+), 13 deletions(-)
create mode 100644 target/riscv/xthead_csr.c

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[PATCH 0/2] target/riscv: Support mxstatus CSR for thead-c906

Posted by LIU Zhiwei 10 months ago

We first add a framework for vendor CSRs in patch 1. After that we add
one thead-c906 CSR mxstatus, which is used for mmu extension xtheadmaee.

This patch set fix the regression on kernel pointed by Björn Töpel in
https://www.mail-archive.com/qemu-devel@nongnu.org/msg1018232.html.

LIU Zhiwei (2):
  target/riscv: Register vendors CSR
  target/riscv: Support xtheadmaee for thead-c906

 target/riscv/cpu.c         |  9 ++++++
 target/riscv/cpu.h         |  9 ++++++
 target/riscv/cpu_bits.h    |  6 ++++
 target/riscv/cpu_cfg.h     |  4 ++-
 target/riscv/cpu_helper.c  | 25 ++++++++-------
 target/riscv/meson.build   |  1 +
 target/riscv/tcg/tcg-cpu.c | 25 ++++++++++++++-
 target/riscv/tcg/tcg-cpu.h |  1 +
 target/riscv/xthead_csr.c  | 63 ++++++++++++++++++++++++++++++++++++++
 9 files changed, 130 insertions(+), 13 deletions(-)
 create mode 100644 target/riscv/xthead_csr.c

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2.25.1