A typo in sizeof_reg put the registers at the wrong offset.
Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.
Reported-by: Vineet Gupta <vineetg@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/riscv/vdso-32.so | Bin 2900 -> 2980 bytes
linux-user/riscv/vdso-64.so | Bin 3856 -> 3944 bytes
linux-user/riscv/vdso.S | 8 ++++----
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/linux-user/riscv/vdso-32.so b/linux-user/riscv/vdso-32.so
index 1ad1e5cbbbb8b1fe36b0fe4bcb6c06fab8219ecd..c2ce2a4757900a16b891bb98f7a027ac30c47a5f 100755
GIT binary patch
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delta 565
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diff --git a/linux-user/riscv/vdso-64.so b/linux-user/riscv/vdso-64.so
index 83992bebe6d0182f24edfffc531015fd2f4e1cfb..ae49f5b043b5941b9d304a056c2b50c185f413b0 100755
GIT binary patch
delta 646
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delta 523
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diff --git a/linux-user/riscv/vdso.S b/linux-user/riscv/vdso.S
index a86d8fc488..c37275233a 100644
--- a/linux-user/riscv/vdso.S
+++ b/linux-user/riscv/vdso.S
@@ -101,12 +101,12 @@ endf __vdso_flush_icache
.cfi_startproc simple
.cfi_signal_frame
-#define sizeof_reg (__riscv_xlen / 4)
+#define sizeof_reg (__riscv_xlen / 8)
#define sizeof_freg 8
-#define B_GR (offsetof_uc_mcontext - sizeof_rt_sigframe)
-#define B_FR (offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0)
+#define B_GR 0
+#define B_FR offsetof_freg0
- .cfi_def_cfa 2, sizeof_rt_sigframe
+ .cfi_def_cfa 2, offsetof_uc_mcontext
/* Return address */
.cfi_return_column 64
--
2.34.1