The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:

Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +0000)

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240111

for you to fetch changes up to 428a6ef4396aa910c86e16c1e4409e3927a3698e:

hw/intc/loongarch_extioi: Add vmstate post_load support (2024-01-11 19:22:47 +0800)

pull-loongarch-20240111

Bibo Mao (4):

hw/intc/loongarch_ipi: Use MemTxAttrs interface for ipi ops

hw/loongarch/virt: Set iocsr address space per-board rather than percpu

hw/intc/loongarch_extioi: Add dynamic cpu number support

hw/intc/loongarch_extioi: Add vmstate post_load support

Tianrui Zhao (10):

linux-headers: Synchronize linux headers from linux v6.7.0-rc8

target/loongarch: Define some kvm_arch interfaces

target/loongarch: Supplement vcpu env initial when vcpu reset

target/loongarch: Implement kvm get/set registers

target/loongarch: Implement kvm_arch_init function

target/loongarch: Implement kvm_arch_init_vcpu

target/loongarch: Implement kvm_arch_handle_exit

target/loongarch: Restrict TCG-specific code

target/loongarch: Implement set vcpu intr for kvm

target/loongarch: Add loongarch kvm into meson build

hw/intc/loongarch_extioi.c | 230 ++++++----

hw/intc/loongarch_ipi.c | 191 +++++----

hw/loongarch/virt.c | 94 +++--

include/hw/intc/loongarch_extioi.h | 12 +-

include/hw/intc/loongarch_ipi.h | 3 +-

include/hw/loongarch/virt.h | 3 +

include/standard-headers/linux/fuse.h | 10 +-

meson.build | 3 +

target/loongarch/cpu.c | 90 ++--

target/loongarch/cpu.h | 9 +-

target/loongarch/internals.h | 5 +-

target/loongarch/kvm/kvm.c | 768 ++++++++++++++++++++++++++++++++++

target/loongarch/kvm/kvm_loongarch.h | 16 +

target/loongarch/kvm/meson.build | 1 +

target/loongarch/meson.build | 1 +

target/loongarch/tcg/iocsr_helper.c | 16 +-

target/loongarch/trace-events | 15 +

target/loongarch/trace.h | 1 +

18 files changed, 1210 insertions(+), 258 deletions(-)

create mode 100644 target/loongarch/kvm/kvm.c

create mode 100644 target/loongarch/kvm/kvm_loongarch.h

create mode 100644 target/loongarch/kvm/meson.build

create mode 100644 target/loongarch/trace-events

create mode 100644 target/loongarch/trace.h

From: Tianrui Zhao <zhaotianrui@loongson.cn>

Add kvm.c into meson.build to compile it when kvm

is configed. Meanwhile in meson.build, we set the

kvm_targets to loongarch64-softmmu when the cpu is

loongarch. And fix the compiling error when config

is enable-kvm,disable-tcg.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Message-Id: <20240105075804.1228596-10-zhaotianrui@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

meson.build | 2 ++

target/loongarch/kvm/meson.build | 1 +

target/loongarch/meson.build | 1 +

3 files changed, 4 insertions(+)

create mode 100644 target/loongarch/kvm/meson.build

diff --git a/meson.build b/meson.build

--- a/meson.build

+++ b/meson.build

@@ -XXX,XX +XXX,XX @@ elif cpu in ['riscv32']

kvm_targets = ['riscv32-softmmu']

elif cpu in ['riscv64']

kvm_targets = ['riscv64-softmmu']

+elif cpu in ['loongarch64']

+ kvm_targets = ['loongarch64-softmmu']

else

kvm_targets = []

endif

diff --git a/target/loongarch/kvm/meson.build b/target/loongarch/kvm/meson.build

+++ b/target/loongarch/kvm/meson.build

@@ -0,0 +1 @@

+loongarch_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))

diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/meson.build

+++ b/target/loongarch/meson.build

@@ -XXX,XX +XXX,XX @@ subdir('tcg')

target_arch += {'loongarch': loongarch_ss}

target_system_arch += {'loongarch': loongarch_system_ss}

+subdir('kvm')

2.25.1

From: Tianrui Zhao <zhaotianrui@loongson.cn>

In preparation of supporting KVM in the next commit.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Message-ID: <20240105075804.1228596-9-zhaotianrui@loongson.cn>

[PMD: Split from bigger patch, part 1]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Message-Id: <20240110094152.52138-1-philmd@linaro.org>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

target/loongarch/cpu.c | 30 +++++++++++++++++++++---------

1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c

--- a/target/loongarch/cpu.c

+++ b/target/loongarch/cpu.c

#include "qapi/error.h"

#include "qemu/module.h"

#include "sysemu/qtest.h"

-#include "exec/cpu_ldst.h"

+#include "sysemu/tcg.h"

#include "exec/exec-all.h"

#include "cpu.h"

#include "internals.h"

#ifndef CONFIG_USER_ONLY

#include "sysemu/reset.h"

#endif

-#include "tcg/tcg.h"

#include "vec.h"

+#ifdef CONFIG_TCG

+#include "exec/cpu_ldst.h"

+#include "tcg/tcg.h"

+#endif

const char * const regnames[32] = {

"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",

@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_set_irq(void *opaque, int irq, int level)

return;

}

- env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);

-

- if (FIELD_EX64(env->CSR_ESTAT, CSR_ESTAT, IS)) {

- cpu_interrupt(cs, CPU_INTERRUPT_HARD);

- } else {

- cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);

+ if (tcg_enabled()) {

+ env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);

+ if (FIELD_EX64(env->CSR_ESTAT, CSR_ESTAT, IS)) {

+ cpu_interrupt(cs, CPU_INTERRUPT_HARD);

+ } else {

+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);

+ }

}

}

@@ -XXX,XX +XXX,XX @@ static inline bool cpu_loongarch_hw_interrupts_pending(CPULoongArchState *env)

return (pending & status) != 0;

}

+#endif

+#ifdef CONFIG_TCG

+#ifndef CONFIG_USER_ONLY

static void loongarch_cpu_do_interrupt(CPUState *cs)

{

LoongArchCPU *cpu = LOONGARCH_CPU(cs);

@@ -XXX,XX +XXX,XX @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)

}

#endif

-#ifdef CONFIG_TCG

static void loongarch_cpu_synchronize_from_tb(CPUState *cs,

const TranslationBlock *tb)

{

@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj)

}

#endif

+#ifdef CONFIG_TCG

restore_fp_status(env);

+#endif

cs->exception_index = -1;

}

@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_init(Object *obj)

CPULoongArchState *env = &cpu->env;

qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);

+#ifdef CONFIG_TCG

timer_init_ns(&cpu->timer, QEMU_CLOCK_VIRTUAL,

&loongarch_constant_timer_cb, cpu);

+#endif

memory_region_init_io(&env->system_iocsr, OBJECT(cpu), NULL,

env, "iocsr", UINT64_MAX);

address_space_init(&env->address_space_iocsr, &env->system_iocsr, "IOCSR");

@@ -XXX,XX +XXX,XX @@ static struct TCGCPUOps loongarch_tcg_ops = {

#include "hw/core/sysemu-cpu-ops.h"

static const struct SysemuCPUOps loongarch_sysemu_ops = {

+#ifdef CONFIG_TCG

.get_phys_page_debug = loongarch_cpu_get_phys_page_debug,

+#endif

};

static int64_t loongarch_cpu_get_arch_id(CPUState *cs)

2.25.1

From: Tianrui Zhao <zhaotianrui@loongson.cn>

Implement the kvm_arch_init of loongarch, in the function, the

KVM_CAP_MP_STATE cap is checked by kvm ioctl.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Message-Id: <20240105075804.1228596-6-zhaotianrui@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

target/loongarch/kvm/kvm.c | 1 +

1 file changed, 1 insertion(+)

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c

--- a/target/loongarch/kvm/kvm.c

+++ b/target/loongarch/kvm/kvm.c

@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_default_type(MachineState *ms)

int kvm_arch_init(MachineState *ms, KVMState *s)

+ cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);

return 0;

}

2.25.1

From: Tianrui Zhao <zhaotianrui@loongson.cn>

Implement kvm_arch_init_vcpu interface for loongarch,

in this function, we register VM change state handler.

And when VM state changes to running, the counter value

should be put into kvm to keep consistent with kvm,

and when state change to stop, counter value should be

refreshed from kvm.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Message-Id: <20240105075804.1228596-7-zhaotianrui@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

target/loongarch/cpu.h | 2 ++

target/loongarch/kvm/kvm.c | 23 +++++++++++++++++++++++

target/loongarch/trace-events | 2 ++

3 files changed, 27 insertions(+)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h

--- a/target/loongarch/cpu.h

+++ b/target/loongarch/cpu.h

@@ -XXX,XX +XXX,XX @@ struct ArchCPU {

/* 'compatible' string for this CPU for Linux device trees */

const char *dtb_compatible;

+ /* used by KVM_REG_LOONGARCH_COUNTER ioctl to access guest time counters */

+ uint64_t kvm_state_counter;

};

/**

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/kvm/kvm.c

+++ b/target/loongarch/kvm/kvm.c

@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level)

return ret;

+static void kvm_loongarch_vm_stage_change(void *opaque, bool running,

+ RunState state)

+ int ret;

+ CPUState *cs = opaque;

+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);

+ if (running) {

+ ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_COUNTER,

+ &cpu->kvm_state_counter);

+ if (ret < 0) {

+ trace_kvm_failed_put_counter(strerror(errno));

+ }

+ } else {

+ ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_COUNTER,

+ &cpu->kvm_state_counter);

+ if (ret < 0) {

+ trace_kvm_failed_get_counter(strerror(errno));

+ }

int kvm_arch_init_vcpu(CPUState *cs)

+ qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);

return 0;

diff --git a/target/loongarch/trace-events b/target/loongarch/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/trace-events

+++ b/target/loongarch/trace-events

@@ -XXX,XX +XXX,XX @@ kvm_failed_get_fpu(const char *msg) "Failed to get fpu from KVM: %s"

kvm_failed_put_fpu(const char *msg) "Failed to put fpu into KVM: %s"

kvm_failed_get_mpstate(const char *msg) "Failed to get mp_state from KVM: %s"

kvm_failed_put_mpstate(const char *msg) "Failed to put mp_state into KVM: %s"

+kvm_failed_get_counter(const char *msg) "Failed to get counter from KVM: %s"

+kvm_failed_put_counter(const char *msg) "Failed to put counter into KVM: %s"

kvm_failed_get_cpucfg(const char *msg) "Failed to get cpucfg from KVM: %s"

kvm_failed_put_cpucfg(const char *msg) "Failed to put cpucfg into KVM: %s"

2.25.1

From: Tianrui Zhao <zhaotianrui@loongson.cn>

Implement loongarch kvm set vcpu interrupt interface,

when a irq is set in vcpu, we use the KVM_INTERRUPT

ioctl to set intr into kvm.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Message-ID: <20240105075804.1228596-9-zhaotianrui@loongson.cn>

[PMD: Split from bigger patch, part 2]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Message-Id: <20240110094152.52138-2-philmd@linaro.org>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

target/loongarch/cpu.c | 9 ++++++++-

target/loongarch/kvm/kvm.c | 15 +++++++++++++++

target/loongarch/kvm/kvm_loongarch.h | 16 ++++++++++++++++

target/loongarch/trace-events | 1 +

4 files changed, 40 insertions(+), 1 deletion(-)

create mode 100644 target/loongarch/kvm/kvm_loongarch.h

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c

--- a/target/loongarch/cpu.c

+++ b/target/loongarch/cpu.c

@@ -XXX,XX +XXX,XX @@

#include "qemu/module.h"

#include "sysemu/qtest.h"

#include "sysemu/tcg.h"

+#include "sysemu/kvm.h"

+#include "kvm/kvm_loongarch.h"

#include "exec/exec-all.h"

#include "cpu.h"

#include "internals.h"

@@ -XXX,XX +XXX,XX @@

#include "sysemu/reset.h"

#endif

#include "vec.h"

+#ifdef CONFIG_KVM

+#include <linux/kvm.h>

+#endif

#ifdef CONFIG_TCG

#include "exec/cpu_ldst.h"

#include "tcg/tcg.h"

@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_set_irq(void *opaque, int irq, int level)

return;

}

- if (tcg_enabled()) {

+ if (kvm_enabled()) {

+ kvm_loongarch_set_interrupt(cpu, irq, level);

+ } else if (tcg_enabled()) {

env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);

if (FIELD_EX64(env->CSR_ESTAT, CSR_ESTAT, IS)) {

cpu_interrupt(cs, CPU_INTERRUPT_HARD);

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/kvm/kvm.c

+++ b/target/loongarch/kvm/kvm.c

@@ -XXX,XX +XXX,XX @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)

return ret;

+int kvm_loongarch_set_interrupt(LoongArchCPU *cpu, int irq, int level)

+{

+ struct kvm_interrupt intr;

+ CPUState *cs = CPU(cpu);

+

+ if (level) {

+ intr.irq = irq;

+ } else {

+ intr.irq = -irq;

+ }

+

+ trace_kvm_set_intr(irq, level);

+ return kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &intr);

+}

+

void kvm_arch_accel_class_init(ObjectClass *oc)

diff --git a/target/loongarch/kvm/kvm_loongarch.h b/target/loongarch/kvm/kvm_loongarch.h

+++ b/target/loongarch/kvm/kvm_loongarch.h

+ * QEMU LoongArch kvm interface

+ *

+ * Copyright (c) 2023 Loongson Technology Corporation Limited

+#include "cpu.h"

+#ifndef QEMU_KVM_LOONGARCH_H

+#define QEMU_KVM_LOONGARCH_H

+int kvm_loongarch_set_interrupt(LoongArchCPU *cpu, int irq, int level);

+void kvm_arch_reset_vcpu(CPULoongArchState *env);

+#endif

diff --git a/target/loongarch/trace-events b/target/loongarch/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/trace-events

+++ b/target/loongarch/trace-events

@@ -XXX,XX +XXX,XX @@ kvm_failed_put_counter(const char *msg) "Failed to put counter into KVM: %s"

kvm_failed_get_cpucfg(const char *msg) "Failed to get cpucfg from KVM: %s"

kvm_failed_put_cpucfg(const char *msg) "Failed to put cpucfg into KVM: %s"

kvm_arch_handle_exit(int num) "kvm arch handle exit, the reason number: %d"

+kvm_set_intr(int irq, int level) "kvm set interrupt, irq num: %d, level: %d"

2.25.1

From: Bibo Mao <maobibo@loongson.cn>

There are two interface pairs for MemoryRegionOps, read/write and

read_with_attrs/write_with_attrs. The later is better for ipi device

emulation since initial cpu can be parsed from attrs.requester_id.

And requester_id can be overrided for IOCSR_IPI_SEND and mail_send

function when it is to forward message to another vcpu.

hw/intc/loongarch_ipi.c | 136 +++++++++++++++++++++++-----------------

1 file changed, 77 insertions(+), 59 deletions(-)

diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c

--- a/hw/intc/loongarch_ipi.c

+++ b/hw/intc/loongarch_ipi.c

@@ -XXX,XX +XXX,XX @@

#include "target/loongarch/internals.h"

#include "trace.h"

-static void loongarch_ipi_writel(void *, hwaddr, uint64_t, unsigned);

-

-static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size)

+static MemTxResult loongarch_ipi_readl(void *opaque, hwaddr addr,

+ uint64_t *data,

+ unsigned size, MemTxAttrs attrs)

- IPICore *s = opaque;

+ IPICore *s;

+ LoongArchIPI *ipi = opaque;

uint64_t ret = 0;

int index = 0;

+ s = &ipi->ipi_core;

addr &= 0xff;

switch (addr) {

case CORE_STATUS_OFF:

@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size)

}

trace_loongarch_ipi_read(size, (uint64_t)addr, ret);

- return ret;

+ *data = ret;

+ return MEMTX_OK;

-static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr)

+static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr,

+ MemTxAttrs attrs)

int i, mask = 0, data = 0;

@@ -XXX,XX +XXX,XX @@ static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr)

*/

if ((val >> 27) & 0xf) {

data = address_space_ldl(&env->address_space_iocsr, addr,

- MEMTXATTRS_UNSPECIFIED, NULL);

+ attrs, NULL);

for (i = 0; i < 4; i++) {

/* get mask for byte writing */

if (val & (0x1 << (27 + i))) {

@@ -XXX,XX +XXX,XX @@ static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr)

data &= mask;

data |= (val >> 32) & ~mask;

address_space_stl(&env->address_space_iocsr, addr,

- data, MEMTXATTRS_UNSPECIFIED, NULL);

+ data, attrs, NULL);

static int archid_cmp(const void *a, const void *b)

@@ -XXX,XX +XXX,XX @@ static CPUState *ipi_getcpu(int arch_id)

CPUArchId *archid;

archid = find_cpu_by_archid(machine, arch_id);

- return CPU(archid->cpu);

-static void ipi_send(uint64_t val)

-{

- uint32_t cpuid;

- uint8_t vector;

- CPUState *cs;

- LoongArchCPU *cpu;

- LoongArchIPI *s;

-

- cpuid = extract32(val, 16, 10);

- if (cpuid >= LOONGARCH_MAX_CPUS) {

- trace_loongarch_ipi_unsupported_cpuid("IOCSR_IPI_SEND", cpuid);

- return;

+ if (archid) {

+ return CPU(archid->cpu);

- /* IPI status vector */

- vector = extract8(val, 0, 5);

-

- cs = ipi_getcpu(cpuid);

- cpu = LOONGARCH_CPU(cs);

- s = LOONGARCH_IPI(cpu->env.ipistate);

- loongarch_ipi_writel(&s->ipi_core, CORE_SET_OFF, BIT(vector), 4);

+ return NULL;

}

-static void mail_send(uint64_t val)

+static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs)

{

uint32_t cpuid;

hwaddr addr;

- CPULoongArchState *env;

CPUState *cs;

- LoongArchCPU *cpu;

cpuid = extract32(val, 16, 10);

if (cpuid >= LOONGARCH_MAX_CPUS) {

trace_loongarch_ipi_unsupported_cpuid("IOCSR_MAIL_SEND", cpuid);

- return;

+ return MEMTX_DECODE_ERROR;

}

- addr = 0x1020 + (val & 0x1c);

cs = ipi_getcpu(cpuid);

- cpu = LOONGARCH_CPU(cs);

- env = &cpu->env;

- send_ipi_data(env, val, addr);

+ if (cs == NULL) {

+ return MEMTX_DECODE_ERROR;

+ /* override requester_id */

+ addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c);

+ attrs.requester_id = cs->cpu_index;

+ send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs);

+ return MEMTX_OK;

}

-static void any_send(uint64_t val)

+static MemTxResult any_send(uint64_t val, MemTxAttrs attrs)

{

uint32_t cpuid;

hwaddr addr;

- CPULoongArchState *env;

CPUState *cs;

- LoongArchCPU *cpu;

cpuid = extract32(val, 16, 10);

if (cpuid >= LOONGARCH_MAX_CPUS) {

trace_loongarch_ipi_unsupported_cpuid("IOCSR_ANY_SEND", cpuid);

- return;

+ return MEMTX_DECODE_ERROR;

}

- addr = val & 0xffff;

cs = ipi_getcpu(cpuid);

- cpu = LOONGARCH_CPU(cs);

- env = &cpu->env;

- send_ipi_data(env, val, addr);

+ if (cs == NULL) {

+ return MEMTX_DECODE_ERROR;

+ }

+ /* override requester_id */

+ addr = val & 0xffff;

+ attrs.requester_id = cs->cpu_index;

+ send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs);

+ return MEMTX_OK;

}

-static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,

- unsigned size)

+static MemTxResult loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,

+ unsigned size, MemTxAttrs attrs)

{

- IPICore *s = opaque;

+ LoongArchIPI *ipi = opaque;

+ IPICore *s;

int index = 0;

+ uint32_t cpuid;

+ uint8_t vector;

+ CPUState *cs;

+ s = &ipi->ipi_core;

addr &= 0xff;

trace_loongarch_ipi_write(size, (uint64_t)addr, val);

switch (addr) {

@@ -XXX,XX +XXX,XX @@ static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,

s->buf[index] = val;

break;

case IOCSR_IPI_SEND:

- ipi_send(val);

+ cpuid = extract32(val, 16, 10);

+ if (cpuid >= LOONGARCH_MAX_CPUS) {

+ trace_loongarch_ipi_unsupported_cpuid("IOCSR_IPI_SEND", cpuid);

+ return MEMTX_DECODE_ERROR;

+ }

+ /* IPI status vector */

+ vector = extract8(val, 0, 5);

+ cs = ipi_getcpu(cpuid);

+ if (cs == NULL) {

+ return MEMTX_DECODE_ERROR;

+ }

+ /* override requester_id */

+ attrs.requester_id = cs->cpu_index;

+ ipi = LOONGARCH_IPI(LOONGARCH_CPU(cs)->env.ipistate);

+ loongarch_ipi_writel(ipi, CORE_SET_OFF, BIT(vector), 4, attrs);

break;

default:

qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr);

break;

}

+ return MEMTX_OK;

}

static const MemoryRegionOps loongarch_ipi_ops = {

- .read = loongarch_ipi_readl,

- .write = loongarch_ipi_writel,

+ .read_with_attrs = loongarch_ipi_readl,

+ .write_with_attrs = loongarch_ipi_writel,

.impl.min_access_size = 4,

.impl.max_access_size = 4,

.valid.min_access_size = 4,

@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_ipi_ops = {

addr &= 0xfff;

switch (addr) {

case MAIL_SEND_OFFSET:

- mail_send(val);

+ ret = mail_send(val, attrs);

break;

case ANY_SEND_OFFSET:

- any_send(val);

+ ret = any_send(val, attrs);

break;

default:

break;

}

+ return ret;

}

static const MemoryRegionOps loongarch_ipi64_ops = {

- .write = loongarch_ipi_writeq,

+ .write_with_attrs = loongarch_ipi_writeq,

.impl.min_access_size = 8,

.impl.max_access_size = 8,

.valid.min_access_size = 8,

@@ -XXX,XX +XXX,XX @@ static void loongarch_ipi_init(Object *obj)

SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

memory_region_init_io(&s->ipi_iocsr_mem, obj, &loongarch_ipi_ops,

- &s->ipi_core, "loongarch_ipi_iocsr", 0x48);

+ s, "loongarch_ipi_iocsr", 0x48);

/* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */

s->ipi_iocsr_mem.disable_reentrancy_guard = true;

@@ -XXX,XX +XXX,XX @@ static void loongarch_ipi_init(Object *obj)

sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);

memory_region_init_io(&s->ipi64_iocsr_mem, obj, &loongarch_ipi64_ops,

- &s->ipi_core, "loongarch_ipi64_iocsr", 0x118);

+ s, "loongarch_ipi64_iocsr", 0x118);

sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);

qdev_init_gpio_out(DEVICE(obj), &s->ipi_core.irq, 1);

}

2.25.1

From: Tianrui Zhao <zhaotianrui@loongson.cn>

Implement kvm_arch_get/set_registers interfaces, many regs

can be get/set in the function, such as core regs, csr regs,

fpu regs, mp state, etc.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>

Signed-off-by: xianglai li <lixianglai@loongson.cn>

Reviewed-by: Song Gao <gaosong@loongson.cn>

Change-Id: Ia8fc48fe08b1768853f7729e77d37cdf270031e4

Message-Id: <20240105075804.1228596-5-zhaotianrui@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

---

meson.build | 1 +

target/loongarch/cpu.c | 3 +

target/loongarch/cpu.h | 1 +

target/loongarch/internals.h | 5 +-

target/loongarch/kvm/kvm.c | 580 +++++++++++++++++++++++++++++++++-

target/loongarch/trace-events | 11 +

target/loongarch/trace.h | 1 +

7 files changed, 599 insertions(+), 3 deletions(-)

create mode 100644 target/loongarch/trace-events

create mode 100644 target/loongarch/trace.h

diff --git a/meson.build b/meson.build

--- a/meson.build

+++ b/meson.build

@@ -XXX,XX +XXX,XX @@ if have_system or have_user

'target/hppa',

'target/i386',

'target/i386/kvm',

+ 'target/loongarch',

'target/mips/tcg',

'target/nios2',

'target/ppc',

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/cpu.c

+++ b/target/loongarch/cpu.c

@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj)

#ifndef CONFIG_USER_ONLY

env->pc = 0x1c000000;

memset(env->tlb, 0, sizeof(env->tlb));

+ if (kvm_enabled()) {

+ kvm_arch_reset_vcpu(env);

+ }

#endif

restore_fp_status(env);

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/cpu.h

+++ b/target/loongarch/cpu.h

@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {

MemoryRegion iocsr_mem;

bool load_elf;

uint64_t elf_address;

+ uint32_t mp_state;

/* Store ipistate to access from this struct */

DeviceState *ipistate;

#endif

diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/internals.h

+++ b/target/loongarch/internals.h

@@ -XXX,XX +XXX,XX @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,

const char *loongarch_exception_name(int32_t exception);

+#ifdef CONFIG_TCG

int ieee_ex_to_loongarch(int xcpt);

void restore_fp_status(CPULoongArchState *env);

+#endif

#ifndef CONFIG_USER_ONLY

extern const VMStateDescription vmstate_loongarch_cpu;

@@ -XXX,XX +XXX,XX @@ uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);

uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);

void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,

uint64_t value);

-

+#ifdef CONFIG_TCG

bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

MMUAccessType access_type, int mmu_idx,

bool probe, uintptr_t retaddr);

hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);

+#endif

#endif /* !CONFIG_USER_ONLY */

uint64_t read_fcc(CPULoongArchState *env);

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/kvm/kvm.c

+++ b/target/loongarch/kvm/kvm.c

#include "sysemu/runstate.h"

#include "cpu-csr.h"

#include "kvm_loongarch.h"

+#include "trace.h"

static bool cap_has_mp_state;

const KVMCapabilityInfo kvm_arch_required_capabilities[] = {

KVM_CAP_LAST_INFO

};

+static int kvm_loongarch_get_regs_core(CPUState *cs)

+ int ret = 0;

+ int i;

+ struct kvm_regs regs;

+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);

+ CPULoongArchState *env = &cpu->env;

+ /* Get the current register set as KVM seems it */

+ ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, &regs);

+ if (ret < 0) {

+ trace_kvm_failed_get_regs_core(strerror(errno));

+ return ret;

+ }

+ /* gpr[0] value is always 0 */

+ env->gpr[0] = 0;

+ for (i = 1; i < 32; i++) {

+ env->gpr[i] = regs.gpr[i];

+ env->pc = regs.pc;

+ return ret;

+static int kvm_loongarch_put_regs_core(CPUState *cs)

+ int ret = 0;

+ int i;