[PATCH v12 00/10] Implementation of NPI Mailbox and GMAC Networking Module

Nabih Estefan posted 10 patches 8 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240110234232.4116804-1-nabihestefan@google.com
Maintainers: Tyrone Ting <kfting@nuvoton.com>, Hao Wu <wuhaotsh@google.com>, Peter Maydell <peter.maydell@linaro.org>, Jason Wang <jasowang@redhat.com>, Thomas Huth <thuth@redhat.com>, Laurent Vivier <lvivier@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
There is a newer version of this series
docs/system/arm/nuvoton.rst         |   2 +
hw/arm/npcm7xx.c                    |  53 +-
hw/misc/meson.build                 |   1 +
hw/misc/npcm7xx_pci_mbox.c          | 324 ++++++++++
hw/misc/trace-events                |   5 +
hw/net/meson.build                  |   2 +-
hw/net/npcm_gmac.c                  | 939 ++++++++++++++++++++++++++++
hw/net/trace-events                 |  19 +
include/hw/arm/npcm7xx.h            |   4 +
include/hw/misc/npcm7xx_pci_mbox.h  |  81 +++
include/hw/net/npcm_gmac.h          | 340 ++++++++++
tests/qtest/meson.build             |   2 +
tests/qtest/npcm7xx_pci_mbox-test.c | 238 +++++++
tests/qtest/npcm_gmac-test.c        | 341 ++++++++++
14 files changed, 2347 insertions(+), 4 deletions(-)
create mode 100644 hw/misc/npcm7xx_pci_mbox.c
create mode 100644 hw/net/npcm_gmac.c
create mode 100644 include/hw/misc/npcm7xx_pci_mbox.h
create mode 100644 include/hw/net/npcm_gmac.h
create mode 100644 tests/qtest/npcm7xx_pci_mbox-test.c
create mode 100644 tests/qtest/npcm_gmac-test.c
[PATCH v12 00/10] Implementation of NPI Mailbox and GMAC Networking Module
Posted by Nabih Estefan 8 months, 2 weeks ago
From: Nabih Estefan Diaz <nabihestefan@google.com>

[Changes since v11]
Was running into error syncing into master. It seemed to be related to a
hash problem introduced in patchset 10 (unrelated to the macOS build
issue). carried the patches from v9 (before the syncing problem) and
added the fixes from patchsets 10 and 11 to remove the hash error.

[Changes since v10]
Fixed macOS build issue. Changed imports to not be linux-specific.

[Changes since v9]
More cleanup and fixes based on suggestions from Peter Maydell
(peter.maydell@linaro.org) suggestions.

[Changes since v8]
Suggestions and Fixes from Peter Maydell (peter.maydell@linaro.org),
also cleaned up changes so nothing is deleted in a later patch that was
added in an earlier patch. Patch count decresed by 1 because this cleanup
led to one of the patches being irrelevant.

[Changes since v7]
Fixed patch 4 declaration of new NIC based on comments by Peter Maydell
(peter.maydell@linaro.org)

[Changes since v6]
Remove the Change-Ids from the commit messages.

[Changes since v5]
Undid remove of some qtests that seem to have been caused by a merge
conflict.

[Changes since v4]
Added Signed-off-by tag and fixed patch 4 commit message as suggested by
Peter Maydell (peter.maydell@linaro.org)

[Changes since v3]
Fixed comments from Hao Wu (wuhaotsh@google.com)

[Changes since v2]
Fixed bugs related to the RC functionality of the GMAC. Added and
squashed patches related to that.

[Changes since v1]
Fixed some errors in formatting.
Fixed a merge error that I didn't see in v1.
Removed Nuvoton 8xx references since that is a separate patch set.

[Original Cover]
Creates NPI Mailbox Module with data verification for read and write (internal and external),
wiring to the Nuvoton SoC, and QTests.

Also creates the GMAC Networking Module. Implements read and write functionalities with cooresponding descriptors
and registers. Also includes QTests for the different functionalities.

Hao Wu (5):
  hw/misc: Add Nuvoton's PCI Mailbox Module
  hw/arm: Add PCI mailbox module to Nuvoton SoC
  hw/misc: Add qtest for NPCM7xx PCI Mailbox
  hw/net: Add NPCMXXX GMAC device
  hw/arm: Add GMAC devices to NPCM7XX SoC

Nabih Estefan Diaz (5):
  tests/qtest: Creating qtest for GMAC Module
  include/hw/net: General GMAC Implementation
  hw/net: GMAC Rx Implementation
  hw/net: GMAC Tx Implementation
  tests/qtest: Adding PCS Module test to GMAC Qtest

 docs/system/arm/nuvoton.rst         |   2 +
 hw/arm/npcm7xx.c                    |  53 +-
 hw/misc/meson.build                 |   1 +
 hw/misc/npcm7xx_pci_mbox.c          | 324 ++++++++++
 hw/misc/trace-events                |   5 +
 hw/net/meson.build                  |   2 +-
 hw/net/npcm_gmac.c                  | 939 ++++++++++++++++++++++++++++
 hw/net/trace-events                 |  19 +
 include/hw/arm/npcm7xx.h            |   4 +
 include/hw/misc/npcm7xx_pci_mbox.h  |  81 +++
 include/hw/net/npcm_gmac.h          | 340 ++++++++++
 tests/qtest/meson.build             |   2 +
 tests/qtest/npcm7xx_pci_mbox-test.c | 238 +++++++
 tests/qtest/npcm_gmac-test.c        | 341 ++++++++++
 14 files changed, 2347 insertions(+), 4 deletions(-)
 create mode 100644 hw/misc/npcm7xx_pci_mbox.c
 create mode 100644 hw/net/npcm_gmac.c
 create mode 100644 include/hw/misc/npcm7xx_pci_mbox.h
 create mode 100644 include/hw/net/npcm_gmac.h
 create mode 100644 tests/qtest/npcm7xx_pci_mbox-test.c
 create mode 100644 tests/qtest/npcm_gmac-test.c

-- 
2.43.0.275.g3460e3d667-goog
Re: [PATCH v12 00/10] Implementation of NPI Mailbox and GMAC Networking Module
Posted by Peter Maydell 8 months, 1 week ago
On Wed, 10 Jan 2024 at 23:42, Nabih Estefan <nabihestefan@google.com> wrote:
>
> From: Nabih Estefan Diaz <nabihestefan@google.com>
>
> [Changes since v11]
> Was running into error syncing into master. It seemed to be related to a
> hash problem introduced in patchset 10 (unrelated to the macOS build
> issue). carried the patches from v9 (before the syncing problem) and
> added the fixes from patchsets 10 and 11 to remove the hash error.
>

I found some more issues with this which I've noted in the
individual patches: in particular the patchset is supposed
to compile after every patch, and to get that to happen
a few sections of code needed to be in different patches.
There were also a couple of other niggles.

However, since the fixes were minor, I have made them myself
in applying this series to target-arm.next, to save you having
to do yet another respin.

Thanks for this contribution to QEMU.

-- PMM
Re: [PATCH v12 00/10] Implementation of NPI Mailbox and GMAC Networking Module
Posted by Peter Maydell 8 months ago
On Sat, 13 Jan 2024 at 12:27, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Wed, 10 Jan 2024 at 23:42, Nabih Estefan <nabihestefan@google.com> wrote:
> >
> > From: Nabih Estefan Diaz <nabihestefan@google.com>
> >
> > [Changes since v11]
> > Was running into error syncing into master. It seemed to be related to a
> > hash problem introduced in patchset 10 (unrelated to the macOS build
> > issue). carried the patches from v9 (before the syncing problem) and
> > added the fixes from patchsets 10 and 11 to remove the hash error.
> >
>
> I found some more issues with this which I've noted in the
> individual patches: in particular the patchset is supposed
> to compile after every patch, and to get that to happen
> a few sections of code needed to be in different patches.
> There were also a couple of other niggles.
>
> However, since the fixes were minor, I have made them myself
> in applying this series to target-arm.next, to save you having
> to do yet another respin.

It turns out that the tests don't pass on a big-endian host.

Some of this is just bugs in the test case code, like this,
where the protocol between the device and the chardev
expects the offset in little-endian byte order but the
test case was not ensuring that:

diff --git a/tests/qtest/npcm7xx_pci_mbox-test.c
b/tests/qtest/npcm7xx_pci_mbox-test.c
index 341642e6371..d1714f44517 100644
--- a/tests/qtest/npcm7xx_pci_mbox-test.c
+++ b/tests/qtest/npcm7xx_pci_mbox-test.c
@@ -101,6 +101,7 @@ static void receive_data(uint64_t offset, uint8_t
*buf, size_t len)
     ssize_t rv;

     while (len > 0) {
+        uint8_t offset_bytes[8];
         uint8_t size;

         if (len >= 8) {
@@ -118,7 +119,8 @@ static void receive_data(uint64_t offset, uint8_t
*buf, size_t len)
         rv = write(fd, &op, 1);
         g_assert_cmpint(rv, ==, 1);
         /* Write offset */
-        rv = write(fd, (uint8_t *)&offset, sizeof(uint64_t));
+        stq_le_p(offset_bytes, offset);
+        rv = write(fd, offset_bytes, sizeof(uint64_t));
         g_assert_cmpint(rv, ==, sizeof(uint64_t));
         /* Write size */
         g_assert_cmpint(write(fd, &size, 1), ==, 1);
@@ -141,6 +143,7 @@ static void send_data(uint64_t offset, const
uint8_t *buf, size_t len)

     while (len > 0) {
         uint8_t size;
+        uint8_t offset_bytes[8];

         if (len >= 8) {
             size = 8;
@@ -157,7 +160,8 @@ static void send_data(uint64_t offset, const
uint8_t *buf, size_t len)
         rv = write(fd, &op, 1);
         g_assert_cmpint(rv, ==, 1);
         /* Write offset */
-        rv = write(fd, (uint8_t *)&offset, sizeof(uint64_t));
+        stq_le_p(offset_bytes, offset);
+        rv = write(fd, offset_bytes, sizeof(uint64_t));
         g_assert_cmpint(rv, ==, sizeof(uint64_t));
         /* Write size */
         g_assert_cmpint(write(fd, &size, 1), ==, 1);


(Side note, if you find yourself casting a uint64_t* to
to a uint8_t* this is almost always a sign of endianness
problems. There are similar casts in the device implementation
which are also flags of problems: see below.)

However this isn't sufficient for the test cases to pass,
because the code in the device itself seems to be confused.
For data sent *to* the device, the OP_WRITE code expects
to see the data in little-endian order, which it then
writes to the guest memory as LE. However for data
read *from* the device, npcm7xx_pci_mbox_send_response()
does not do anything about endianness and so the data
is read from the guest memory as LE and then sent out
on the wire in host-endianness order.

Because I don't know what the intention was here I'm not
going to try to fix this up. Please can you have a look
at this? I would also recommend that you write up somewhere
(even if just in a comment) exactly what the protocol
specification for the on-the-wire format is. That will
make it much easier to determine whether a bug is on the
sending side or the receiving side.


For the other minor stuff which I fixed up locally before
sending the pull request: I suggest that you take the
patches as they appeared there, i.e. patches 10..18 from here:
 https://patchew.org/QEMU/20240116151228.2430754-1-peter.maydell@linaro.org/
But I've just noticed that I seem to have messed up the
author state on some of those patches (probably while I
was squashing patches into each other etc) -- please
check through and correct those back to the original
authorship attribution.

thanks
-- PMM