The SYSCFG input GPIOs aren't connected yet. When the STM32L4x5 GPIO
device will be implemented, its output GPIOs will be connected to the
SYSCFG input GPIOs.
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
---
hw/arm/Kconfig | 1 +
hw/arm/stm32l4x5_soc.c | 21 ++++++++++++++++++++-
include/hw/arm/stm32l4x5_soc.h | 2 ++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 8c8488a70a..bb4693bfbb 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -459,6 +459,7 @@ config STM32L4X5_SOC
bool
select ARM_V7M
select OR_IRQ
+ select STM32L4X5_SYSCFG
select STM32L4X5_EXTI
config XLNX_ZYNQMP_ARM
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index fe46b7c6c0..431f982caf 100644
--- a/hw/arm/stm32l4x5_soc.c
+++ b/hw/arm/stm32l4x5_soc.c
@@ -37,6 +37,7 @@
#define SRAM2_SIZE (32 * KiB)
#define EXTI_ADDR 0x40010400
+#define SYSCFG_ADDR 0x40010000
#define NUM_EXTI_IRQ 40
/* Match exti line connections with their CPU IRQ number */
@@ -80,6 +81,7 @@ static void stm32l4x5_soc_initfn(Object *obj)
Stm32l4x5SocState *s = STM32L4X5_SOC(obj);
object_initialize_child(obj, "exti", &s->exti, TYPE_STM32L4X5_EXTI);
+ object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG);
s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);
s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0);
@@ -154,6 +156,19 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
return;
}
+ /* System configuration controller */
+ busdev = SYS_BUS_DEVICE(&s->syscfg);
+ if (!sysbus_realize(busdev, errp)) {
+ return;
+ }
+ sysbus_mmio_map(busdev, 0, SYSCFG_ADDR);
+ /*
+ * TODO: when the GPIO device is implemented, connect it
+ * to SYCFG using `qdev_connect_gpio_out`, NUM_GPIOS and
+ * GPIO_NUM_PINS.
+ */
+
+ /* EXTI device */
busdev = SYS_BUS_DEVICE(&s->exti);
if (!sysbus_realize(busdev, errp)) {
return;
@@ -163,6 +178,11 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
sysbus_connect_irq(busdev, i, qdev_get_gpio_in(armv7m, exti_irq[i]));
}
+ for (unsigned i = 0; i < 16; i++) {
+ qdev_connect_gpio_out(DEVICE(&s->syscfg), i,
+ qdev_get_gpio_in(DEVICE(&s->exti), i));
+ }
+
/* APB1 BUS */
create_unimplemented_device("TIM2", 0x40000000, 0x400);
create_unimplemented_device("TIM3", 0x40000400, 0x400);
@@ -200,7 +220,6 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
/* RESERVED: 0x40009800, 0x6800 */
/* APB2 BUS */
- create_unimplemented_device("SYSCFG", 0x40010000, 0x30);
create_unimplemented_device("VREFBUF", 0x40010030, 0x1D0);
create_unimplemented_device("COMP", 0x40010200, 0x200);
/* RESERVED: 0x40010800, 0x1400 */
diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h
index f7305568dc..baf70410b5 100644
--- a/include/hw/arm/stm32l4x5_soc.h
+++ b/include/hw/arm/stm32l4x5_soc.h
@@ -26,6 +26,7 @@
#include "exec/memory.h"
#include "hw/arm/armv7m.h"
+#include "hw/misc/stm32l4x5_syscfg.h"
#include "hw/misc/stm32l4x5_exti.h"
#include "qom/object.h"
@@ -41,6 +42,7 @@ struct Stm32l4x5SocState {
ARMv7MState armv7m;
Stm32l4x5ExtiState exti;
+ Stm32l4x5SyscfgState syscfg;
MemoryRegion sram1;
MemoryRegion sram2;
--
2.43.0
On Wed, Jan 10, 2024 at 5:47 AM Inès Varhol <ines.varhol@telecom-paris.fr> wrote: > > The SYSCFG input GPIOs aren't connected yet. When the STM32L4x5 GPIO > device will be implemented, its output GPIOs will be connected to the > SYSCFG input GPIOs. > > Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> > Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/arm/Kconfig | 1 + > hw/arm/stm32l4x5_soc.c | 21 ++++++++++++++++++++- > include/hw/arm/stm32l4x5_soc.h | 2 ++ > 3 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig > index 8c8488a70a..bb4693bfbb 100644 > --- a/hw/arm/Kconfig > +++ b/hw/arm/Kconfig > @@ -459,6 +459,7 @@ config STM32L4X5_SOC > bool > select ARM_V7M > select OR_IRQ > + select STM32L4X5_SYSCFG > select STM32L4X5_EXTI > > config XLNX_ZYNQMP_ARM > diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c > index fe46b7c6c0..431f982caf 100644 > --- a/hw/arm/stm32l4x5_soc.c > +++ b/hw/arm/stm32l4x5_soc.c > @@ -37,6 +37,7 @@ > #define SRAM2_SIZE (32 * KiB) > > #define EXTI_ADDR 0x40010400 > +#define SYSCFG_ADDR 0x40010000 > > #define NUM_EXTI_IRQ 40 > /* Match exti line connections with their CPU IRQ number */ > @@ -80,6 +81,7 @@ static void stm32l4x5_soc_initfn(Object *obj) > Stm32l4x5SocState *s = STM32L4X5_SOC(obj); > > object_initialize_child(obj, "exti", &s->exti, TYPE_STM32L4X5_EXTI); > + object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG); > > s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); > s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); > @@ -154,6 +156,19 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) > return; > } > > + /* System configuration controller */ > + busdev = SYS_BUS_DEVICE(&s->syscfg); > + if (!sysbus_realize(busdev, errp)) { > + return; > + } > + sysbus_mmio_map(busdev, 0, SYSCFG_ADDR); > + /* > + * TODO: when the GPIO device is implemented, connect it > + * to SYCFG using `qdev_connect_gpio_out`, NUM_GPIOS and > + * GPIO_NUM_PINS. > + */ > + > + /* EXTI device */ > busdev = SYS_BUS_DEVICE(&s->exti); > if (!sysbus_realize(busdev, errp)) { > return; > @@ -163,6 +178,11 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) > sysbus_connect_irq(busdev, i, qdev_get_gpio_in(armv7m, exti_irq[i])); > } > > + for (unsigned i = 0; i < 16; i++) { > + qdev_connect_gpio_out(DEVICE(&s->syscfg), i, > + qdev_get_gpio_in(DEVICE(&s->exti), i)); > + } > + > /* APB1 BUS */ > create_unimplemented_device("TIM2", 0x40000000, 0x400); > create_unimplemented_device("TIM3", 0x40000400, 0x400); > @@ -200,7 +220,6 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) > /* RESERVED: 0x40009800, 0x6800 */ > > /* APB2 BUS */ > - create_unimplemented_device("SYSCFG", 0x40010000, 0x30); > create_unimplemented_device("VREFBUF", 0x40010030, 0x1D0); > create_unimplemented_device("COMP", 0x40010200, 0x200); > /* RESERVED: 0x40010800, 0x1400 */ > diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h > index f7305568dc..baf70410b5 100644 > --- a/include/hw/arm/stm32l4x5_soc.h > +++ b/include/hw/arm/stm32l4x5_soc.h > @@ -26,6 +26,7 @@ > > #include "exec/memory.h" > #include "hw/arm/armv7m.h" > +#include "hw/misc/stm32l4x5_syscfg.h" > #include "hw/misc/stm32l4x5_exti.h" > #include "qom/object.h" > > @@ -41,6 +42,7 @@ struct Stm32l4x5SocState { > ARMv7MState armv7m; > > Stm32l4x5ExtiState exti; > + Stm32l4x5SyscfgState syscfg; > > MemoryRegion sram1; > MemoryRegion sram2; > -- > 2.43.0 > >
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