On Thu, Jan 4, 2024 at 3:47 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> The same rework did in 'priv_spec' is done for 'vext_spec'. This time is
> simpler, since we only accept one value ("v1.0") and we'll always have
> env->vext_ver set to VEXT_VERSION_1_00_0, thus we don't need helpers to
> convert string to 'vext_ver' back and forth like we needed for
> 'priv_spec'.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 35 +++++++++++++++++++++++++++++++++--
> target/riscv/cpu.h | 1 +
> target/riscv/cpu_cfg.h | 1 -
> target/riscv/tcg/tcg-cpu.c | 15 ---------------
> 4 files changed, 34 insertions(+), 18 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 657569d8a6..c39da44f51 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1267,6 +1267,7 @@ static void riscv_cpu_init(Object *obj)
>
> /* Default values for non-bool cpu properties */
> cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16);
> + cpu->env.vext_ver = VEXT_VERSION_1_00_0;
> }
>
> typedef struct misa_ext_info {
> @@ -1701,9 +1702,38 @@ static const PropertyInfo prop_priv_spec = {
> .set = prop_priv_spec_set,
> };
>
> -Property riscv_cpu_options[] = {
> - DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
> +static void prop_vext_spec_set(Object *obj, Visitor *v, const char *name,
> + void *opaque, Error **errp)
> +{
> + RISCVCPU *cpu = RISCV_CPU(obj);
> + g_autofree char *value = NULL;
>
> + visit_type_str(v, name, &value, errp);
> +
> + if (g_strcmp0(value, VEXT_VER_1_00_0_STR) != 0) {
> + error_setg(errp, "Unsupported vector spec version '%s'", value);
> + return;
> + }
> +
> + cpu_option_add_user_setting(name, VEXT_VERSION_1_00_0);
> + cpu->env.vext_ver = VEXT_VERSION_1_00_0;
> +}
> +
> +static void prop_vext_spec_get(Object *obj, Visitor *v, const char *name,
> + void *opaque, Error **errp)
> +{
> + const char *value = VEXT_VER_1_00_0_STR;
> +
> + visit_type_str(v, name, (char **)&value, errp);
> +}
> +
> +static const PropertyInfo prop_vext_spec = {
> + .name = "vext_spec",
> + .get = prop_vext_spec_get,
> + .set = prop_vext_spec_set,
> +};
> +
> +Property riscv_cpu_options[] = {
> DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),
> DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64),
>
> @@ -1723,6 +1753,7 @@ static Property riscv_cpu_properties[] = {
> {.name = "pmp", .info = &prop_pmp},
>
> {.name = "priv_spec", .info = &prop_priv_spec},
> + {.name = "vext_spec", .info = &prop_vext_spec},
>
> #ifndef CONFIG_USER_ONLY
> DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index aa3d3372e3..f1715d9d31 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -89,6 +89,7 @@ enum {
> };
>
> #define VEXT_VERSION_1_00_0 0x00010000
> +#define VEXT_VER_1_00_0_STR "v1.0"
>
> enum {
> TRANSLATE_SUCCESS,
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index 2dba1f0007..7112af6c4c 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -135,7 +135,6 @@ struct RISCVCPUConfig {
> bool ext_XVentanaCondOps;
>
> uint32_t pmu_mask;
> - char *vext_spec;
> uint16_t vlen;
> uint16_t elen;
> uint16_t cbom_blocksize;
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 4d67b72d9e..6501c29d8e 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -201,21 +201,6 @@ static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
> "in the range [8, 64]");
> return;
> }
> -
> - if (cfg->vext_spec) {
> - if (!g_strcmp0(cfg->vext_spec, "v1.0")) {
> - env->vext_ver = VEXT_VERSION_1_00_0;
> - } else {
> - error_setg(errp, "Unsupported vector spec version '%s'",
> - cfg->vext_spec);
> - return;
> - }
> - } else if (env->vext_ver == 0) {
> - qemu_log("vector version is not specified, "
> - "use the default value v1.0\n");
> -
> - env->vext_ver = VEXT_VERSION_1_00_0;
> - }
> }
>
> static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu)
> --
> 2.43.0
>
>