[PATCH v3 05/16] target/riscv: move 'pmp' to riscv_cpu_properties[]

Daniel Henrique Barboza posted 16 patches 10 months, 4 weeks ago
There is a newer version of this series
[PATCH v3 05/16] target/riscv: move 'pmp' to riscv_cpu_properties[]
Posted by Daniel Henrique Barboza 10 months, 4 weeks ago
Move 'pmp' to riscv_cpu_properties[], creating a new setter() for it
that forbids 'pmp' to be changed in vendor CPUs, like we did with the
'mmu' option.

We'll also have to manually set 'pmp = true' to generic CPUs that were
still relying on the previous default to set it.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/cpu.c | 38 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 36 insertions(+), 2 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 9f1407b73f..01b3b57cee 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -420,6 +420,7 @@ static void riscv_max_cpu_init(Object *obj)
     RISCVMXL mlx = MXL_RV64;
 
     cpu->cfg.mmu = true;
+    cpu->cfg.pmp = true;
 
 #ifdef TARGET_RISCV32
     mlx = MXL_RV32;
@@ -439,6 +440,7 @@ static void rv64_base_cpu_init(Object *obj)
     CPURISCVState *env = &cpu->env;
 
     cpu->cfg.mmu = true;
+    cpu->cfg.pmp = true;
 
     /* We set this in the realise function */
     riscv_cpu_set_misa(env, MXL_RV64, 0);
@@ -568,6 +570,7 @@ static void rv128_base_cpu_init(Object *obj)
     }
 
     cpu->cfg.mmu = true;
+    cpu->cfg.pmp = true;
 
     /* We set this in the realise function */
     riscv_cpu_set_misa(env, MXL_RV128, 0);
@@ -584,6 +587,7 @@ static void rv32_base_cpu_init(Object *obj)
     CPURISCVState *env = &cpu->env;
 
     cpu->cfg.mmu = true;
+    cpu->cfg.pmp = true;
 
     /* We set this in the realise function */
     riscv_cpu_set_misa(env, MXL_RV32, 0);
@@ -1596,9 +1600,38 @@ static const PropertyInfo prop_mmu = {
     .set = prop_mmu_set,
 };
 
-Property riscv_cpu_options[] = {
-    DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
+static void prop_pmp_set(Object *obj, Visitor *v, const char *name,
+                         void *opaque, Error **errp)
+{
+    RISCVCPU *cpu = RISCV_CPU(obj);
+    bool value;
+
+    visit_type_bool(v, name, &value, errp);
 
+    if (cpu->cfg.pmp != value && riscv_cpu_is_vendor(obj)) {
+        cpu_set_prop_err(cpu, name, errp);
+        return;
+    }
+
+    cpu_option_add_user_setting(name, value);
+    cpu->cfg.pmp = value;
+}
+
+static void prop_pmp_get(Object *obj, Visitor *v, const char *name,
+                         void *opaque, Error **errp)
+{
+    bool value = RISCV_CPU(obj)->cfg.pmp;
+
+    visit_type_bool(v, name, &value, errp);
+}
+
+static const PropertyInfo prop_pmp = {
+    .name = "pmp",
+    .get = prop_pmp_get,
+    .set = prop_pmp_set,
+};
+
+Property riscv_cpu_options[] = {
     DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec),
     DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
 
@@ -1618,6 +1651,7 @@ static Property riscv_cpu_properties[] = {
     {.name = "pmu-num", .info = &prop_pmu_num}, /* Deprecated */
 
     {.name = "mmu", .info = &prop_mmu},
+    {.name = "pmp", .info = &prop_pmp},
 
 #ifndef CONFIG_USER_ONLY
     DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
-- 
2.43.0
Re: [PATCH v3 05/16] target/riscv: move 'pmp' to riscv_cpu_properties[]
Posted by Alistair Francis 10 months, 3 weeks ago
On Thu, Jan 4, 2024 at 4:53 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Move 'pmp' to riscv_cpu_properties[], creating a new setter() for it
> that forbids 'pmp' to be changed in vendor CPUs, like we did with the
> 'mmu' option.
>
> We'll also have to manually set 'pmp = true' to generic CPUs that were
> still relying on the previous default to set it.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 38 ++++++++++++++++++++++++++++++++++++--
>  1 file changed, 36 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 9f1407b73f..01b3b57cee 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -420,6 +420,7 @@ static void riscv_max_cpu_init(Object *obj)
>      RISCVMXL mlx = MXL_RV64;
>
>      cpu->cfg.mmu = true;
> +    cpu->cfg.pmp = true;
>
>  #ifdef TARGET_RISCV32
>      mlx = MXL_RV32;
> @@ -439,6 +440,7 @@ static void rv64_base_cpu_init(Object *obj)
>      CPURISCVState *env = &cpu->env;
>
>      cpu->cfg.mmu = true;
> +    cpu->cfg.pmp = true;
>
>      /* We set this in the realise function */
>      riscv_cpu_set_misa(env, MXL_RV64, 0);
> @@ -568,6 +570,7 @@ static void rv128_base_cpu_init(Object *obj)
>      }
>
>      cpu->cfg.mmu = true;
> +    cpu->cfg.pmp = true;
>
>      /* We set this in the realise function */
>      riscv_cpu_set_misa(env, MXL_RV128, 0);
> @@ -584,6 +587,7 @@ static void rv32_base_cpu_init(Object *obj)
>      CPURISCVState *env = &cpu->env;
>
>      cpu->cfg.mmu = true;
> +    cpu->cfg.pmp = true;
>
>      /* We set this in the realise function */
>      riscv_cpu_set_misa(env, MXL_RV32, 0);
> @@ -1596,9 +1600,38 @@ static const PropertyInfo prop_mmu = {
>      .set = prop_mmu_set,
>  };
>
> -Property riscv_cpu_options[] = {
> -    DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
> +static void prop_pmp_set(Object *obj, Visitor *v, const char *name,
> +                         void *opaque, Error **errp)
> +{
> +    RISCVCPU *cpu = RISCV_CPU(obj);
> +    bool value;
> +
> +    visit_type_bool(v, name, &value, errp);
>
> +    if (cpu->cfg.pmp != value && riscv_cpu_is_vendor(obj)) {
> +        cpu_set_prop_err(cpu, name, errp);
> +        return;
> +    }
> +
> +    cpu_option_add_user_setting(name, value);
> +    cpu->cfg.pmp = value;
> +}
> +
> +static void prop_pmp_get(Object *obj, Visitor *v, const char *name,
> +                         void *opaque, Error **errp)
> +{
> +    bool value = RISCV_CPU(obj)->cfg.pmp;
> +
> +    visit_type_bool(v, name, &value, errp);
> +}
> +
> +static const PropertyInfo prop_pmp = {
> +    .name = "pmp",
> +    .get = prop_pmp_get,
> +    .set = prop_pmp_set,
> +};
> +
> +Property riscv_cpu_options[] = {
>      DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec),
>      DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
>
> @@ -1618,6 +1651,7 @@ static Property riscv_cpu_properties[] = {
>      {.name = "pmu-num", .info = &prop_pmu_num}, /* Deprecated */
>
>      {.name = "mmu", .info = &prop_mmu},
> +    {.name = "pmp", .info = &prop_pmp},
>
>  #ifndef CONFIG_USER_ONLY
>      DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
> --
> 2.43.0
>
>