[PATCH 06/22] target/i386: document more deviations from the manual

Paolo Bonzini posted 22 patches 11 months, 1 week ago
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Eduardo Habkost <eduardo@habkost.net>
[PATCH 06/22] target/i386: document more deviations from the manual
Posted by Paolo Bonzini 11 months, 1 week ago
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/decode-new.c.inc | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 2bdbb1bba0f..232c6a45c96 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -26,6 +26,13 @@
  * size (X86_SIZE_*) codes used in the manual.  There are a few differences
  * though.
  *
+ * Operand sizes
+ * -------------
+ *
+ * The manual lists d64 ("cannot encode 32-bit size in 64-bit mode") and f64
+ * ("cannot encode 16-bit or 32-bit size in 64-bit mode") as modifiers of the
+ * "v" or "z" sizes.  The decoder simply makes them separate operand sizes.
+ *
  * Vector operands
  * ---------------
  *
@@ -44,6 +51,11 @@
  * if the difference is expressed via prefixes.  Individual instructions
  * are separated by prefix in the generator functions.
  *
+ * There is a custom size "xh" used to address half of a SSE/AVX operand.
+ * This points to a 64-bit operand for SSE operations, 128-bit operand
+ * for 256-bit AVX operands, etc.  It is used for conversion operations
+ * such as VCVTPH2PS or VCVTSS2SD.
+ *
  * There are a couple cases in which instructions (e.g. MOVD) write the
  * whole XMM or MM register but are established incorrectly in the manual
  * as "d" or "q".  These have to be fixed for the decoder to work correctly.
-- 
2.43.0
Re: [PATCH 06/22] target/i386: document more deviations from the manual
Posted by Richard Henderson 11 months ago
On 12/23/23 05:15, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   target/i386/tcg/decode-new.c.inc | 12 ++++++++++++
>   1 file changed, 12 insertions(+)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


> 
> diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
> index 2bdbb1bba0f..232c6a45c96 100644
> --- a/target/i386/tcg/decode-new.c.inc
> +++ b/target/i386/tcg/decode-new.c.inc
> @@ -26,6 +26,13 @@
>    * size (X86_SIZE_*) codes used in the manual.  There are a few differences
>    * though.
>    *
> + * Operand sizes
> + * -------------
> + *
> + * The manual lists d64 ("cannot encode 32-bit size in 64-bit mode") and f64
> + * ("cannot encode 16-bit or 32-bit size in 64-bit mode") as modifiers of the
> + * "v" or "z" sizes.  The decoder simply makes them separate operand sizes.
> + *
>    * Vector operands
>    * ---------------
>    *
> @@ -44,6 +51,11 @@
>    * if the difference is expressed via prefixes.  Individual instructions
>    * are separated by prefix in the generator functions.
>    *
> + * There is a custom size "xh" used to address half of a SSE/AVX operand.
> + * This points to a 64-bit operand for SSE operations, 128-bit operand
> + * for 256-bit AVX operands, etc.  It is used for conversion operations
> + * such as VCVTPH2PS or VCVTSS2SD.
> + *
>    * There are a couple cases in which instructions (e.g. MOVD) write the
>    * whole XMM or MM register but are established incorrectly in the manual
>    * as "d" or "q".  These have to be fixed for the decoder to work correctly.