This series of patches adds LCOFI delegation from HS-mode to VS-mode.

This possibility must be implemented, as in the AIA spec in section 6.3.2
it is indicated in table 6.1 that in the case when the hideleg bit is set,
the corresponding vsip bit is an alias to the corresponding sip bit, also
for enable registers.

Vadim Shakirov (2):
  target/riscv/csr: Rename groups of interrupts
  target/riscv/csr: Added the ability to delegate LCOFI to VS

 target/riscv/csr.c | 50 ++++++++++++++++++++++++++++++----------------
 1 file changed, 33 insertions(+), 17 deletions(-)

-- 
2.34.1

On Fri, Dec 22, 2023 at 1:08 AM Vadim Shakirov
<vadim.shakirov@syntacore.com> wrote:
>
> This series of patches adds LCOFI delegation from HS-mode to VS-mode.
>
> This possibility must be implemented, as in the AIA spec in section 6.3.2
> it is indicated in table 6.1 that in the case when the hideleg bit is set,
> the corresponding vsip bit is an alias to the corresponding sip bit, also
> for enable registers.
>
> Vadim Shakirov (2):
>   target/riscv/csr: Rename groups of interrupts
>   target/riscv/csr: Added the ability to delegate LCOFI to VS

Thanks for the patch.

Do you mind rebasing this on
https://github.com/alistair23/qemu/tree/riscv-to-apply.next and
sending a new version?

Alistair

>
>  target/riscv/csr.c | 50 ++++++++++++++++++++++++++++++----------------
>  1 file changed, 33 insertions(+), 17 deletions(-)
>
> --
> 2.34.1
>
>

This functionality turns out to have already been added by commit 40336d5b1d4c6b8b8b38c77fda254457d44fe90b

Vadim

________________________________
От: Alistair Francis <alistair23@gmail.com>
Отправлено: 4 января 2024 г. 6:54:27
Кому: Vadim Shakirov
Копия: qemu-devel@nongnu.org; Palmer Dabbelt; Alistair Francis; Bin Meng; Weiwei Li; Daniel Henrique Barboza; Liu Zhiwei; qemu-riscv@nongnu.org
Тема: Re: [PATCH 0/2] Added the ability to delegate LCOFI to VS

«Внимание! Данное письмо от внешнего адресата!»

On Fri, Dec 22, 2023 at 1:08 AM Vadim Shakirov
<vadim.shakirov@syntacore.com> wrote:
>
> This series of patches adds LCOFI delegation from HS-mode to VS-mode.
>
> This possibility must be implemented, as in the AIA spec in section 6.3.2
> it is indicated in table 6.1 that in the case when the hideleg bit is set,
> the corresponding vsip bit is an alias to the corresponding sip bit, also
> for enable registers.
>
> Vadim Shakirov (2):
>   target/riscv/csr: Rename groups of interrupts
>   target/riscv/csr: Added the ability to delegate LCOFI to VS

Thanks for the patch.

Do you mind rebasing this on
https://github.com/alistair23/qemu/tree/riscv-to-apply.next and
sending a new version?

Alistair

>
>  target/riscv/csr.c | 50 ++++++++++++++++++++++++++++++----------------
>  1 file changed, 33 insertions(+), 17 deletions(-)
>
> --
> 2.34.1
>
>