1 | The following changes since commit 191710c221f65b1542f6ea7fa4d30dde6e134fd7: | 1 | The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307: |
---|---|---|---|
2 | 2 | ||
3 | Merge tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu into staging (2023-12-20 09:40:16 -0500) | 3 | Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000) |
4 | 4 | ||
5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
6 | 6 | ||
7 | https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231221 | 7 | https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213 |
8 | 8 | ||
9 | for you to fetch changes up to be45144bee708d3b84c3c474a4d4aeb7e5c4733a: | 9 | for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b: |
10 | 10 | ||
11 | target/loongarch: Add timer information dump support (2023-12-21 16:07:47 +0800) | 11 | hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800) |
12 | 12 | ||
13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
14 | pull-loongarch-20231221 | 14 | pull-loongarch-20241213 |
15 | 15 | ||
16 | ---------------------------------------------------------------- | 16 | ---------------------------------------------------------------- |
17 | Bibo Mao (2): | 17 | Bibo Mao (8): |
18 | hw/loongarch/virt: Align high memory base address with super page size | 18 | include: Add loongarch_pic_common header file |
19 | target/loongarch: Add timer information dump support | 19 | include: Move struct LoongArchPCHPIC to loongarch_pic_common header file |
20 | hw/intc/loongarch_pch: Merge instance_init() into realize() | ||
21 | hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState | ||
22 | hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common | ||
23 | hw/intc/loongarch_pch: Inherit from loongarch_pic_common | ||
24 | hw/intc/loongarch_pch: Add pre_save and post_load interfaces | ||
25 | hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic | ||
20 | 26 | ||
21 | include/hw/loongarch/virt.h | 2 +- | 27 | hw/intc/loongarch_pch_pic.c | 106 +++++++++++---------------------- |
22 | target/loongarch/cpu.c | 2 ++ | 28 | hw/intc/loongarch_pic_common.c | 97 ++++++++++++++++++++++++++++++ |
23 | 2 files changed, 3 insertions(+), 1 deletion(-) | 29 | hw/intc/meson.build | 2 +- |
30 | hw/loongarch/virt.c | 2 +- | ||
31 | include/hw/intc/loongarch_pch_pic.h | 70 +++++----------------- | ||
32 | include/hw/intc/loongarch_pic_common.h | 82 +++++++++++++++++++++++++ | ||
33 | 6 files changed, 230 insertions(+), 129 deletions(-) | ||
34 | create mode 100644 hw/intc/loongarch_pic_common.c | ||
35 | create mode 100644 include/hw/intc/loongarch_pic_common.h | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Add common header file hw/intc/loongarch_pic_common.h, and move | ||
2 | some macro definition from hw/intc/loongarch_pch_pic.h to the common | ||
3 | header file. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_pch_pic.h | 36 +++------------------- | ||
9 | include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++ | ||
10 | 2 files changed, 47 insertions(+), 31 deletions(-) | ||
11 | create mode 100644 include/hw/intc/loongarch_pic_common.h | ||
12 | |||
13 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
16 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | * Copyright (c) 2021 Loongson Technology Corporation Limited | ||
19 | */ | ||
20 | |||
21 | -#include "hw/sysbus.h" | ||
22 | +#ifndef HW_LOONGARCH_PCH_PIC_H | ||
23 | +#define HW_LOONGARCH_PCH_PIC_H | ||
24 | + | ||
25 | +#include "hw/intc/loongarch_pic_common.h" | ||
26 | |||
27 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
28 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
29 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
30 | |||
31 | -#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
32 | -#define PCH_PIC_INT_ID_VER 0x1UL | ||
33 | - | ||
34 | -#define PCH_PIC_INT_ID_LO 0x00 | ||
35 | -#define PCH_PIC_INT_ID_HI 0x04 | ||
36 | -#define PCH_PIC_INT_MASK_LO 0x20 | ||
37 | -#define PCH_PIC_INT_MASK_HI 0x24 | ||
38 | -#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
39 | -#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
40 | -#define PCH_PIC_INT_EDGE_LO 0x60 | ||
41 | -#define PCH_PIC_INT_EDGE_HI 0x64 | ||
42 | -#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
43 | -#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
44 | -#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
45 | -#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
46 | -#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
47 | -#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
48 | -#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
49 | -#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
50 | -#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
51 | -#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
52 | -#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
53 | -#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
54 | -#define PCH_PIC_INT_POL_LO 0x3e0 | ||
55 | -#define PCH_PIC_INT_POL_HI 0x3e4 | ||
56 | - | ||
57 | -#define STATUS_LO_START 0 | ||
58 | -#define STATUS_HI_START 0x4 | ||
59 | -#define POL_LO_START 0x40 | ||
60 | -#define POL_HI_START 0x44 | ||
61 | struct LoongArchPCHPIC { | ||
62 | SysBusDevice parent_obj; | ||
63 | qemu_irq parent_irq[64]; | ||
64 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC { | ||
65 | MemoryRegion iomem8; | ||
66 | unsigned int irq_num; | ||
67 | }; | ||
68 | +#endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
69 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
70 | new file mode 100644 | ||
71 | index XXXXXXX..XXXXXXX | ||
72 | --- /dev/null | ||
73 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
74 | @@ -XXX,XX +XXX,XX @@ | ||
75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
76 | +/* | ||
77 | + * LoongArch 7A1000 I/O interrupt controller definitions | ||
78 | + * Copyright (c) 2024 Loongson Technology Corporation Limited | ||
79 | + */ | ||
80 | + | ||
81 | +#ifndef HW_LOONGARCH_PIC_COMMON_H | ||
82 | +#define HW_LOONGARCH_PIC_COMMON_H | ||
83 | + | ||
84 | +#include "hw/pci-host/ls7a.h" | ||
85 | +#include "hw/sysbus.h" | ||
86 | + | ||
87 | +#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
88 | +#define PCH_PIC_INT_ID_VER 0x1UL | ||
89 | +#define PCH_PIC_INT_ID_LO 0x00 | ||
90 | +#define PCH_PIC_INT_ID_HI 0x04 | ||
91 | +#define PCH_PIC_INT_MASK_LO 0x20 | ||
92 | +#define PCH_PIC_INT_MASK_HI 0x24 | ||
93 | +#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
94 | +#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
95 | +#define PCH_PIC_INT_EDGE_LO 0x60 | ||
96 | +#define PCH_PIC_INT_EDGE_HI 0x64 | ||
97 | +#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
98 | +#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
99 | +#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
100 | +#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
101 | +#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
102 | +#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
103 | +#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
104 | +#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
105 | +#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
106 | +#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
107 | +#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
108 | +#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
109 | +#define PCH_PIC_INT_POL_LO 0x3e0 | ||
110 | +#define PCH_PIC_INT_POL_HI 0x3e4 | ||
111 | + | ||
112 | +#define STATUS_LO_START 0 | ||
113 | +#define STATUS_HI_START 0x4 | ||
114 | +#define POL_LO_START 0x40 | ||
115 | +#define POL_HI_START 0x44 | ||
116 | +#endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
117 | -- | ||
118 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h | ||
2 | to file loongarch_pic_common.h, and rename structure name with | ||
3 | LoongArchPICCommonState. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_pch_pic.h | 27 +------------------------ | ||
9 | include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++ | ||
10 | 2 files changed, 29 insertions(+), 26 deletions(-) | ||
11 | |||
12 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
15 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
16 | @@ -XXX,XX +XXX,XX @@ | ||
17 | |||
18 | #include "hw/intc/loongarch_pic_common.h" | ||
19 | |||
20 | +#define LoongArchPCHPIC LoongArchPICCommonState | ||
21 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
22 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
23 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
24 | |||
25 | -struct LoongArchPCHPIC { | ||
26 | - SysBusDevice parent_obj; | ||
27 | - qemu_irq parent_irq[64]; | ||
28 | - uint64_t int_mask; /*0x020 interrupt mask register*/ | ||
29 | - uint64_t htmsi_en; /*0x040 1=msi*/ | ||
30 | - uint64_t intedge; /*0x060 edge=1 level =0*/ | ||
31 | - uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/ | ||
32 | - uint64_t auto_crtl0; /*0x0c0*/ | ||
33 | - uint64_t auto_crtl1; /*0x0e0*/ | ||
34 | - uint64_t last_intirr; /* edge detection */ | ||
35 | - uint64_t intirr; /* 0x380 interrupt request register */ | ||
36 | - uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
37 | - /* | ||
38 | - * 0x3e0 interrupt level polarity selection | ||
39 | - * register 0 for high level trigger | ||
40 | - */ | ||
41 | - uint64_t int_polarity; | ||
42 | - | ||
43 | - uint8_t route_entry[64]; /*0x100 - 0x138*/ | ||
44 | - uint8_t htmsi_vector[64]; /*0x200 - 0x238*/ | ||
45 | - | ||
46 | - MemoryRegion iomem32_low; | ||
47 | - MemoryRegion iomem32_high; | ||
48 | - MemoryRegion iomem8; | ||
49 | - unsigned int irq_num; | ||
50 | -}; | ||
51 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
52 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
53 | index XXXXXXX..XXXXXXX 100644 | ||
54 | --- a/include/hw/intc/loongarch_pic_common.h | ||
55 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
56 | @@ -XXX,XX +XXX,XX @@ | ||
57 | #define STATUS_HI_START 0x4 | ||
58 | #define POL_LO_START 0x40 | ||
59 | #define POL_HI_START 0x44 | ||
60 | + | ||
61 | +struct LoongArchPICCommonState { | ||
62 | + SysBusDevice parent_obj; | ||
63 | + | ||
64 | + qemu_irq parent_irq[64]; | ||
65 | + uint64_t int_mask; /* 0x020 interrupt mask register */ | ||
66 | + uint64_t htmsi_en; /* 0x040 1=msi */ | ||
67 | + uint64_t intedge; /* 0x060 edge=1 level=0 */ | ||
68 | + uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */ | ||
69 | + uint64_t auto_crtl0; /* 0x0c0 */ | ||
70 | + uint64_t auto_crtl1; /* 0x0e0 */ | ||
71 | + uint64_t last_intirr; /* edge detection */ | ||
72 | + uint64_t intirr; /* 0x380 interrupt request register */ | ||
73 | + uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
74 | + /* | ||
75 | + * 0x3e0 interrupt level polarity selection | ||
76 | + * register 0 for high level trigger | ||
77 | + */ | ||
78 | + uint64_t int_polarity; | ||
79 | + | ||
80 | + uint8_t route_entry[64]; /* 0x100 - 0x138 */ | ||
81 | + uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ | ||
82 | + | ||
83 | + MemoryRegion iomem32_low; | ||
84 | + MemoryRegion iomem32_high; | ||
85 | + MemoryRegion iomem8; | ||
86 | + unsigned int irq_num; | ||
87 | +}; | ||
88 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
89 | -- | ||
90 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Memory region is created in instance_init(), merge it into function | ||
2 | realize(). There is no special class_init() for loongarch_pch object. | ||
1 | 3 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | hw/intc/loongarch_pch_pic.c | 15 ++++----------- | ||
8 | 1 file changed, 4 insertions(+), 11 deletions(-) | ||
9 | |||
10 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
11 | index XXXXXXX..XXXXXXX 100644 | ||
12 | --- a/hw/intc/loongarch_pch_pic.c | ||
13 | +++ b/hw/intc/loongarch_pch_pic.c | ||
14 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
15 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
16 | { | ||
17 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
18 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
19 | |||
20 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
21 | error_setg(errp, "Invalid 'pic_irq_num'"); | ||
22 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
23 | |||
24 | qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); | ||
25 | qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); | ||
26 | -} | ||
27 | - | ||
28 | -static void loongarch_pch_pic_init(Object *obj) | ||
29 | -{ | ||
30 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); | ||
31 | - SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | ||
32 | - | ||
33 | - memory_region_init_io(&s->iomem32_low, obj, | ||
34 | + memory_region_init_io(&s->iomem32_low, OBJECT(dev), | ||
35 | &loongarch_pch_pic_reg32_low_ops, | ||
36 | s, PCH_PIC_NAME(.reg32_part1), 0x100); | ||
37 | - memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops, | ||
38 | + memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, | ||
39 | s, PCH_PIC_NAME(.reg8), 0x2a0); | ||
40 | - memory_region_init_io(&s->iomem32_high, obj, | ||
41 | + memory_region_init_io(&s->iomem32_high, OBJECT(dev), | ||
42 | &loongarch_pch_pic_reg32_high_ops, | ||
43 | s, PCH_PIC_NAME(.reg32_part2), 0xc60); | ||
44 | sysbus_init_mmio(sbd, &s->iomem32_low); | ||
45 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = { | ||
46 | .name = TYPE_LOONGARCH_PCH_PIC, | ||
47 | .parent = TYPE_SYS_BUS_DEVICE, | ||
48 | .instance_size = sizeof(LoongArchPCHPIC), | ||
49 | - .instance_init = loongarch_pch_pic_init, | ||
50 | .class_init = loongarch_pch_pic_class_init, | ||
51 | }; | ||
52 | |||
53 | -- | ||
54 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | With pic vmstate, rename structure name vmstate_loongarch_pch_pic with | ||
2 | vmstate_loongarch_pic_common, and with pic property rename | ||
3 | loongarch_pch_pic_properties with loongarch_pic_common_properties. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++-------------- | ||
9 | 1 file changed, 32 insertions(+), 20 deletions(-) | ||
10 | |||
11 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/hw/intc/loongarch_pch_pic.c | ||
14 | +++ b/hw/intc/loongarch_pch_pic.c | ||
15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
16 | s->int_polarity = 0x0; | ||
17 | } | ||
18 | |||
19 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
20 | +{ | ||
21 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
22 | + | ||
23 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
24 | + error_setg(errp, "Invalid 'pic_irq_num'"); | ||
25 | + return; | ||
26 | + } | ||
27 | +} | ||
28 | + | ||
29 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
30 | { | ||
31 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
32 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
33 | + Error *local_err = NULL; | ||
34 | |||
35 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
36 | - error_setg(errp, "Invalid 'pic_irq_num'"); | ||
37 | + loongarch_pic_common_realize(dev, &local_err); | ||
38 | + if (local_err) { | ||
39 | + error_propagate(errp, local_err); | ||
40 | return; | ||
41 | } | ||
42 | |||
43 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
44 | |||
45 | } | ||
46 | |||
47 | -static Property loongarch_pch_pic_properties[] = { | ||
48 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), | ||
49 | +static Property loongarch_pic_common_properties[] = { | ||
50 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
51 | DEFINE_PROP_END_OF_LIST(), | ||
52 | }; | ||
53 | |||
54 | -static const VMStateDescription vmstate_loongarch_pch_pic = { | ||
55 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
56 | +static const VMStateDescription vmstate_loongarch_pic_common = { | ||
57 | + .name = "loongarch_pch_pic", | ||
58 | .version_id = 1, | ||
59 | .minimum_version_id = 1, | ||
60 | .fields = (const VMStateField[]) { | ||
61 | - VMSTATE_UINT64(int_mask, LoongArchPCHPIC), | ||
62 | - VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC), | ||
63 | - VMSTATE_UINT64(intedge, LoongArchPCHPIC), | ||
64 | - VMSTATE_UINT64(intclr, LoongArchPCHPIC), | ||
65 | - VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC), | ||
66 | - VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC), | ||
67 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64), | ||
68 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64), | ||
69 | - VMSTATE_UINT64(last_intirr, LoongArchPCHPIC), | ||
70 | - VMSTATE_UINT64(intirr, LoongArchPCHPIC), | ||
71 | - VMSTATE_UINT64(intisr, LoongArchPCHPIC), | ||
72 | - VMSTATE_UINT64(int_polarity, LoongArchPCHPIC), | ||
73 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
74 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
75 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
76 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
77 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
78 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
79 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
80 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
81 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
82 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
83 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
84 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
85 | VMSTATE_END_OF_LIST() | ||
86 | } | ||
87 | }; | ||
88 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
89 | |||
90 | dc->realize = loongarch_pch_pic_realize; | ||
91 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
92 | - dc->vmsd = &vmstate_loongarch_pch_pic; | ||
93 | - device_class_set_props(dc, loongarch_pch_pic_properties); | ||
94 | + dc->vmsd = &vmstate_loongarch_pic_common; | ||
95 | + device_class_set_props(dc, loongarch_pic_common_properties); | ||
96 | } | ||
97 | |||
98 | static const TypeInfo loongarch_pch_pic_info = { | ||
99 | -- | ||
100 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Move some common functions to file loongarch_pic_common.c, the common | ||
2 | functions include loongarch_pic_common_realize(), property structure | ||
3 | loongarch_pic_common_properties and vmstate structure | ||
4 | vmstate_loongarch_pic_common. | ||
1 | 5 | ||
6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
7 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
8 | --- | ||
9 | hw/intc/loongarch_pch_pic.c | 37 +----------------------------- | ||
10 | hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++ | ||
11 | 2 files changed, 42 insertions(+), 36 deletions(-) | ||
12 | create mode 100644 hw/intc/loongarch_pic_common.c | ||
13 | |||
14 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/hw/intc/loongarch_pch_pic.c | ||
17 | +++ b/hw/intc/loongarch_pch_pic.c | ||
18 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
19 | s->int_polarity = 0x0; | ||
20 | } | ||
21 | |||
22 | -static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
23 | -{ | ||
24 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
25 | - | ||
26 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
27 | - error_setg(errp, "Invalid 'pic_irq_num'"); | ||
28 | - return; | ||
29 | - } | ||
30 | -} | ||
31 | - | ||
32 | +#include "loongarch_pic_common.c" | ||
33 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
34 | { | ||
35 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
36 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
37 | |||
38 | } | ||
39 | |||
40 | -static Property loongarch_pic_common_properties[] = { | ||
41 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
42 | - DEFINE_PROP_END_OF_LIST(), | ||
43 | -}; | ||
44 | - | ||
45 | -static const VMStateDescription vmstate_loongarch_pic_common = { | ||
46 | - .name = "loongarch_pch_pic", | ||
47 | - .version_id = 1, | ||
48 | - .minimum_version_id = 1, | ||
49 | - .fields = (const VMStateField[]) { | ||
50 | - VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
51 | - VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
52 | - VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
53 | - VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
54 | - VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
55 | - VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
56 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
57 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
58 | - VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
59 | - VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
60 | - VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
61 | - VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
62 | - VMSTATE_END_OF_LIST() | ||
63 | - } | ||
64 | -}; | ||
65 | - | ||
66 | static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
67 | { | ||
68 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
69 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
70 | new file mode 100644 | ||
71 | index XXXXXXX..XXXXXXX | ||
72 | --- /dev/null | ||
73 | +++ b/hw/intc/loongarch_pic_common.c | ||
74 | @@ -XXX,XX +XXX,XX @@ | ||
75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
76 | +/* | ||
77 | + * QEMU Loongson 7A1000 I/O interrupt controller. | ||
78 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
79 | + */ | ||
80 | + | ||
81 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
82 | +{ | ||
83 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
84 | + | ||
85 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
86 | + error_setg(errp, "Invalid 'pic_irq_num'"); | ||
87 | + return; | ||
88 | + } | ||
89 | +} | ||
90 | + | ||
91 | +static Property loongarch_pic_common_properties[] = { | ||
92 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
93 | + DEFINE_PROP_END_OF_LIST(), | ||
94 | +}; | ||
95 | + | ||
96 | +static const VMStateDescription vmstate_loongarch_pic_common = { | ||
97 | + .name = "loongarch_pch_pic", | ||
98 | + .version_id = 1, | ||
99 | + .minimum_version_id = 1, | ||
100 | + .fields = (const VMStateField[]) { | ||
101 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
102 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
103 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
104 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
105 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
106 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
107 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
108 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
109 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
110 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
111 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
112 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
113 | + VMSTATE_END_OF_LIST() | ||
114 | + } | ||
115 | +}; | ||
116 | -- | ||
117 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object, | ||
2 | it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has | ||
3 | its own realize() function. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | hw/intc/loongarch_pch_pic.c | 38 ++++++++++++-------------- | ||
9 | hw/intc/loongarch_pic_common.c | 32 +++++++++++++++++++++- | ||
10 | hw/intc/meson.build | 2 +- | ||
11 | include/hw/intc/loongarch_pch_pic.h | 21 +++++++++++--- | ||
12 | include/hw/intc/loongarch_pic_common.h | 10 +++++++ | ||
13 | 5 files changed, 77 insertions(+), 26 deletions(-) | ||
14 | |||
15 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/hw/intc/loongarch_pch_pic.c | ||
18 | +++ b/hw/intc/loongarch_pch_pic.c | ||
19 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
20 | s->int_polarity = 0x0; | ||
21 | } | ||
22 | |||
23 | -#include "loongarch_pic_common.c" | ||
24 | -static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
25 | +static void loongarch_pic_realize(DeviceState *dev, Error **errp) | ||
26 | { | ||
27 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
28 | - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
29 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
30 | + LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev); | ||
31 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
32 | Error *local_err = NULL; | ||
33 | |||
34 | - loongarch_pic_common_realize(dev, &local_err); | ||
35 | + lpc->parent_realize(dev, &local_err); | ||
36 | if (local_err) { | ||
37 | error_propagate(errp, local_err); | ||
38 | return; | ||
39 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
40 | |||
41 | } | ||
42 | |||
43 | -static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
44 | +static void loongarch_pic_class_init(ObjectClass *klass, void *data) | ||
45 | { | ||
46 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
47 | + LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass); | ||
48 | |||
49 | - dc->realize = loongarch_pch_pic_realize; | ||
50 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
51 | - dc->vmsd = &vmstate_loongarch_pic_common; | ||
52 | - device_class_set_props(dc, loongarch_pic_common_properties); | ||
53 | + device_class_set_parent_realize(dc, loongarch_pic_realize, | ||
54 | + &lpc->parent_realize); | ||
55 | } | ||
56 | |||
57 | -static const TypeInfo loongarch_pch_pic_info = { | ||
58 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
59 | - .parent = TYPE_SYS_BUS_DEVICE, | ||
60 | - .instance_size = sizeof(LoongArchPCHPIC), | ||
61 | - .class_init = loongarch_pch_pic_class_init, | ||
62 | +static const TypeInfo loongarch_pic_types[] = { | ||
63 | + { | ||
64 | + .name = TYPE_LOONGARCH_PIC, | ||
65 | + .parent = TYPE_LOONGARCH_PIC_COMMON, | ||
66 | + .instance_size = sizeof(LoongarchPICState), | ||
67 | + .class_size = sizeof(LoongarchPICClass), | ||
68 | + .class_init = loongarch_pic_class_init, | ||
69 | + } | ||
70 | }; | ||
71 | |||
72 | -static void loongarch_pch_pic_register_types(void) | ||
73 | -{ | ||
74 | - type_register_static(&loongarch_pch_pic_info); | ||
75 | -} | ||
76 | - | ||
77 | -type_init(loongarch_pch_pic_register_types) | ||
78 | +DEFINE_TYPES(loongarch_pic_types) | ||
79 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
80 | index XXXXXXX..XXXXXXX 100644 | ||
81 | --- a/hw/intc/loongarch_pic_common.c | ||
82 | +++ b/hw/intc/loongarch_pic_common.c | ||
83 | @@ -XXX,XX +XXX,XX @@ | ||
84 | * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
85 | */ | ||
86 | |||
87 | +#include "qemu/osdep.h" | ||
88 | +#include "qapi/error.h" | ||
89 | +#include "hw/intc/loongarch_pic_common.h" | ||
90 | +#include "hw/qdev-properties.h" | ||
91 | +#include "migration/vmstate.h" | ||
92 | + | ||
93 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
94 | { | ||
95 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
97 | |||
98 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
99 | error_setg(errp, "Invalid 'pic_irq_num'"); | ||
100 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { | ||
101 | VMSTATE_END_OF_LIST() | ||
102 | } | ||
103 | }; | ||
104 | + | ||
105 | +static void loongarch_pic_common_class_init(ObjectClass *klass, void *data) | ||
106 | +{ | ||
107 | + DeviceClass *dc = DEVICE_CLASS(klass); | ||
108 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass); | ||
109 | + | ||
110 | + device_class_set_parent_realize(dc, loongarch_pic_common_realize, | ||
111 | + &lpcc->parent_realize); | ||
112 | + device_class_set_props(dc, loongarch_pic_common_properties); | ||
113 | + dc->vmsd = &vmstate_loongarch_pic_common; | ||
114 | +} | ||
115 | + | ||
116 | +static const TypeInfo loongarch_pic_common_types[] = { | ||
117 | + { | ||
118 | + .name = TYPE_LOONGARCH_PIC_COMMON, | ||
119 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
120 | + .instance_size = sizeof(LoongArchPICCommonState), | ||
121 | + .class_size = sizeof(LoongArchPICCommonClass), | ||
122 | + .class_init = loongarch_pic_common_class_init, | ||
123 | + .abstract = true, | ||
124 | + } | ||
125 | +}; | ||
126 | + | ||
127 | +DEFINE_TYPES(loongarch_pic_common_types) | ||
128 | diff --git a/hw/intc/meson.build b/hw/intc/meson.build | ||
129 | index XXXXXXX..XXXXXXX 100644 | ||
130 | --- a/hw/intc/meson.build | ||
131 | +++ b/hw/intc/meson.build | ||
132 | @@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) | ||
133 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) | ||
134 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) | ||
135 | specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) | ||
136 | -specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) | ||
137 | +specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c')) | ||
138 | specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) | ||
139 | specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c')) | ||
140 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
141 | index XXXXXXX..XXXXXXX 100644 | ||
142 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
143 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
144 | @@ -XXX,XX +XXX,XX @@ | ||
145 | |||
146 | #include "hw/intc/loongarch_pic_common.h" | ||
147 | |||
148 | -#define LoongArchPCHPIC LoongArchPICCommonState | ||
149 | -#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
150 | -#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
151 | -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
152 | +#define TYPE_LOONGARCH_PIC "loongarch_pic" | ||
153 | +#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name | ||
154 | +OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC) | ||
155 | + | ||
156 | +struct LoongarchPICState { | ||
157 | + LoongArchPICCommonState parent_obj; | ||
158 | +}; | ||
159 | + | ||
160 | +struct LoongarchPICClass { | ||
161 | + LoongArchPICCommonClass parent_class; | ||
162 | + | ||
163 | + DeviceRealize parent_realize; | ||
164 | +}; | ||
165 | + | ||
166 | +#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC | ||
167 | +typedef struct LoongArchPICCommonState LoongArchPCHPIC; | ||
168 | +#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) | ||
169 | |||
170 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
171 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
172 | index XXXXXXX..XXXXXXX 100644 | ||
173 | --- a/include/hw/intc/loongarch_pic_common.h | ||
174 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
175 | @@ -XXX,XX +XXX,XX @@ | ||
176 | #define POL_LO_START 0x40 | ||
177 | #define POL_HI_START 0x44 | ||
178 | |||
179 | +#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common" | ||
180 | +OBJECT_DECLARE_TYPE(LoongArchPICCommonState, | ||
181 | + LoongArchPICCommonClass, LOONGARCH_PIC_COMMON) | ||
182 | + | ||
183 | struct LoongArchPICCommonState { | ||
184 | SysBusDevice parent_obj; | ||
185 | |||
186 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState { | ||
187 | MemoryRegion iomem8; | ||
188 | unsigned int irq_num; | ||
189 | }; | ||
190 | + | ||
191 | +struct LoongArchPICCommonClass { | ||
192 | + SysBusDeviceClass parent_class; | ||
193 | + | ||
194 | + DeviceRealize parent_realize; | ||
195 | +}; | ||
196 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
197 | -- | ||
198 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Add vmstate pre_save and post_load interfaces, which can be used | ||
2 | by pic kvm driver in future. | ||
1 | 3 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | hw/intc/loongarch_pic_common.c | 26 ++++++++++++++++++++++++++ | ||
8 | include/hw/intc/loongarch_pic_common.h | 2 ++ | ||
9 | 2 files changed, 28 insertions(+) | ||
10 | |||
11 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/hw/intc/loongarch_pic_common.c | ||
14 | +++ b/hw/intc/loongarch_pic_common.c | ||
15 | @@ -XXX,XX +XXX,XX @@ | ||
16 | #include "hw/qdev-properties.h" | ||
17 | #include "migration/vmstate.h" | ||
18 | |||
19 | +static int loongarch_pic_pre_save(void *opaque) | ||
20 | +{ | ||
21 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; | ||
22 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); | ||
23 | + | ||
24 | + if (lpcc->pre_save) { | ||
25 | + return lpcc->pre_save(s); | ||
26 | + } | ||
27 | + | ||
28 | + return 0; | ||
29 | +} | ||
30 | + | ||
31 | +static int loongarch_pic_post_load(void *opaque, int version_id) | ||
32 | +{ | ||
33 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; | ||
34 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); | ||
35 | + | ||
36 | + if (lpcc->post_load) { | ||
37 | + return lpcc->post_load(s, version_id); | ||
38 | + } | ||
39 | + | ||
40 | + return 0; | ||
41 | +} | ||
42 | + | ||
43 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
44 | { | ||
45 | LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
46 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { | ||
47 | .name = "loongarch_pch_pic", | ||
48 | .version_id = 1, | ||
49 | .minimum_version_id = 1, | ||
50 | + .pre_save = loongarch_pic_pre_save, | ||
51 | + .post_load = loongarch_pic_post_load, | ||
52 | .fields = (const VMStateField[]) { | ||
53 | VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
54 | VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
55 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
56 | index XXXXXXX..XXXXXXX 100644 | ||
57 | --- a/include/hw/intc/loongarch_pic_common.h | ||
58 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
59 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass { | ||
60 | SysBusDeviceClass parent_class; | ||
61 | |||
62 | DeviceRealize parent_realize; | ||
63 | + int (*pre_save)(LoongArchPICCommonState *s); | ||
64 | + int (*post_load)(LoongArchPICCommonState *s, int version_id); | ||
65 | }; | ||
66 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
67 | -- | ||
68 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and | ||
2 | replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON | ||
3 | separately. Also remove unnecessary header files. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | hw/intc/loongarch_pch_pic.c | 24 ++++++++++-------------- | ||
9 | hw/loongarch/virt.c | 2 +- | ||
10 | include/hw/intc/loongarch_pch_pic.h | 4 ---- | ||
11 | 3 files changed, 11 insertions(+), 19 deletions(-) | ||
12 | |||
13 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/hw/intc/loongarch_pch_pic.c | ||
16 | +++ b/hw/intc/loongarch_pch_pic.c | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | |||
19 | #include "qemu/osdep.h" | ||
20 | #include "qemu/bitops.h" | ||
21 | -#include "hw/sysbus.h" | ||
22 | -#include "hw/loongarch/virt.h" | ||
23 | -#include "hw/pci-host/ls7a.h" | ||
24 | #include "hw/irq.h" | ||
25 | #include "hw/intc/loongarch_pch_pic.h" | ||
26 | -#include "hw/qdev-properties.h" | ||
27 | -#include "migration/vmstate.h" | ||
28 | #include "trace.h" | ||
29 | #include "qapi/error.h" | ||
30 | |||
31 | -static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
32 | +static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask, | ||
33 | + int level) | ||
34 | { | ||
35 | uint64_t val; | ||
36 | int irq; | ||
37 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
38 | |||
39 | static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
40 | { | ||
41 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
42 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
43 | uint64_t mask = 1ULL << irq; | ||
44 | |||
45 | assert(irq < s->irq_num); | ||
46 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
47 | static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, | ||
48 | unsigned size) | ||
49 | { | ||
50 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
51 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
52 | uint64_t val = 0; | ||
53 | uint32_t offset = addr & 0xfff; | ||
54 | |||
55 | @@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi) | ||
56 | static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
57 | uint64_t value, unsigned size) | ||
58 | { | ||
59 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
60 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
61 | uint32_t offset, old_valid, data = (uint32_t)value; | ||
62 | uint64_t old, int_mask; | ||
63 | offset = addr & 0xfff; | ||
64 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
65 | static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
66 | unsigned size) | ||
67 | { | ||
68 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
69 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
70 | uint64_t val = 0; | ||
71 | uint32_t offset = addr & 0xfff; | ||
72 | |||
73 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
74 | static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
75 | uint64_t value, unsigned size) | ||
76 | { | ||
77 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
78 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
79 | uint32_t offset, data = (uint32_t)value; | ||
80 | offset = addr & 0xfff; | ||
81 | |||
82 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
83 | static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
84 | unsigned size) | ||
85 | { | ||
86 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
87 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
88 | uint64_t val = 0; | ||
89 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
90 | int64_t offset_tmp; | ||
91 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
92 | static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, | ||
93 | uint64_t data, unsigned size) | ||
94 | { | ||
95 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
97 | int32_t offset_tmp; | ||
98 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
99 | |||
100 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = { | ||
101 | |||
102 | static void loongarch_pch_pic_reset(DeviceState *d) | ||
103 | { | ||
104 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d); | ||
105 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d); | ||
106 | int i; | ||
107 | |||
108 | s->int_mask = -1; | ||
109 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | ||
110 | index XXXXXXX..XXXXXXX 100644 | ||
111 | --- a/hw/loongarch/virt.c | ||
112 | +++ b/hw/loongarch/virt.c | ||
113 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
114 | /* Add Extend I/O Interrupt Controller node */ | ||
115 | fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
116 | |||
117 | - pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); | ||
118 | + pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | ||
119 | num = VIRT_PCH_PIC_IRQ_NUM; | ||
120 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); | ||
121 | d = SYS_BUS_DEVICE(pch_pic); | ||
122 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
123 | index XXXXXXX..XXXXXXX 100644 | ||
124 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
125 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
126 | @@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass { | ||
127 | DeviceRealize parent_realize; | ||
128 | }; | ||
129 | |||
130 | -#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC | ||
131 | -typedef struct LoongArchPICCommonState LoongArchPCHPIC; | ||
132 | -#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) | ||
133 | - | ||
134 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
135 | -- | ||
136 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Add common header file include/hw/intc/loongarch_extioi_common.h, and | ||
2 | move some macro definition from include/hw/intc/loongarch_extioi.h to | ||
3 | the common header file. | ||
1 | 4 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_extioi.h | 50 +------------------ | ||
9 | include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++ | ||
10 | 2 files changed, 59 insertions(+), 49 deletions(-) | ||
11 | create mode 100644 include/hw/intc/loongarch_extioi_common.h | ||
12 | |||
13 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/include/hw/intc/loongarch_extioi.h | ||
16 | +++ b/include/hw/intc/loongarch_extioi.h | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | * Copyright (C) 2021 Loongson Technology Corporation Limited | ||
19 | */ | ||
20 | |||
21 | -#include "hw/sysbus.h" | ||
22 | -#include "hw/loongarch/virt.h" | ||
23 | - | ||
24 | #ifndef LOONGARCH_EXTIOI_H | ||
25 | #define LOONGARCH_EXTIOI_H | ||
26 | |||
27 | -#define LS3A_INTC_IP 8 | ||
28 | -#define EXTIOI_IRQS (256) | ||
29 | -#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) | ||
30 | -/* irq from EXTIOI is routed to no more than 4 cpus */ | ||
31 | -#define EXTIOI_CPUS (4) | ||
32 | -/* map to ipnum per 32 irqs */ | ||
33 | -#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
34 | -#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
35 | -#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
36 | -#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
37 | - | ||
38 | -#define APIC_OFFSET 0x400 | ||
39 | -#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
40 | - | ||
41 | -#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
42 | -#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
43 | -#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
44 | -#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
45 | -#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
46 | -#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
47 | -#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
48 | -#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
49 | -#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
50 | -#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
51 | -#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
52 | -#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
53 | -#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
54 | -#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
55 | -#define EXTIOI_SIZE 0x800 | ||
56 | - | ||
57 | -#define EXTIOI_VIRT_BASE (0x40000000) | ||
58 | -#define EXTIOI_VIRT_SIZE (0x1000) | ||
59 | -#define EXTIOI_VIRT_FEATURES (0x0) | ||
60 | -#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
61 | -#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
62 | -#define EXTIOI_HAS_INT_ENCODE (2) | ||
63 | -#define EXTIOI_HAS_CPU_ENCODE (3) | ||
64 | -#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
65 | - | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
66 | - | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
67 | -#define EXTIOI_VIRT_CONFIG (0x4) | ||
68 | -#define EXTIOI_ENABLE (1) | ||
69 | -#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
70 | -#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
71 | -#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
72 | -#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
73 | +#include "hw/intc/loongarch_extioi_common.h" | ||
74 | |||
75 | typedef struct ExtIOICore { | ||
76 | uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
77 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
78 | new file mode 100644 | ||
79 | index XXXXXXX..XXXXXXX | ||
80 | --- /dev/null | ||
81 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
82 | @@ -XXX,XX +XXX,XX @@ | ||
83 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
84 | +/* | ||
85 | + * LoongArch 3A5000 ext interrupt controller definitions | ||
86 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
87 | + */ | ||
88 | + | ||
89 | +#ifndef LOONGARCH_EXTIOI_COMMON_H | ||
90 | +#define LOONGARCH_EXTIOI_COMMON_H | ||
91 | + | ||
92 | +#include "hw/sysbus.h" | ||
93 | +#include "hw/loongarch/virt.h" | ||
94 | + | ||
95 | +#define LS3A_INTC_IP 8 | ||
96 | +#define EXTIOI_IRQS (256) | ||
97 | +#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) | ||
98 | +/* irq from EXTIOI is routed to no more than 4 cpus */ | ||
99 | +#define EXTIOI_CPUS (4) | ||
100 | +/* map to ipnum per 32 irqs */ | ||
101 | +#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
102 | +#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
103 | +#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
104 | +#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
105 | + | ||
106 | +#define APIC_OFFSET 0x400 | ||
107 | +#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
108 | +#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
109 | +#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
110 | +#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
111 | +#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
112 | +#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
113 | +#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
114 | +#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
115 | +#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
116 | +#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
117 | +#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
118 | +#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
119 | +#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
120 | +#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
121 | +#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
122 | +#define EXTIOI_SIZE 0x800 | ||
123 | + | ||
124 | +#define EXTIOI_VIRT_BASE (0x40000000) | ||
125 | +#define EXTIOI_VIRT_SIZE (0x1000) | ||
126 | +#define EXTIOI_VIRT_FEATURES (0x0) | ||
127 | +#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
128 | +#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
129 | +#define EXTIOI_HAS_INT_ENCODE (2) | ||
130 | +#define EXTIOI_HAS_CPU_ENCODE (3) | ||
131 | +#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
132 | + | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
133 | + | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
134 | +#define EXTIOI_VIRT_CONFIG (0x4) | ||
135 | +#define EXTIOI_ENABLE (1) | ||
136 | +#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
137 | +#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
138 | +#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
139 | +#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
140 | +#endif /* LOONGARCH_EXTIOI_H */ | ||
141 | -- | ||
142 | 2.43.5 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h | ||
2 | to file loongarch_extioi_common.h. | ||
1 | 3 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | include/hw/intc/loongarch_extioi.h | 26 ---------------------- | ||
8 | include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++ | ||
9 | 2 files changed, 27 insertions(+), 26 deletions(-) | ||
10 | |||
11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/include/hw/intc/loongarch_extioi.h | ||
14 | +++ b/include/hw/intc/loongarch_extioi.h | ||
15 | @@ -XXX,XX +XXX,XX @@ | ||
16 | |||
17 | #include "hw/intc/loongarch_extioi_common.h" | ||
18 | |||
19 | -typedef struct ExtIOICore { | ||
20 | - uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
21 | - DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); | ||
22 | - qemu_irq parent_irq[LS3A_INTC_IP]; | ||
23 | -} ExtIOICore; | ||
24 | - | ||
25 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" | ||
26 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) | ||
27 | -struct LoongArchExtIOI { | ||
28 | - SysBusDevice parent_obj; | ||
29 | - uint32_t num_cpu; | ||
30 | - uint32_t features; | ||
31 | - uint32_t status; | ||
32 | - /* hardware state */ | ||
33 | - uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
34 | - uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
35 | - uint32_t isr[EXTIOI_IRQS / 32]; | ||
36 | - uint32_t enable[EXTIOI_IRQS / 32]; | ||
37 | - uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; | ||
38 | - uint32_t coremap[EXTIOI_IRQS / 4]; | ||
39 | - uint32_t sw_pending[EXTIOI_IRQS / 32]; | ||
40 | - uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; | ||
41 | - uint8_t sw_coremap[EXTIOI_IRQS]; | ||
42 | - qemu_irq irq[EXTIOI_IRQS]; | ||
43 | - ExtIOICore *cpu; | ||
44 | - MemoryRegion extioi_system_mem; | ||
45 | - MemoryRegion virt_extend; | ||
46 | -}; | ||
47 | #endif /* LOONGARCH_EXTIOI_H */ | ||
48 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
49 | index XXXXXXX..XXXXXXX 100644 | ||
50 | --- a/include/hw/intc/loongarch_extioi_common.h | ||
51 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
52 | @@ -XXX,XX +XXX,XX @@ | ||
53 | #define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
54 | #define EXTIOI_VIRT_COREMAP_START (0x40) | ||
55 | #define EXTIOI_VIRT_COREMAP_END (0x240) | ||
56 | + | ||
57 | +typedef struct ExtIOICore { | ||
58 | + uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
59 | + DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); | ||
60 | + qemu_irq parent_irq[LS3A_INTC_IP]; | ||
61 | +} ExtIOICore; | ||
62 | + | ||
63 | +struct LoongArchExtIOI { | ||
64 | + SysBusDevice parent_obj; | ||
65 | + uint32_t num_cpu; | ||
66 | + uint32_t features; | ||
67 | + uint32_t status; | ||
68 | + /* hardware state */ | ||
69 | + uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
70 | + uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
71 | + uint32_t isr[EXTIOI_IRQS / 32]; | ||
72 | + uint32_t enable[EXTIOI_IRQS / 32]; | ||
73 | + uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; | ||
74 | + uint32_t coremap[EXTIOI_IRQS / 4]; | ||
75 | + uint32_t sw_pending[EXTIOI_IRQS / 32]; | ||
76 | + uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; | ||
77 | + uint8_t sw_coremap[EXTIOI_IRQS]; | ||
78 | + qemu_irq irq[EXTIOI_IRQS]; | ||
79 | + ExtIOICore *cpu; | ||
80 | + MemoryRegion extioi_system_mem; | ||
81 | + MemoryRegion virt_extend; | ||
82 | +}; | ||
83 | #endif /* LOONGARCH_EXTIOI_H */ | ||
84 | -- | ||
85 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Rename structure LoongArchExtIOI with LoongArchExtIOICommonState, |
---|---|---|---|
2 | 2 | since it is defined in file loongarch_extioi_common.h | |
3 | With LoongArch virt machine, there is low memory space with region | ||
4 | 0--0x10000000, and high memory space with started from 0x90000000. | ||
5 | High memory space is aligned with 256M, it will be better if it is | ||
6 | aligned with 1G, which is super page aligned for 4K page size. | ||
7 | |||
8 | Currently linux kernel and uefi bios has no limitation with high | ||
9 | memory base address, it is ok to set high memory base address | ||
10 | with 0x80000000. | ||
11 | 3 | ||
12 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
13 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 5 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
14 | Message-Id: <20231127040231.4123715-1-maobibo@loongson.cn> | ||
15 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
16 | --- | 6 | --- |
17 | include/hw/loongarch/virt.h | 2 +- | 7 | include/hw/intc/loongarch_extioi.h | 1 + |
18 | 1 file changed, 1 insertion(+), 1 deletion(-) | 8 | include/hw/intc/loongarch_extioi_common.h | 2 +- |
9 | 2 files changed, 2 insertions(+), 1 deletion(-) | ||
19 | 10 | ||
20 | diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h | 11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h |
21 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
22 | --- a/include/hw/loongarch/virt.h | 13 | --- a/include/hw/intc/loongarch_extioi.h |
23 | +++ b/include/hw/loongarch/virt.h | 14 | +++ b/include/hw/intc/loongarch_extioi.h |
24 | @@ -XXX,XX +XXX,XX @@ | 15 | @@ -XXX,XX +XXX,XX @@ |
25 | 16 | ||
26 | #define VIRT_LOWMEM_BASE 0 | 17 | #include "hw/intc/loongarch_extioi_common.h" |
27 | #define VIRT_LOWMEM_SIZE 0x10000000 | 18 | |
28 | -#define VIRT_HIGHMEM_BASE 0x90000000 | 19 | +#define LoongArchExtIOI LoongArchExtIOICommonState |
29 | +#define VIRT_HIGHMEM_BASE 0x80000000 | 20 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" |
30 | #define VIRT_GED_EVT_ADDR 0x100e0000 | 21 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) |
31 | #define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN) | 22 | #endif /* LOONGARCH_EXTIOI_H */ |
32 | #define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN) | 23 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h |
24 | index XXXXXXX..XXXXXXX 100644 | ||
25 | --- a/include/hw/intc/loongarch_extioi_common.h | ||
26 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
27 | @@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore { | ||
28 | qemu_irq parent_irq[LS3A_INTC_IP]; | ||
29 | } ExtIOICore; | ||
30 | |||
31 | -struct LoongArchExtIOI { | ||
32 | +struct LoongArchExtIOICommonState { | ||
33 | SysBusDevice parent_obj; | ||
34 | uint32_t num_cpu; | ||
35 | uint32_t features; | ||
33 | -- | 36 | -- |
34 | 2.25.1 | 37 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | With some structure such as vmstate and property, rename LoongArchExtIOI |
---|---|---|---|
2 | 2 | with LoongArchExtIOICommonState, these common structure will be moved | |
3 | Timer emulation sometimes is problematic especially when vm is running in | 3 | to common file. |
4 | kvm mode. This patch adds registers dump support relative with timer | ||
5 | hardware, so that it is easier to find the problems. | ||
6 | 4 | ||
7 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
8 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
9 | Message-Id: <20231206081839.2290178-1-maobibo@loongson.cn> | ||
10 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
11 | --- | 7 | --- |
12 | target/loongarch/cpu.c | 2 ++ | 8 | hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++--------------- |
13 | 1 file changed, 2 insertions(+) | 9 | 1 file changed, 25 insertions(+), 16 deletions(-) |
14 | 10 | ||
15 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 11 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c |
16 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/target/loongarch/cpu.c | 13 | --- a/hw/intc/loongarch_extioi.c |
18 | +++ b/target/loongarch/cpu.c | 14 | +++ b/hw/intc/loongarch_extioi.c |
19 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) | 15 | @@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id) |
20 | qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY); | 16 | return 0; |
21 | qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV); | 17 | } |
22 | qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA); | 18 | |
23 | + qemu_fprintf(f, "TCFG=%016" PRIx64 "\n", env->CSR_TCFG); | 19 | +static int loongarch_extioi_common_post_load(void *opaque, int version_id) |
24 | + qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL); | 20 | +{ |
25 | 21 | + return vmstate_extioi_post_load(opaque, version_id); | |
26 | /* fpr */ | 22 | +} |
27 | if (flags & CPU_DUMP_FPU) { | 23 | + |
24 | static const VMStateDescription vmstate_extioi_core = { | ||
25 | .name = "extioi-core", | ||
26 | .version_id = 1, | ||
27 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = { | ||
28 | }; | ||
29 | |||
30 | static const VMStateDescription vmstate_loongarch_extioi = { | ||
31 | - .name = TYPE_LOONGARCH_EXTIOI, | ||
32 | + .name = "loongarch.extioi", | ||
33 | .version_id = 3, | ||
34 | .minimum_version_id = 3, | ||
35 | - .post_load = vmstate_extioi_post_load, | ||
36 | + .post_load = loongarch_extioi_common_post_load, | ||
37 | .fields = (const VMStateField[]) { | ||
38 | - VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT), | ||
39 | - VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI, | ||
40 | + VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState, | ||
41 | + EXTIOI_IRQS_GROUP_COUNT), | ||
42 | + VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState, | ||
43 | EXTIOI_IRQS_NODETYPE_COUNT / 2), | ||
44 | - VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
45 | - VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
46 | - VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
47 | - VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4), | ||
48 | - | ||
49 | - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu, | ||
50 | - vmstate_extioi_core, ExtIOICore), | ||
51 | - VMSTATE_UINT32(features, LoongArchExtIOI), | ||
52 | - VMSTATE_UINT32(status, LoongArchExtIOI), | ||
53 | + VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState, | ||
54 | + EXTIOI_IRQS / 32), | ||
55 | + VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState, | ||
56 | + EXTIOI_IRQS / 32), | ||
57 | + VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState, | ||
58 | + EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
59 | + VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState, | ||
60 | + EXTIOI_IRQS / 4), | ||
61 | + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState, | ||
62 | + num_cpu, vmstate_extioi_core, ExtIOICore), | ||
63 | + VMSTATE_UINT32(features, LoongArchExtIOICommonState), | ||
64 | + VMSTATE_UINT32(status, LoongArchExtIOICommonState), | ||
65 | VMSTATE_END_OF_LIST() | ||
66 | } | ||
67 | }; | ||
68 | |||
69 | static Property extioi_properties[] = { | ||
70 | - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1), | ||
71 | - DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features, | ||
72 | - EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
73 | + DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), | ||
74 | + DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, | ||
75 | + features, EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
76 | DEFINE_PROP_END_OF_LIST(), | ||
77 | }; | ||
78 | |||
28 | -- | 79 | -- |
29 | 2.25.1 | 80 | 2.43.5 | diff view generated by jsdifflib |