Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
---
target/hexagon/gen_helper_funcs.py | 368 +++++------------------------
target/hexagon/hex_common.py | 48 +++-
2 files changed, 103 insertions(+), 313 deletions(-)
diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py
index ce21d3b688..9cc3d69c49 100755
--- a/target/hexagon/gen_helper_funcs.py
+++ b/target/hexagon/gen_helper_funcs.py
@@ -23,181 +23,14 @@
import hex_common
-##
-## Helpers for gen_helper_function
-##
-def gen_decl_ea(f):
- f.write(" uint32_t EA;\n")
-
-
-def gen_helper_return_type(f, regtype, regid, regno):
- if regno > 1:
- f.write(", ")
- f.write("int32_t")
-
-
-def gen_helper_return_type_pair(f, regtype, regid, regno):
- if regno > 1:
- f.write(", ")
- f.write("int64_t")
-
-
-def gen_helper_arg(f, regtype, regid, regno):
- if regno > 0:
- f.write(", ")
- f.write(f"int32_t {regtype}{regid}V")
-
-
-def gen_helper_arg_new(f, regtype, regid, regno):
- if regno >= 0:
- f.write(", ")
- f.write(f"int32_t {regtype}{regid}N")
-
-
-def gen_helper_arg_pair(f, regtype, regid, regno):
- if regno >= 0:
- f.write(", ")
- f.write(f"int64_t {regtype}{regid}V")
-
-
-def gen_helper_arg_ext(f, regtype, regid, regno):
- if regno > 0:
- f.write(", ")
- f.write(f"void *{regtype}{regid}V_void")
-
-
-def gen_helper_arg_ext_pair(f, regtype, regid, regno):
- if regno > 0:
- f.write(", ")
- f.write(f"void *{regtype}{regid}V_void")
-
-
-def gen_helper_arg_opn(f, regtype, regid, i, tag):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_arg_ext_pair(f, regtype, regid, i)
- else:
- gen_helper_arg_pair(f, regtype, regid, i)
- elif hex_common.is_single(regid):
- if hex_common.is_old_val(regtype, regid, tag):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_arg_ext(f, regtype, regid, i)
- else:
- gen_helper_arg(f, regtype, regid, i)
- elif hex_common.is_new_val(regtype, regid, tag):
- gen_helper_arg_new(f, regtype, regid, i)
- else:
- hex_common.bad_register(regtype, regid)
- else:
- hex_common.bad_register(regtype, regid)
-
-
-def gen_helper_arg_imm(f, immlett):
- f.write(f", int32_t {hex_common.imm_name(immlett)}")
-
-
-def gen_helper_dest_decl(f, regtype, regid, regno, subfield=""):
- f.write(f" int32_t {regtype}{regid}V{subfield} = 0;\n")
-
-
-def gen_helper_dest_decl_pair(f, regtype, regid, regno, subfield=""):
- f.write(f" int64_t {regtype}{regid}V{subfield} = 0;\n")
-
-
-def gen_helper_dest_decl_ext(f, regtype, regid):
- if regtype == "Q":
- f.write(
- f" /* {regtype}{regid}V is *(MMQReg *)" f"({regtype}{regid}V_void) */\n"
- )
- else:
- f.write(
- f" /* {regtype}{regid}V is *(MMVector *)"
- f"({regtype}{regid}V_void) */\n"
- )
-
-
-def gen_helper_dest_decl_ext_pair(f, regtype, regid, regno):
- f.write(
- f" /* {regtype}{regid}V is *(MMVectorPair *))"
- f"{regtype}{regid}V_void) */\n"
- )
-
-
-def gen_helper_dest_decl_opn(f, regtype, regid, i):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_dest_decl_ext_pair(f, regtype, regid, i)
- else:
- gen_helper_dest_decl_pair(f, regtype, regid, i)
- elif hex_common.is_single(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_dest_decl_ext(f, regtype, regid)
- else:
- gen_helper_dest_decl(f, regtype, regid, i)
- else:
- hex_common.bad_register(regtype, regid)
-
-
-def gen_helper_src_var_ext(f, regtype, regid):
- if regtype == "Q":
- f.write(
- f" /* {regtype}{regid}V is *(MMQReg *)" f"({regtype}{regid}V_void) */\n"
- )
- else:
- f.write(
- f" /* {regtype}{regid}V is *(MMVector *)"
- f"({regtype}{regid}V_void) */\n"
- )
-
-
-def gen_helper_src_var_ext_pair(f, regtype, regid, regno):
- f.write(
- f" /* {regtype}{regid}V{regno} is *(MMVectorPair *)"
- f"({regtype}{regid}V{regno}_void) */\n"
- )
-
-
-def gen_helper_return(f, regtype, regid, regno):
- f.write(f" return {regtype}{regid}V;\n")
-
-
-def gen_helper_return_pair(f, regtype, regid, regno):
- f.write(f" return {regtype}{regid}V;\n")
-
-
-def gen_helper_dst_write_ext(f, regtype, regid):
- return
-
-
-def gen_helper_dst_write_ext_pair(f, regtype, regid):
- return
-
-
-def gen_helper_return_opn(f, regtype, regid, i):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_dst_write_ext_pair(f, regtype, regid)
- else:
- gen_helper_return_pair(f, regtype, regid, i)
- elif hex_common.is_single(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_dst_write_ext(f, regtype, regid)
- else:
- gen_helper_return(f, regtype, regid, i)
- else:
- hex_common.bad_register(regtype, regid)
-
-
##
## Generate the TCG code to call the helper
## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
## We produce:
## int32_t HELPER(A2_add)(CPUHexagonState *env, int32_t RsV, int32_t RtV)
## {
-## uint32_t slot __attribute__(unused)) = 4;
## int32_t RdV = 0;
## { RdV=RsV+RtV;}
-## COUNT_HELPER(A2_add);
## return RdV;
## }
##
@@ -205,151 +38,67 @@ def gen_helper_function(f, tag, tagregs, tagimms):
regs = tagregs[tag]
imms = tagimms[tag]
- numresults = 0
- numscalarresults = 0
- numscalarreadwrite = 0
- for regtype, regid in regs:
- if hex_common.is_written(regid):
- numresults += 1
- if hex_common.is_scalar_reg(regtype):
- numscalarresults += 1
- if hex_common.is_readwrite(regid):
- if hex_common.is_scalar_reg(regtype):
- numscalarreadwrite += 1
-
- if numscalarresults > 1:
- ## The helper is bogus when there is more than one result
- f.write(
- f"void HELPER({tag})(CPUHexagonState *env) " f"{{ BOGUS_HELPER({tag}); }}\n"
- )
- else:
- ## The return type of the function is the type of the destination
- ## register (if scalar)
- i = 0
+ ret_type = hex_common.helper_ret_type(tag, regs).func_arg
+
+ declared = []
+ for arg in hex_common.helper_args(tag, regs, imms):
+ declared.append(arg.func_arg)
+
+ arguments = ", ".join(declared)
+ f.write(f"{ret_type} HELPER({tag})({arguments})\n")
+ f.write("{\n")
+ if hex_common.need_ea(tag):
+ f.write(hex_common.code_fmt(f"""\
+ uint32_t EA;
+ """))
+ ## Declare the return variable
+ if not hex_common.is_predicated(tag):
for regtype, regid in regs:
- if hex_common.is_written(regid):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- continue
- else:
- gen_helper_return_type_pair(f, regtype, regid, i)
- elif hex_common.is_single(regid):
- if hex_common.is_hvx_reg(regtype):
- continue
- else:
- gen_helper_return_type(f, regtype, regid, i)
- else:
- hex_common.bad_register(regtype, regid)
- i += 1
+ reg = hex_common.get_register(tag, regtype, regid)
+ if reg.is_writeonly() and not reg.is_hvx_reg():
+ f.write(hex_common.code_fmt(f"""\
+ {reg.helper_arg_type()} {reg.helper_arg_name()} = 0;
+ """))
- if numscalarresults == 0:
- f.write("void")
- f.write(f" HELPER({tag})(CPUHexagonState *env")
-
- ## Arguments include the vector destination operands
- i = 1
- for regtype, regid in regs:
- if hex_common.is_written(regid):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_arg_ext_pair(f, regtype, regid, i)
- else:
- continue
- elif hex_common.is_single(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_arg_ext(f, regtype, regid, i)
- else:
- # This is the return value of the function
- continue
- else:
- hex_common.bad_register(regtype, regid)
- i += 1
-
- ## For conditional instructions, we pass in the destination register
- if "A_CONDEXEC" in hex_common.attribdict[tag]:
- for regtype, regid in regs:
- if hex_common.is_writeonly(regid) and not hex_common.is_hvx_reg(
- regtype
- ):
- gen_helper_arg_opn(f, regtype, regid, i, tag)
- i += 1
-
- ## Arguments to the helper function are the source regs and immediates
- for regtype, regid in regs:
- if hex_common.is_read(regid):
- if hex_common.is_hvx_reg(regtype) and hex_common.is_readwrite(regid):
- continue
- gen_helper_arg_opn(f, regtype, regid, i, tag)
- i += 1
- for immlett, bits, immshift in imms:
- gen_helper_arg_imm(f, immlett)
- i += 1
-
- if hex_common.need_pkt_has_multi_cof(tag):
- f.write(", uint32_t pkt_has_multi_cof")
- if (hex_common.need_pkt_need_commit(tag)):
- f.write(", uint32_t pkt_need_commit")
-
- if hex_common.need_PC(tag):
- if i > 0:
- f.write(", ")
- f.write("target_ulong PC")
- i += 1
- if hex_common.helper_needs_next_PC(tag):
- if i > 0:
- f.write(", ")
- f.write("target_ulong next_PC")
- i += 1
- if hex_common.need_slot(tag):
- if i > 0:
- f.write(", ")
- f.write("uint32_t slotval")
- i += 1
- if hex_common.need_part1(tag):
- if i > 0:
- f.write(", ")
- f.write("uint32_t part1")
- f.write(")\n{\n")
- if hex_common.need_ea(tag):
- gen_decl_ea(f)
- ## Declare the return variable
- i = 0
- if "A_CONDEXEC" not in hex_common.attribdict[tag]:
- for regtype, regid in regs:
- if hex_common.is_writeonly(regid):
- gen_helper_dest_decl_opn(f, regtype, regid, i)
- i += 1
-
- for regtype, regid in regs:
- if hex_common.is_read(regid):
- if hex_common.is_pair(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_src_var_ext_pair(f, regtype, regid, i)
- elif hex_common.is_single(regid):
- if hex_common.is_hvx_reg(regtype):
- gen_helper_src_var_ext(f, regtype, regid)
- else:
- hex_common.bad_register(regtype, regid)
-
- if hex_common.need_slot(tag):
- if "A_LOAD" in hex_common.attribdict[tag]:
- f.write(" bool pkt_has_store_s1 = slotval & 0x1;\n")
- f.write(" uint32_t slot = slotval >> 1;\n")
-
- if "A_FPOP" in hex_common.attribdict[tag]:
- f.write(" arch_fpop_start(env);\n")
-
- f.write(f" {hex_common.semdict[tag]}\n")
-
- if "A_FPOP" in hex_common.attribdict[tag]:
- f.write(" arch_fpop_end(env);\n")
+ ## Print useful information about HVX registers
+ for regtype, regid in regs:
+ reg = hex_common.get_register(tag, regtype, regid)
+ if reg.is_hvx_reg():
+ reg.helper_hvx_desc(f)
+
+ if hex_common.need_slot(tag):
+ if "A_LOAD" in hex_common.attribdict[tag]:
+ f.write(hex_common.code_fmt(f"""\
+ bool pkt_has_store_s1 = slotval & 0x1;
+ """))
+ f.write(hex_common.code_fmt(f"""\
+ uint32_t slot = slotval >> 1;
+ """))
+
+ if "A_FPOP" in hex_common.attribdict[tag]:
+ f.write(hex_common.code_fmt(f"""\
+ arch_fpop_start(env);
+ """))
+
+ f.write(hex_common.code_fmt(f"""\
+ {hex_common.semdict[tag]}
+ """))
+
+ if "A_FPOP" in hex_common.attribdict[tag]:
+ f.write(hex_common.code_fmt(f"""\
+ arch_fpop_end(env);
+ """))
+
+ ## Return the scalar result
+ for regtype, regid in regs:
+ reg = hex_common.get_register(tag, regtype, regid)
+ if reg.is_written() and not reg.is_hvx_reg():
+ f.write(hex_common.code_fmt(f"""\
+ return {reg.helper_arg_name()};
+ """))
- ## Save/return the return variable
- for regtype, regid in regs:
- if hex_common.is_written(regid):
- gen_helper_return_opn(f, regtype, regid, i)
- f.write("}\n\n")
- ## End of the helper definition
+ f.write("}\n\n")
+ ## End of the helper definition
def main():
@@ -370,6 +119,7 @@ def main():
if is_idef_parser_enabled:
hex_common.read_idef_parser_enabled_file(sys.argv[5])
hex_common.calculate_attribs()
+ hex_common.init_registers()
tagregs = hex_common.get_tagregs()
tagimms = hex_common.get_tagimms()
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index 2abd653e6d..fc9ce4e2b0 100755
--- a/target/hexagon/hex_common.py
+++ b/target/hexagon/hex_common.py
@@ -275,10 +275,6 @@ def need_PC(tag):
return "A_IMPLICIT_READS_PC" in attribdict[tag]
-def helper_needs_next_PC(tag):
- return "A_CALL" in attribdict[tag]
-
-
def need_next_PC(tag):
return "A_CALL" in attribdict[tag]
@@ -680,6 +676,10 @@ def decl_tcg(self, f, tag, regno):
"""))
def log_write(self, f, tag):
pass
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
+ """))
class VRegSource(Register, Hvx, OldSource):
def decl_tcg(self, f, tag, regno):
@@ -692,6 +692,10 @@ def decl_tcg(self, f, tag, regno):
TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
+ """))
class VRegNewSource(Register, Hvx, NewSource):
def decl_tcg(self, f, tag, regno):
@@ -701,6 +705,10 @@ def decl_tcg(self, f, tag, regno):
const intptr_t {self.hvx_off()} =
ctx_future_vreg_off(ctx, {self.reg_num}, 1, true);
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
+ """))
class VRegReadWrite(Register, Hvx, ReadWrite):
def decl_tcg(self, f, tag, regno):
@@ -719,6 +727,10 @@ def decl_tcg(self, f, tag, regno):
"""))
def log_write(self, f, tag):
pass
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
+ """))
class VRegTmp(Register, Hvx, ReadWrite):
def decl_tcg(self, f, tag, regno):
@@ -739,6 +751,10 @@ def log_write(self, f, tag):
gen_log_vreg_write(ctx, {self.hvx_off()}, {self.reg_num},
{hvx_newv(tag)});
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
+ """))
class VRegPairDest(Register, Hvx, Dest):
def decl_tcg(self, f, tag, regno):
@@ -754,6 +770,10 @@ def decl_tcg(self, f, tag, regno):
"""))
def log_write(self, f, tag):
pass
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
+ """))
class VRegPairSource(Register, Hvx, OldSource):
def decl_tcg(self, f, tag, regno):
@@ -773,6 +793,10 @@ def decl_tcg(self, f, tag, regno):
TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
+ """))
class VRegPairReadWrite(Register, Hvx, ReadWrite):
def decl_tcg(self, f, tag, regno):
@@ -797,6 +821,10 @@ def log_write(self, f, tag):
gen_log_vreg_write_pair(ctx, {self.hvx_off()}, {self.reg_num},
{hvx_newv(tag)});
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
+ """))
class QRegDest(Register, Hvx, Dest):
def decl_tcg(self, f, tag, regno):
@@ -812,6 +840,10 @@ def decl_tcg(self, f, tag, regno):
"""))
def log_write(self, f, tag):
pass
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
+ """))
class QRegSource(Register, Hvx, OldSource):
def decl_tcg(self, f, tag, regno):
@@ -825,6 +857,10 @@ def decl_tcg(self, f, tag, regno):
TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
"""))
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
+ """))
class QRegReadWrite(Register, Hvx, ReadWrite):
def decl_tcg(self, f, tag, regno):
@@ -843,6 +879,10 @@ def decl_tcg(self, f, tag, regno):
"""))
def log_write(self, f, tag):
pass
+ def helper_hvx_desc(self, f):
+ f.write(code_fmt(f"""\
+ /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
+ """))
def init_registers():
regs = {
--
2.34.1
> -----Original Message-----
> From: Taylor Simpson <ltaylorsimpson@gmail.com>
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain <bcain@quicinc.com>; Matheus Bernardino (QUIC)
> <quic_mathbern@quicinc.com>; Sid Manning <sidneym@quicinc.com>; Marco
> Liebel (QUIC) <quic_mliebel@quicinc.com>; richard.henderson@linaro.org;
> philmd@linaro.org; ale@rev.ng; anjo@rev.ng; ltaylorsimpson@gmail.com
> Subject: [PATCH v2 4/9] Hexagon (target/hexagon) Make generators object
> oriented - gen_helper_funcs
>
> WARNING: This email originated from outside of Qualcomm. Please be wary of
> any links or attachments, and do not enable macros.
>
> Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> ---
> target/hexagon/gen_helper_funcs.py | 368 +++++------------------------
> target/hexagon/hex_common.py | 48 +++-
> 2 files changed, 103 insertions(+), 313 deletions(-)
>
> diff --git a/target/hexagon/gen_helper_funcs.py
> b/target/hexagon/gen_helper_funcs.py
> index ce21d3b688..9cc3d69c49 100755
> --- a/target/hexagon/gen_helper_funcs.py
> +++ b/target/hexagon/gen_helper_funcs.py
> @@ -23,181 +23,14 @@
> import hex_common
>
>
> -##
> -## Helpers for gen_helper_function
> -##
> -def gen_decl_ea(f):
> - f.write(" uint32_t EA;\n")
> -
> -
> -def gen_helper_return_type(f, regtype, regid, regno):
> - if regno > 1:
> - f.write(", ")
> - f.write("int32_t")
> -
> -
> -def gen_helper_return_type_pair(f, regtype, regid, regno):
> - if regno > 1:
> - f.write(", ")
> - f.write("int64_t")
> -
> -
> -def gen_helper_arg(f, regtype, regid, regno):
> - if regno > 0:
> - f.write(", ")
> - f.write(f"int32_t {regtype}{regid}V")
> -
> -
> -def gen_helper_arg_new(f, regtype, regid, regno):
> - if regno >= 0:
> - f.write(", ")
> - f.write(f"int32_t {regtype}{regid}N")
> -
> -
> -def gen_helper_arg_pair(f, regtype, regid, regno):
> - if regno >= 0:
> - f.write(", ")
> - f.write(f"int64_t {regtype}{regid}V")
> -
> -
> -def gen_helper_arg_ext(f, regtype, regid, regno):
> - if regno > 0:
> - f.write(", ")
> - f.write(f"void *{regtype}{regid}V_void")
> -
> -
> -def gen_helper_arg_ext_pair(f, regtype, regid, regno):
> - if regno > 0:
> - f.write(", ")
> - f.write(f"void *{regtype}{regid}V_void")
> -
> -
> -def gen_helper_arg_opn(f, regtype, regid, i, tag):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_arg_ext_pair(f, regtype, regid, i)
> - else:
> - gen_helper_arg_pair(f, regtype, regid, i)
> - elif hex_common.is_single(regid):
> - if hex_common.is_old_val(regtype, regid, tag):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_arg_ext(f, regtype, regid, i)
> - else:
> - gen_helper_arg(f, regtype, regid, i)
> - elif hex_common.is_new_val(regtype, regid, tag):
> - gen_helper_arg_new(f, regtype, regid, i)
> - else:
> - hex_common.bad_register(regtype, regid)
> - else:
> - hex_common.bad_register(regtype, regid)
> -
> -
> -def gen_helper_arg_imm(f, immlett):
> - f.write(f", int32_t {hex_common.imm_name(immlett)}")
> -
> -
> -def gen_helper_dest_decl(f, regtype, regid, regno, subfield=""):
> - f.write(f" int32_t {regtype}{regid}V{subfield} = 0;\n")
> -
> -
> -def gen_helper_dest_decl_pair(f, regtype, regid, regno, subfield=""):
> - f.write(f" int64_t {regtype}{regid}V{subfield} = 0;\n")
> -
> -
> -def gen_helper_dest_decl_ext(f, regtype, regid):
> - if regtype == "Q":
> - f.write(
> - f" /* {regtype}{regid}V is *(MMQReg *)" f"({regtype}{regid}V_void)
> */\n"
> - )
> - else:
> - f.write(
> - f" /* {regtype}{regid}V is *(MMVector *)"
> - f"({regtype}{regid}V_void) */\n"
> - )
> -
> -
> -def gen_helper_dest_decl_ext_pair(f, regtype, regid, regno):
> - f.write(
> - f" /* {regtype}{regid}V is *(MMVectorPair *))"
> - f"{regtype}{regid}V_void) */\n"
> - )
> -
> -
> -def gen_helper_dest_decl_opn(f, regtype, regid, i):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_dest_decl_ext_pair(f, regtype, regid, i)
> - else:
> - gen_helper_dest_decl_pair(f, regtype, regid, i)
> - elif hex_common.is_single(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_dest_decl_ext(f, regtype, regid)
> - else:
> - gen_helper_dest_decl(f, regtype, regid, i)
> - else:
> - hex_common.bad_register(regtype, regid)
> -
> -
> -def gen_helper_src_var_ext(f, regtype, regid):
> - if regtype == "Q":
> - f.write(
> - f" /* {regtype}{regid}V is *(MMQReg *)" f"({regtype}{regid}V_void)
> */\n"
> - )
> - else:
> - f.write(
> - f" /* {regtype}{regid}V is *(MMVector *)"
> - f"({regtype}{regid}V_void) */\n"
> - )
> -
> -
> -def gen_helper_src_var_ext_pair(f, regtype, regid, regno):
> - f.write(
> - f" /* {regtype}{regid}V{regno} is *(MMVectorPair *)"
> - f"({regtype}{regid}V{regno}_void) */\n"
> - )
> -
> -
> -def gen_helper_return(f, regtype, regid, regno):
> - f.write(f" return {regtype}{regid}V;\n")
> -
> -
> -def gen_helper_return_pair(f, regtype, regid, regno):
> - f.write(f" return {regtype}{regid}V;\n")
> -
> -
> -def gen_helper_dst_write_ext(f, regtype, regid):
> - return
> -
> -
> -def gen_helper_dst_write_ext_pair(f, regtype, regid):
> - return
> -
> -
> -def gen_helper_return_opn(f, regtype, regid, i):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_dst_write_ext_pair(f, regtype, regid)
> - else:
> - gen_helper_return_pair(f, regtype, regid, i)
> - elif hex_common.is_single(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_dst_write_ext(f, regtype, regid)
> - else:
> - gen_helper_return(f, regtype, regid, i)
> - else:
> - hex_common.bad_register(regtype, regid)
> -
> -
> ##
> ## Generate the TCG code to call the helper
> ## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
> ## We produce:
> ## int32_t HELPER(A2_add)(CPUHexagonState *env, int32_t RsV, int32_t
> RtV)
> ## {
> -## uint32_t slot __attribute__(unused)) = 4;
> ## int32_t RdV = 0;
> ## { RdV=RsV+RtV;}
> -## COUNT_HELPER(A2_add);
> ## return RdV;
> ## }
> ##
> @@ -205,151 +38,67 @@ def gen_helper_function(f, tag, tagregs, tagimms):
> regs = tagregs[tag]
> imms = tagimms[tag]
>
> - numresults = 0
> - numscalarresults = 0
> - numscalarreadwrite = 0
> - for regtype, regid in regs:
> - if hex_common.is_written(regid):
> - numresults += 1
> - if hex_common.is_scalar_reg(regtype):
> - numscalarresults += 1
> - if hex_common.is_readwrite(regid):
> - if hex_common.is_scalar_reg(regtype):
> - numscalarreadwrite += 1
> -
> - if numscalarresults > 1:
> - ## The helper is bogus when there is more than one result
> - f.write(
> - f"void HELPER({tag})(CPUHexagonState *env) " f"{{
> BOGUS_HELPER({tag}); }}\n"
> - )
> - else:
> - ## The return type of the function is the type of the destination
> - ## register (if scalar)
> - i = 0
> + ret_type = hex_common.helper_ret_type(tag, regs).func_arg
> +
> + declared = []
> + for arg in hex_common.helper_args(tag, regs, imms):
> + declared.append(arg.func_arg)
> +
> + arguments = ", ".join(declared)
> + f.write(f"{ret_type} HELPER({tag})({arguments})\n")
> + f.write("{\n")
> + if hex_common.need_ea(tag):
> + f.write(hex_common.code_fmt(f"""\
> + uint32_t EA;
> + """))
> + ## Declare the return variable
> + if not hex_common.is_predicated(tag):
> for regtype, regid in regs:
> - if hex_common.is_written(regid):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - continue
> - else:
> - gen_helper_return_type_pair(f, regtype, regid, i)
> - elif hex_common.is_single(regid):
> - if hex_common.is_hvx_reg(regtype):
> - continue
> - else:
> - gen_helper_return_type(f, regtype, regid, i)
> - else:
> - hex_common.bad_register(regtype, regid)
> - i += 1
> + reg = hex_common.get_register(tag, regtype, regid)
> + if reg.is_writeonly() and not reg.is_hvx_reg():
> + f.write(hex_common.code_fmt(f"""\
> + {reg.helper_arg_type()} {reg.helper_arg_name()} = 0;
> + """))
>
> - if numscalarresults == 0:
> - f.write("void")
> - f.write(f" HELPER({tag})(CPUHexagonState *env")
> -
> - ## Arguments include the vector destination operands
> - i = 1
> - for regtype, regid in regs:
> - if hex_common.is_written(regid):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_arg_ext_pair(f, regtype, regid, i)
> - else:
> - continue
> - elif hex_common.is_single(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_arg_ext(f, regtype, regid, i)
> - else:
> - # This is the return value of the function
> - continue
> - else:
> - hex_common.bad_register(regtype, regid)
> - i += 1
> -
> - ## For conditional instructions, we pass in the destination register
> - if "A_CONDEXEC" in hex_common.attribdict[tag]:
> - for regtype, regid in regs:
> - if hex_common.is_writeonly(regid) and not hex_common.is_hvx_reg(
> - regtype
> - ):
> - gen_helper_arg_opn(f, regtype, regid, i, tag)
> - i += 1
> -
> - ## Arguments to the helper function are the source regs and immediates
> - for regtype, regid in regs:
> - if hex_common.is_read(regid):
> - if hex_common.is_hvx_reg(regtype) and
> hex_common.is_readwrite(regid):
> - continue
> - gen_helper_arg_opn(f, regtype, regid, i, tag)
> - i += 1
> - for immlett, bits, immshift in imms:
> - gen_helper_arg_imm(f, immlett)
> - i += 1
> -
> - if hex_common.need_pkt_has_multi_cof(tag):
> - f.write(", uint32_t pkt_has_multi_cof")
> - if (hex_common.need_pkt_need_commit(tag)):
> - f.write(", uint32_t pkt_need_commit")
> -
> - if hex_common.need_PC(tag):
> - if i > 0:
> - f.write(", ")
> - f.write("target_ulong PC")
> - i += 1
> - if hex_common.helper_needs_next_PC(tag):
> - if i > 0:
> - f.write(", ")
> - f.write("target_ulong next_PC")
> - i += 1
> - if hex_common.need_slot(tag):
> - if i > 0:
> - f.write(", ")
> - f.write("uint32_t slotval")
> - i += 1
> - if hex_common.need_part1(tag):
> - if i > 0:
> - f.write(", ")
> - f.write("uint32_t part1")
> - f.write(")\n{\n")
> - if hex_common.need_ea(tag):
> - gen_decl_ea(f)
> - ## Declare the return variable
> - i = 0
> - if "A_CONDEXEC" not in hex_common.attribdict[tag]:
> - for regtype, regid in regs:
> - if hex_common.is_writeonly(regid):
> - gen_helper_dest_decl_opn(f, regtype, regid, i)
> - i += 1
> -
> - for regtype, regid in regs:
> - if hex_common.is_read(regid):
> - if hex_common.is_pair(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_src_var_ext_pair(f, regtype, regid, i)
> - elif hex_common.is_single(regid):
> - if hex_common.is_hvx_reg(regtype):
> - gen_helper_src_var_ext(f, regtype, regid)
> - else:
> - hex_common.bad_register(regtype, regid)
> -
> - if hex_common.need_slot(tag):
> - if "A_LOAD" in hex_common.attribdict[tag]:
> - f.write(" bool pkt_has_store_s1 = slotval & 0x1;\n")
> - f.write(" uint32_t slot = slotval >> 1;\n")
> -
> - if "A_FPOP" in hex_common.attribdict[tag]:
> - f.write(" arch_fpop_start(env);\n")
> -
> - f.write(f" {hex_common.semdict[tag]}\n")
> -
> - if "A_FPOP" in hex_common.attribdict[tag]:
> - f.write(" arch_fpop_end(env);\n")
> + ## Print useful information about HVX registers
> + for regtype, regid in regs:
> + reg = hex_common.get_register(tag, regtype, regid)
> + if reg.is_hvx_reg():
> + reg.helper_hvx_desc(f)
> +
> + if hex_common.need_slot(tag):
> + if "A_LOAD" in hex_common.attribdict[tag]:
> + f.write(hex_common.code_fmt(f"""\
> + bool pkt_has_store_s1 = slotval & 0x1;
> + """))
> + f.write(hex_common.code_fmt(f"""\
> + uint32_t slot = slotval >> 1;
> + """))
> +
> + if "A_FPOP" in hex_common.attribdict[tag]:
> + f.write(hex_common.code_fmt(f"""\
> + arch_fpop_start(env);
> + """))
> +
> + f.write(hex_common.code_fmt(f"""\
> + {hex_common.semdict[tag]}
> + """))
> +
> + if "A_FPOP" in hex_common.attribdict[tag]:
> + f.write(hex_common.code_fmt(f"""\
> + arch_fpop_end(env);
> + """))
> +
> + ## Return the scalar result
> + for regtype, regid in regs:
> + reg = hex_common.get_register(tag, regtype, regid)
> + if reg.is_written() and not reg.is_hvx_reg():
> + f.write(hex_common.code_fmt(f"""\
> + return {reg.helper_arg_name()};
> + """))
>
> - ## Save/return the return variable
> - for regtype, regid in regs:
> - if hex_common.is_written(regid):
> - gen_helper_return_opn(f, regtype, regid, i)
> - f.write("}\n\n")
> - ## End of the helper definition
> + f.write("}\n\n")
> + ## End of the helper definition
>
>
> def main():
> @@ -370,6 +119,7 @@ def main():
> if is_idef_parser_enabled:
> hex_common.read_idef_parser_enabled_file(sys.argv[5])
> hex_common.calculate_attribs()
> + hex_common.init_registers()
> tagregs = hex_common.get_tagregs()
> tagimms = hex_common.get_tagimms()
>
> diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
> index 2abd653e6d..fc9ce4e2b0 100755
> --- a/target/hexagon/hex_common.py
> +++ b/target/hexagon/hex_common.py
> @@ -275,10 +275,6 @@ def need_PC(tag):
> return "A_IMPLICIT_READS_PC" in attribdict[tag]
>
>
> -def helper_needs_next_PC(tag):
> - return "A_CALL" in attribdict[tag]
> -
> -
> def need_next_PC(tag):
> return "A_CALL" in attribdict[tag]
>
> @@ -680,6 +676,10 @@ def decl_tcg(self, f, tag, regno):
> """))
> def log_write(self, f, tag):
> pass
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
> + """))
>
> class VRegSource(Register, Hvx, OldSource):
> def decl_tcg(self, f, tag, regno):
> @@ -692,6 +692,10 @@ def decl_tcg(self, f, tag, regno):
> TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
> tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
> + """))
>
> class VRegNewSource(Register, Hvx, NewSource):
> def decl_tcg(self, f, tag, regno):
> @@ -701,6 +705,10 @@ def decl_tcg(self, f, tag, regno):
> const intptr_t {self.hvx_off()} =
> ctx_future_vreg_off(ctx, {self.reg_num}, 1, true);
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
> + """))
>
> class VRegReadWrite(Register, Hvx, ReadWrite):
> def decl_tcg(self, f, tag, regno):
> @@ -719,6 +727,10 @@ def decl_tcg(self, f, tag, regno):
> """))
> def log_write(self, f, tag):
> pass
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
> + """))
>
> class VRegTmp(Register, Hvx, ReadWrite):
> def decl_tcg(self, f, tag, regno):
> @@ -739,6 +751,10 @@ def log_write(self, f, tag):
> gen_log_vreg_write(ctx, {self.hvx_off()}, {self.reg_num},
> {hvx_newv(tag)});
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVector *)({self.helper_arg_name()}) */
> + """))
>
> class VRegPairDest(Register, Hvx, Dest):
> def decl_tcg(self, f, tag, regno):
> @@ -754,6 +770,10 @@ def decl_tcg(self, f, tag, regno):
> """))
> def log_write(self, f, tag):
> pass
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
> + """))
>
> class VRegPairSource(Register, Hvx, OldSource):
> def decl_tcg(self, f, tag, regno):
> @@ -773,6 +793,10 @@ def decl_tcg(self, f, tag, regno):
> TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
> tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
> + """))
>
> class VRegPairReadWrite(Register, Hvx, ReadWrite):
> def decl_tcg(self, f, tag, regno):
> @@ -797,6 +821,10 @@ def log_write(self, f, tag):
> gen_log_vreg_write_pair(ctx, {self.hvx_off()}, {self.reg_num},
> {hvx_newv(tag)});
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMVectorPair *)({self.helper_arg_name()}) */
> + """))
>
> class QRegDest(Register, Hvx, Dest):
> def decl_tcg(self, f, tag, regno):
> @@ -812,6 +840,10 @@ def decl_tcg(self, f, tag, regno):
> """))
> def log_write(self, f, tag):
> pass
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
> + """))
>
> class QRegSource(Register, Hvx, OldSource):
> def decl_tcg(self, f, tag, regno):
> @@ -825,6 +857,10 @@ def decl_tcg(self, f, tag, regno):
> TCGv_ptr {self.reg_tcg()} = tcg_temp_new_ptr();
> tcg_gen_addi_ptr({self.reg_tcg()}, tcg_env, {self.hvx_off()});
> """))
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
> + """))
>
> class QRegReadWrite(Register, Hvx, ReadWrite):
> def decl_tcg(self, f, tag, regno):
> @@ -843,6 +879,10 @@ def decl_tcg(self, f, tag, regno):
> """))
> def log_write(self, f, tag):
> pass
> + def helper_hvx_desc(self, f):
> + f.write(code_fmt(f"""\
> + /* {self.reg_tcg()} is *(MMQReg *)({self.helper_arg_name()}) */
> + """))
>
> def init_registers():
> regs = {
> --
> 2.34.1
Reviewed-by: Brian Cain <bcain@quicinc.com>
© 2016 - 2024 Red Hat, Inc.