Based-on: 20231124202353.1187814-1-dbarboza@ventanamicro.com
("[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile support")

Hi,

In this second version the most notable change is a new patch where we
added a 'parent' field in the profile description. This feature was
suggested by Drew in the v1 review. 

RVA22S64 is then declared as having RVA22U64 as parent, plus any other
extensions, named features and other contraints that are specific to
RVA22S64.

Another notable change is the removal of riscv_cpu_validate_svade(). The
helper (a single assignment) is now open-coded in
riscv_cpu_update_named_features().

Series based on top of:

"[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile support"

Patches missing acks: 2, 6, 7

Changes from v1:
- patch 1:
  - removed riscv_cpu_validate_svade()
- patch 2:
  - add RISCV_PROFILE_ATTR_UNUSED check when validating priv_spec
- patch 5:
  - removed stray blank line
- patch 6 (new):
  - add 'parent' in profile description
- patch 7:
  - declare RVA22U64 as parent of RVA22S64
- v1 link: https://lore.kernel.org/qemu-riscv/20231123191532.1101644-1-dbarboza@ventanamicro.com/ 

Daniel Henrique Barboza (8):
  target/riscv: implement svade
  target/riscv: add priv ver restriction to profiles
  target/riscv/cpu.c: finalize satp_mode earlier
  target/riscv/cpu.c: add riscv_cpu_is_32bit()
  target/riscv: add satp_mode profile support
  target/riscv: add 'parent' in profile description
  target/riscv: add RVA22S64 profile
  target/riscv: add rva22s64 cpu

 target/riscv/cpu-qom.h     |  1 +
 target/riscv/cpu.c         | 67 ++++++++++++++++++++++++----
 target/riscv/cpu.h         |  5 +++
 target/riscv/cpu_cfg.h     |  1 +
 target/riscv/tcg/tcg-cpu.c | 90 +++++++++++++++++++++++++++++++++++++-
 5 files changed, 154 insertions(+), 10 deletions(-)

-- 
2.41.0