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[PATCH v1 2/3] fix some url for amd / xilinx models

Frederic Konrad posted 3 patches 1 year ago
Maintainers: Alistair Francis <alistair@alistair23.me>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Peter Maydell <peter.maydell@linaro.org>, Francisco Iglesias <francisco.iglesias@amd.com>
[PATCH v1 2/3] fix some url for amd / xilinx models
Posted by Frederic Konrad 1 year ago 
It seems that the url changed a bit, and it triggers an error.  Fix the URLs so
the documentation can be reached again.

Signed-off-by: Frederic Konrad <fkonrad@amd.com>
---
 hw/dma/xlnx_csu_dma.c                      | 2 +-
 include/hw/misc/xlnx-versal-cframe-reg.h   | 2 +-
 include/hw/misc/xlnx-versal-cfu.h          | 2 +-
 include/hw/misc/xlnx-versal-pmc-iou-slcr.h | 2 +-
 include/hw/ssi/xlnx-versal-ospi.h          | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
index e89089821a..531013f35a 100644
--- a/hw/dma/xlnx_csu_dma.c
+++ b/hw/dma/xlnx_csu_dma.c
@@ -33,7 +33,7 @@
 
 /*
  * Ref: UG1087 (v1.7) February 8, 2019
- * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
+ * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers
  * CSUDMA Module section
  */
 REG32(ADDR, 0x0)
diff --git a/include/hw/misc/xlnx-versal-cframe-reg.h b/include/hw/misc/xlnx-versal-cframe-reg.h
index a14fbd7fe4..0091505246 100644
--- a/include/hw/misc/xlnx-versal-cframe-reg.h
+++ b/include/hw/misc/xlnx-versal-cframe-reg.h
@@ -12,7 +12,7 @@
  *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
  *
  * [2] Versal ACAP Register Reference,
- *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
+ *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFRAME_REG-Module
  */
 #ifndef HW_MISC_XLNX_VERSAL_CFRAME_REG_H
 #define HW_MISC_XLNX_VERSAL_CFRAME_REG_H
diff --git a/include/hw/misc/xlnx-versal-cfu.h b/include/hw/misc/xlnx-versal-cfu.h
index 86fb841053..be62bab8c8 100644
--- a/include/hw/misc/xlnx-versal-cfu.h
+++ b/include/hw/misc/xlnx-versal-cfu.h
@@ -12,7 +12,7 @@
  *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
  *
  * [2] Versal ACAP Register Reference,
- *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
+ *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFU_CSR-Module
  */
 #ifndef HW_MISC_XLNX_VERSAL_CFU_APB_H
 #define HW_MISC_XLNX_VERSAL_CFU_APB_H
diff --git a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
index f7d24c93c4..0c4a4fd66d 100644
--- a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
+++ b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
@@ -34,7 +34,7 @@
  *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
  *
  * [2] Versal ACAP Register Reference,
- *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___pmc_iop_slcr.html
+ *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PMC_IOP_SLCR-Module
  *
  * QEMU interface:
  * + sysbus MMIO region 0: MemoryRegion for the device's registers
diff --git a/include/hw/ssi/xlnx-versal-ospi.h b/include/hw/ssi/xlnx-versal-ospi.h
index 5d131d351d..4ac975aa2f 100644
--- a/include/hw/ssi/xlnx-versal-ospi.h
+++ b/include/hw/ssi/xlnx-versal-ospi.h
@@ -34,7 +34,7 @@
  *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
  *
  * [2] Versal ACAP Register Reference,
- *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___ospi.html
+ *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/OSPI-Module
  *
  *
  * QEMU interface:
-- 
2.25.1
Re: [PATCH v1 2/3] fix some url for amd / xilinx models
Posted by Alistair Francis 11 months, 3 weeks ago 
On Sat, Nov 25, 2023 at 12:37 AM Frederic Konrad <fkonrad@amd.com> wrote:
>
> It seems that the url changed a bit, and it triggers an error.  Fix the URLs so
> the documentation can be reached again.
>
> Signed-off-by: Frederic Konrad <fkonrad@amd.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/dma/xlnx_csu_dma.c                      | 2 +-
>  include/hw/misc/xlnx-versal-cframe-reg.h   | 2 +-
>  include/hw/misc/xlnx-versal-cfu.h          | 2 +-
>  include/hw/misc/xlnx-versal-pmc-iou-slcr.h | 2 +-
>  include/hw/ssi/xlnx-versal-ospi.h          | 2 +-
>  5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
> index e89089821a..531013f35a 100644
> --- a/hw/dma/xlnx_csu_dma.c
> +++ b/hw/dma/xlnx_csu_dma.c
> @@ -33,7 +33,7 @@
>
>  /*
>   * Ref: UG1087 (v1.7) February 8, 2019
> - * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
> + * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers
>   * CSUDMA Module section
>   */
>  REG32(ADDR, 0x0)
> diff --git a/include/hw/misc/xlnx-versal-cframe-reg.h b/include/hw/misc/xlnx-versal-cframe-reg.h
> index a14fbd7fe4..0091505246 100644
> --- a/include/hw/misc/xlnx-versal-cframe-reg.h
> +++ b/include/hw/misc/xlnx-versal-cframe-reg.h
> @@ -12,7 +12,7 @@
>   *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>   *
>   * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFRAME_REG-Module
>   */
>  #ifndef HW_MISC_XLNX_VERSAL_CFRAME_REG_H
>  #define HW_MISC_XLNX_VERSAL_CFRAME_REG_H
> diff --git a/include/hw/misc/xlnx-versal-cfu.h b/include/hw/misc/xlnx-versal-cfu.h
> index 86fb841053..be62bab8c8 100644
> --- a/include/hw/misc/xlnx-versal-cfu.h
> +++ b/include/hw/misc/xlnx-versal-cfu.h
> @@ -12,7 +12,7 @@
>   *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>   *
>   * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFU_CSR-Module
>   */
>  #ifndef HW_MISC_XLNX_VERSAL_CFU_APB_H
>  #define HW_MISC_XLNX_VERSAL_CFU_APB_H
> diff --git a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> index f7d24c93c4..0c4a4fd66d 100644
> --- a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> +++ b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> @@ -34,7 +34,7 @@
>   *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>   *
>   * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___pmc_iop_slcr.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PMC_IOP_SLCR-Module
>   *
>   * QEMU interface:
>   * + sysbus MMIO region 0: MemoryRegion for the device's registers
> diff --git a/include/hw/ssi/xlnx-versal-ospi.h b/include/hw/ssi/xlnx-versal-ospi.h
> index 5d131d351d..4ac975aa2f 100644
> --- a/include/hw/ssi/xlnx-versal-ospi.h
> +++ b/include/hw/ssi/xlnx-versal-ospi.h
> @@ -34,7 +34,7 @@
>   *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>   *
>   * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___ospi.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/OSPI-Module
>   *
>   *
>   * QEMU interface:
> --
> 2.25.1
>
>
Re: [PATCH v1 2/3] fix some url for amd / xilinx models
Posted by Francisco Iglesias 1 year ago 

On 2023-11-24 15:35, Frederic Konrad wrote:
> It seems that the url changed a bit, and it triggers an error.  Fix the URLs so
> the documentation can be reached again.
> 
> Signed-off-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>


> ---
>   hw/dma/xlnx_csu_dma.c                      | 2 +-
>   include/hw/misc/xlnx-versal-cframe-reg.h   | 2 +-
>   include/hw/misc/xlnx-versal-cfu.h          | 2 +-
>   include/hw/misc/xlnx-versal-pmc-iou-slcr.h | 2 +-
>   include/hw/ssi/xlnx-versal-ospi.h          | 2 +-
>   5 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
> index e89089821a..531013f35a 100644
> --- a/hw/dma/xlnx_csu_dma.c
> +++ b/hw/dma/xlnx_csu_dma.c
> @@ -33,7 +33,7 @@
>   
>   /*
>    * Ref: UG1087 (v1.7) February 8, 2019
> - * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
> + * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers
>    * CSUDMA Module section
>    */
>   REG32(ADDR, 0x0)
> diff --git a/include/hw/misc/xlnx-versal-cframe-reg.h b/include/hw/misc/xlnx-versal-cframe-reg.h
> index a14fbd7fe4..0091505246 100644
> --- a/include/hw/misc/xlnx-versal-cframe-reg.h
> +++ b/include/hw/misc/xlnx-versal-cframe-reg.h
> @@ -12,7 +12,7 @@
>    *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>    *
>    * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFRAME_REG-Module
>    */
>   #ifndef HW_MISC_XLNX_VERSAL_CFRAME_REG_H
>   #define HW_MISC_XLNX_VERSAL_CFRAME_REG_H
> diff --git a/include/hw/misc/xlnx-versal-cfu.h b/include/hw/misc/xlnx-versal-cfu.h
> index 86fb841053..be62bab8c8 100644
> --- a/include/hw/misc/xlnx-versal-cfu.h
> +++ b/include/hw/misc/xlnx-versal-cfu.h
> @@ -12,7 +12,7 @@
>    *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>    *
>    * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/htmldocs/registers/am012/am012-versal-register-reference.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/CFU_CSR-Module
>    */
>   #ifndef HW_MISC_XLNX_VERSAL_CFU_APB_H
>   #define HW_MISC_XLNX_VERSAL_CFU_APB_H
> diff --git a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> index f7d24c93c4..0c4a4fd66d 100644
> --- a/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> +++ b/include/hw/misc/xlnx-versal-pmc-iou-slcr.h
> @@ -34,7 +34,7 @@
>    *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>    *
>    * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___pmc_iop_slcr.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PMC_IOP_SLCR-Module
>    *
>    * QEMU interface:
>    * + sysbus MMIO region 0: MemoryRegion for the device's registers
> diff --git a/include/hw/ssi/xlnx-versal-ospi.h b/include/hw/ssi/xlnx-versal-ospi.h
> index 5d131d351d..4ac975aa2f 100644
> --- a/include/hw/ssi/xlnx-versal-ospi.h
> +++ b/include/hw/ssi/xlnx-versal-ospi.h
> @@ -34,7 +34,7 @@
>    *     https://www.xilinx.com/support/documentation/architecture-manuals/am011-versal-acap-trm.pdf
>    *
>    * [2] Versal ACAP Register Reference,
> - *     https://www.xilinx.com/html_docs/registers/am012/am012-versal-register-reference.html#mod___ospi.html
> + *     https://docs.xilinx.com/r/en-US/am012-versal-register-reference/OSPI-Module
>    *
>    *
>    * QEMU interface:

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