[PATCH v2 0/2] Fix mmu translation with H extension

Ivan Klokov posted 2 patches 1 year ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20231121071757.7178-1-ivan.klokov@syntacore.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
target/riscv/cpu_helper.c | 54 +++++++++++++++++++--------------------
1 file changed, 27 insertions(+), 27 deletions(-)
[PATCH v2 0/2] Fix mmu translation with H extension
Posted by Ivan Klokov 1 year ago
A series of patches that correct the conversion of virtual addresses 
to physical ones. Correct exception for mbare mode and fix MXR bit 
behavior with MPV\MPRV bits.
---
v2:
   - Fix typo, specify the fixed commits
---

Ivan Klokov (2):
  target/riscv/cpu_helper.c: Invalid exception on MMU translation stage
  target/riscv/cpu_helper.c: Fix mxr bit behavior

 target/riscv/cpu_helper.c | 54 +++++++++++++++++++--------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

-- 
2.34.1
Re: [PATCH v2 0/2] Fix mmu translation with H extension
Posted by Alistair Francis 1 year ago
On Tue, Nov 21, 2023 at 5:19 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> A series of patches that correct the conversion of virtual addresses
> to physical ones. Correct exception for mbare mode and fix MXR bit
> behavior with MPV\MPRV bits.
> ---
> v2:
>    - Fix typo, specify the fixed commits
> ---
>
> Ivan Klokov (2):
>   target/riscv/cpu_helper.c: Invalid exception on MMU translation stage
>   target/riscv/cpu_helper.c: Fix mxr bit behavior

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu_helper.c | 54 +++++++++++++++++++--------------------
>  1 file changed, 27 insertions(+), 27 deletions(-)
>
> --
> 2.34.1
>
>