[PATCH v3 0/4] Support RISC-V IOPMP

Ethan Chen via posted 4 patches 1 year ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20231114094705.109146-1-ethan84@andestech.com
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
There is a newer version of this series
hw/core/Kconfig                               |   3 +
hw/core/meson.build                           |   1 +
hw/dma/Kconfig                                |   4 +
hw/dma/atcdmac300.c                           | 566 ++++++++++
hw/dma/meson.build                            |   1 +
hw/misc/Kconfig                               |   4 +
hw/misc/meson.build                           |   1 +
hw/misc/riscv_iopmp.c                         | 967 ++++++++++++++++++
hw/riscv/Kconfig                              |   2 +
hw/riscv/virt.c                               |  72 +-
include/hw/dma/atcdmac300.h                   | 180 ++++
include/hw/misc/riscv_iopmp.h                 | 342 +++++++
.../hw/misc/riscv_iopmp_transaction_info.h    |  28 +
include/hw/riscv/virt.h                       |  10 +-
14 files changed, 2178 insertions(+), 3 deletions(-)
create mode 100644 hw/dma/atcdmac300.c
create mode 100644 hw/misc/riscv_iopmp.c
create mode 100644 include/hw/dma/atcdmac300.h
create mode 100644 include/hw/misc/riscv_iopmp.h
create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h
[PATCH v3 0/4] Support RISC-V IOPMP
Posted by Ethan Chen via 1 year ago
This series implements IOPMP specification v1.0.0-draft4 rapid-k model.

When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt
platform. This DMA devce is connected to the IOPMP and has the functionalities
required by IOPMP, including:
- Support specify source-id (SID)
- Support asynchronous I/O to handle stall transcations

IOPMP takes a transaction which partially match an entry as a partially hit
error. The transaction size is depending on source device, destination device
and bus.

Source device can send transaction information to IOPMP StreamSink. IOPMP will
check partially hit with transaction information. If source device does not send
transaction information, IOPMP will skip partially hit check.

Changes for v3:
  - Remove iopmp_start_addr and iopmp_end_addr in MemTxAttrs
  - IOPMP: Get transaction_info from StreamSink instead of MemTxAttrs
  - ATCDMAC300: Convert ATCDMAC burst to AXI burst
  - ATCDMAC300: Send transaction_info to IOPMP StreamSink

Ethan Chen (4):
  hw/core: Add config stream
  Add RISC-V IOPMP support
  hw/dma: Add Andes ATCDMAC300 support
  hw/riscv/virt: Add IOPMP support

 hw/core/Kconfig                               |   3 +
 hw/core/meson.build                           |   1 +
 hw/dma/Kconfig                                |   4 +
 hw/dma/atcdmac300.c                           | 566 ++++++++++
 hw/dma/meson.build                            |   1 +
 hw/misc/Kconfig                               |   4 +
 hw/misc/meson.build                           |   1 +
 hw/misc/riscv_iopmp.c                         | 967 ++++++++++++++++++
 hw/riscv/Kconfig                              |   2 +
 hw/riscv/virt.c                               |  72 +-
 include/hw/dma/atcdmac300.h                   | 180 ++++
 include/hw/misc/riscv_iopmp.h                 | 342 +++++++
 .../hw/misc/riscv_iopmp_transaction_info.h    |  28 +
 include/hw/riscv/virt.h                       |  10 +-
 14 files changed, 2178 insertions(+), 3 deletions(-)
 create mode 100644 hw/dma/atcdmac300.c
 create mode 100644 hw/misc/riscv_iopmp.c
 create mode 100644 include/hw/dma/atcdmac300.h
 create mode 100644 include/hw/misc/riscv_iopmp.h
 create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h

-- 
2.34.1