On Mon, 6 Nov 2023 at 18:51, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> This is just a constant alias register with the same value as the
> "other" MIDR so it serves no purpose being presented to gdbstub.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Message-Id: <20231103195956.1998255-6-alex.bennee@linaro.org>
> ---
> target/arm/helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 104f9378b4..a681bcba62 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -8993,7 +8993,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
> .type = ARM_CP_CONST, .resetvalue = cpu->revidr },
> };
> ARMCPRegInfo id_v8_midr_alias_cp_reginfo = {
> - .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST,
> + .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST | ARM_CP_NO_GDB,
> .cp = 15, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 4,
> .access = PL1_R, .resetvalue = cpu->midr
> };
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
It's a bit weird to hide this one but not the alias in
id_v8_midr_cp_reginfo[], though.
If we want to expose all these things to gdb I wonder
if we should have the ARMCPRegInfo give both the AArch64
and the AArch32 names for the registers, so that the
user sees the register names they expect, rather than
having their names be a random mix of the two.
thanks
-- PMM