Series comparison

-[PULL 00/10] loongarch-to-apply queue
+[PULL v2 0/6] loongarch-to-apply queue
-The following changes since commit d762bf97931b58839316b68a570eecc6143c9e3e:
+The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:
-  Merge tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-11-03 10:04:12 +0800)
+  Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231103
+  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227
-for you to fetch changes up to f7077737531b40aa879d4644837aeda0f7fc6aa8:
+for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:
-  linux-user/loongarch64: Add LASX sigcontext save/restore (2023-11-03 14:13:46 +0800)
+  target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20231103
+pull-loongarch-20241227
 v1 ... v2
 . Modify patch auther inconsistent with SOB
 ----------------------------------------------------------------
-Richard Henderson (1):
+Bibo Mao (5):
-      linux-user/loongarch64: Use traps to track LSX/LASX usage
+      target/loongarch: Use actual operand size with vbsrl check
       hw/loongarch/virt: Create fdt table on machine creation done notification
       hw/loongarch/virt: Improve fdt table creation for CPU object
       target/loongarch: Use auto method with LSX feature
       target/loongarch: Use auto method with LASX feature
-Song Gao (9):
+Guo Hongyu (1):
-      target/loongarch: Add cpu model 'max'
+      target/loongarch: Fix vldi inst
       target/loongarch: Allow user enable/disable LSX/LASX features
       target/loongarch: Implement query-cpu-model-expansion
       target/loongarch: Support 4K page size
       linux-user/loongarch64: Fix setup_extcontext alloc wrong fpu_context size
       linux-user/loongarch64: setup_sigframe() set 'end' context size 0
       linux-user/loongarch64: Use abi_{ulong,uint} types
       linux-user/loongarch64: Add LSX sigcontext save/restore
       linux-user/loongarch64: Add LASX sigcontext save/restore
- linux-user/loongarch64/cpu_loop.c           |  13 ++
+ hw/loongarch/virt.c                             | 142 ++++++++++++++----------
- linux-user/loongarch64/signal.c             | 189 +++++++++++++++++++++++-----
+ target/loongarch/cpu.c                          |  86 ++++++++------
- qapi/machine-target.json                    |   6 +-
+ target/loongarch/cpu.h                          |   4 +
- target/loongarch/cpu-param.h                |   2 +-
+ target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
- target/loongarch/cpu.c                      |  74 +++++++++++
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
- target/loongarch/cpu.h                      |   2 +
+files changed, 249 insertions(+), 94 deletions(-)
  target/loongarch/insn_trans/trans_vec.c.inc |  11 --
  target/loongarch/loongarch-qmp-cmds.c       |  64 ++++++++++
  target/loongarch/tlb_helper.c               |   9 +-
 files changed, 318 insertions(+), 52 deletions(-)

-[PULL 07/10] linux-user/loongarch64: setup_sigframe() set 'end' context size 0
+[PULL v2 1/6] target/loongarch: Fix vldi inst
-See:
+From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
   https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/signal.c
-The kernel setup_sigcontext() set end context size 0.
+Refer to the link below for a description of the vldi instructions:
 https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
 Fixed errors in vldi instruction implementation.
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Tested-by: Xianglai Li <lixianglai@loongson.cn>
-Message-Id: <20231101030816.2353416-4-gaosong@loongson.cn>
+Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 ---
- linux-user/loongarch64/signal.c | 2 +-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/signal.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/linux-user/loongarch64/signal.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
+@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
-      */
+         break;
-     info = extctx->end.haddr;
+     case 1:
-     __put_user(0, &info->magic);
+         /* data: {2{16'0, imm[7:0], 8'0}} */
--    __put_user(extctx->end.size, &info->size);
+-        data = (t << 24) | (t << 8);
-+    __put_user(0, &info->size);
++        data = (t << 40) | (t << 8);
- }
+         break;
+     case 2:
- static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
+         /* data: {2{8'0, imm[7:0], 16'0}} */
 --
-.25.1
+.43.5

-[PULL 10/10] linux-user/loongarch64: Add LASX sigcontext save/restore
+[PULL v2 2/6] target/loongarch: Use actual operand size with vbsrl check
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Hardcoded 32 bytes is used for vbsrl emulation check, there is
 problem when options lsx=on,lasx=off is used for vbsrl.v instruction
 in TCG mode. It injects LASX exception rather LSX exception.
 Here actual operand size is used.
 Cc: qemu-stable@nongnu.org
 Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Message-Id: <20231101030816.2353416-7-gaosong@loongson.cn>
+Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 ---
- linux-user/loongarch64/signal.c | 68 ++++++++++++++++++++++++++++++---
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
-file changed, 62 insertions(+), 6 deletions(-)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/signal.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/linux-user/loongarch64/signal.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ struct target_lsx_context {
+@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
-     abi_uint  fcsr;
+ {
- } QEMU_ALIGNED(LSX_CTX_ALIGN);
+     int i, ofs;
-+#define LASX_CTX_MAGIC          0x41535801
+-    if (!check_vec(ctx, 32)) {
-+#define LASX_CTX_ALIGN          32
++    if (!check_vec(ctx, oprsz)) {
-+struct target_lasx_context {
+         return true;
 +    abi_ulong regs[4 * 32];
 +    abi_ulong fcc;
 +    abi_uint  fcsr;
 +} QEMU_ALIGNED(LASX_CTX_ALIGN);
 +
  #define CONTEXT_INFO_ALIGN      16
  struct target_sctx_info {
      abi_uint  magic;
@@ -XXX,XX +XXX,XX @@ struct extctx_layout {
      unsigned int flags;
      struct ctx_layout fpu;
      struct ctx_layout lsx;
 +    struct ctx_layout lasx;
      struct ctx_layout end;
  };
@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(CPULoongArchState *env,
      /* For qemu, there is no lazy fp context switch, so fp always present. */
      extctx->flags = SC_USED_FP;
 -    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
 +    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
 +        sp = extframe_alloc(extctx, &extctx->lasx,
 +                        sizeof(struct target_lasx_context), LASX_CTX_ALIGN, sp);
 +    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
          sp = extframe_alloc(extctx, &extctx->lsx,
                          sizeof(struct target_lsx_context), LSX_CTX_ALIGN, sp);
 -
      } else {
          sp = extframe_alloc(extctx, &extctx->fpu,
                          sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
       * Set extension context
       */
 -    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
 +    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
 +        struct target_lasx_context *lasx_ctx;
 +        info = extctx->lasx.haddr;
 +
 +        __put_user(LASX_CTX_MAGIC, &info->magic);
 +        __put_user(extctx->lasx.size, &info->size);
 +
 +        lasx_ctx = (struct target_lasx_context *)(info + 1);
 +
 +        for (i = 0; i < 32; ++i) {
 +            __put_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]);
 +            __put_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]);
 +            __put_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]);
 +            __put_user(env->fpr[i].vreg.UD(3), &lasx_ctx->regs[4 * i + 3]);
 +        }
 +        __put_user(read_fcc(env), &lasx_ctx->fcc);
 +        __put_user(env->fcsr0, &lasx_ctx->fcsr);
 +    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
          struct target_lsx_context *lsx_ctx;
          info = extctx->lsx.haddr;
@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
              extctx->lsx.size = size;
              extctx->size += size;
              break;
 +        case LASX_CTX_MAGIC:
 +            if (size < (sizeof(struct target_sctx_info) +
 +                        sizeof(struct target_lasx_context))) {
 +                return false;
 +            }
 +            extctx->lasx.gaddr = frame;
 +            extctx->lasx.size = size;
 +            extctx->size += size;
 +            break;
          default:
              return false;
          }
@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
          __get_user(env->gpr[i], &sc->sc_regs[i]);
      }
--    if (extctx->lsx.haddr) {
-+    if (extctx->lasx.haddr) {
-+        struct target_lasx_context *lasx_ctx =
-+            extctx->lasx.haddr + sizeof(struct target_sctx_info);
-+
-+        for (i = 0; i < 32; ++i) {
-+            __get_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]);
-+            __get_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]);
-+            __get_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]);
-+            __get_user(env->fpr[i].vreg.UD(3), &lasx_ctx->regs[4 * i + 3]);
-+        }
-+        __get_user(fcc, &lasx_ctx->fcc);
-+        write_fcc(env, fcc);
-+        __get_user(env->fcsr0, &lasx_ctx->fcsr);
-+        restore_fp_status(env);
-+    } else if (extctx->lsx.haddr) {
-         struct target_lsx_context *lsx_ctx =
-             extctx->lsx.haddr + sizeof(struct target_sctx_info);
-@@ -XXX,XX +XXX,XX @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
-         return;
-     }
--    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
-+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
-+        extctx.lasx.haddr = (void *)frame + (extctx.lasx.gaddr - frame_addr);
-+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
-+    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
-         extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
-         extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
-     } else {
-@@ -XXX,XX +XXX,XX @@ long do_rt_sigreturn(CPULoongArchState *env)
-         goto badframe;
-     }
--    if (extctx.lsx.gaddr) {
-+    if (extctx.lasx.gaddr) {
-+        extctx.lasx.haddr = (void *)frame + (extctx.lasx.gaddr - frame_addr);
-+    } else if (extctx.lsx.gaddr) {
-         extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
-     } else if (extctx.fpu.gaddr) {
-         extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
 --
-.25.1
+.43.5

-[PULL 09/10] linux-user/loongarch64: Add LSX sigcontext save/restore
+[PULL v2 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+The same with ACPI table, fdt table is created on machine done
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+notification. Some objects like CPU objects can be created with cold-plug
-Message-Id: <20231101030816.2353416-6-gaosong@loongson.cn>
+method with command such as -smp x, -device la464-loongarch-cpu, so all
 objects finish to create when machine is done.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 ---
- linux-user/loongarch64/signal.c | 107 ++++++++++++++++++++++++++------
+ hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
-file changed, 87 insertions(+), 20 deletions(-)
+file changed, 57 insertions(+), 46 deletions(-)
-diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/signal.c
+--- a/hw/loongarch/virt.c
-+++ b/linux-user/loongarch64/signal.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ struct target_fpu_context {
+@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
- QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
+     }
-                   != offsetof_fpucontext_fr);
+ }
-+#define LSX_CTX_MAGIC           0x53580001
++static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
-+#define LSX_CTX_ALIGN           16
++{
-+struct target_lsx_context {
++    MachineState *machine = MACHINE(lvms);
-+    abi_ulong regs[2 * 32];
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
-+    abi_ulong fcc;
++    int i;
-+    abi_uint  fcsr;
++
-+} QEMU_ALIGNED(LSX_CTX_ALIGN);
++    create_fdt(lvms);
-+
++    fdt_add_cpu_nodes(lvms);
- #define CONTEXT_INFO_ALIGN      16
++    fdt_add_memory_nodes(machine);
- struct target_sctx_info {
++    fdt_add_fw_cfg_node(lvms);
-     abi_uint  magic;
++    fdt_add_flash_node(lvms);
-@@ -XXX,XX +XXX,XX @@ struct ctx_layout {
++
- };
++    /* Add cpu interrupt-controller */
++    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
- struct extctx_layout {
++    /* Add Extend I/O Interrupt Controller node */
--    unsigned int size;
++    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-+    unsigned long size;
++    /* Add PCH PIC node */
-     unsigned int flags;
++    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-     struct ctx_layout fpu;
++    /* Add PCH MSI node */
-+    struct ctx_layout lsx;
++    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-     struct ctx_layout end;
++    /* Add pcie node */
- };
++    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
++
-@@ -XXX,XX +XXX,XX @@ static abi_ptr extframe_alloc(struct extctx_layout *extctx,
++    /*
-     return sp;
++     * Create uart fdt node in reverse order so that they appear
- }
++     * in the finished device tree lowest address first
++     */
--static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
++    for (i = VIRT_UART_COUNT; i-- > 0;) {
-+static abi_ptr setup_extcontext(CPULoongArchState *env,
++        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
-+                                struct extctx_layout *extctx, abi_ptr sp)
++        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
 +        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
 +    }
 +
 +    fdt_add_rtc_node(lvms, &pch_pic_phandle);
 +    fdt_add_ged_reset(lvms);
 +    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 +                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 +                                   VIRT_PLATFORM_BUS_SIZE,
 +                                   VIRT_PLATFORM_BUS_IRQ);
 +
 +    /*
 +     * Since lowmem region starts from 0 and Linux kernel legacy start address
 +     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 +     * access. FDT size limit with 1 MiB.
 +     * Put the FDT into the memory map as a ROM image: this will ensure
 +     * the FDT is copied again upon reset, even if addr points into RAM.
 +     */
 +    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 +                          &address_space_memory);
 +    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 +            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 +}
 +
  static void virt_done(Notifier *notifier, void *data)
  {
-     memset(extctx, 0, sizeof(struct extctx_layout));
+     LoongArchVirtMachineState *lvms = container_of(notifier,
+                                       LoongArchVirtMachineState, machine_done);
-@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
+     virt_build_smbios(lvms);
+     loongarch_acpi_setup(lvms);
-     /* For qemu, there is no lazy fp context switch, so fp always present. */
++    virt_fdt_setup(lvms);
-     extctx->flags = SC_USED_FP;
+ }
--    sp = extframe_alloc(extctx, &extctx->fpu,
-+
+ static void virt_powerdown_req(Notifier *notifier, void *opaque)
-+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
-+        sp = extframe_alloc(extctx, &extctx->lsx,
+ }
-+                        sizeof(struct target_lsx_context), LSX_CTX_ALIGN, sp);
-+
+ static void virt_devices_init(DeviceState *pch_pic,
-+    } else {
+-                                   LoongArchVirtMachineState *lvms,
-+        sp = extframe_alloc(extctx, &extctx->fpu,
+-                                   uint32_t *pch_pic_phandle,
-                         sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
+-                                   uint32_t *pch_msi_phandle)
-+    }
++                                   LoongArchVirtMachineState *lvms)
      return sp;
  }
@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
                             struct extctx_layout *extctx)
  {
-     struct target_sctx_info *info;
+     MachineClass *mc = MACHINE_GET_CLASS(lvms);
--    struct target_fpu_context *fpu_ctx;
+     DeviceState *gpex_dev;
-     int i;
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
+         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
-     __put_user(extctx->flags, &sc->sc_flags);
+     }
-@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
-     }
+-    /* Add pcie node */
+-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
 -
      /*
--     * Set fpu context
+      * Create uart fdt node in reverse order so that they appear
-+     * Set extension context
+      * in the finished device tree lowest address first
-      */
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
--    info = extctx->fpu.haddr;
+         serial_mm_init(get_system_memory(), base, 0,
--    __put_user(FPU_CTX_MAGIC, &info->magic);
+                        qdev_get_gpio_in(pch_pic, irq),
--    __put_user(extctx->fpu.size, &info->size);
+, serial_hd(i), DEVICE_LITTLE_ENDIAN);
+-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
--    fpu_ctx = (struct target_fpu_context *)(info + 1);
+     }
--    for (i = 0; i < 32; ++i) {
--        __put_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
+     /* Network init */
-+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
-+        struct target_lsx_context *lsx_ctx;
+     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
-+        info = extctx->lsx.haddr;
+                          qdev_get_gpio_in(pch_pic,
-+
+                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-+        __put_user(LSX_CTX_MAGIC, &info->magic);
+-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-+        __put_user(extctx->lsx.size, &info->size);
+-    fdt_add_ged_reset(lvms);
-+
-+        lsx_ctx = (struct target_lsx_context *)(info + 1);
+     /* acpi ged */
-+
+     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
-+        for (i = 0; i < 32; ++i) {
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-+            __put_user(env->fpr[i].vreg.UD(0), &lsx_ctx->regs[2 * i]);
+     CPULoongArchState *env;
-+            __put_user(env->fpr[i].vreg.UD(1), &lsx_ctx->regs[2 * i + 1]);
+     CPUState *cpu_state;
-+        }
+     int cpu, pin, i, start, num;
-+        __put_user(read_fcc(env), &lsx_ctx->fcc);
+-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 +        __put_user(env->fcsr0, &lsx_ctx->fcsr);
 +    } else {
 +        struct target_fpu_context *fpu_ctx;
 +        info = extctx->fpu.haddr;
 +
 +        __put_user(FPU_CTX_MAGIC, &info->magic);
 +        __put_user(extctx->fpu.size, &info->size);
 +
 +        fpu_ctx = (struct target_fpu_context *)(info + 1);
 +
 +        for (i = 0; i < 32; ++i) {
 +            __put_user(env->fpr[i].vreg.UD(0), &fpu_ctx->regs[i]);
 +        }
 +        __put_user(read_fcc(env), &fpu_ctx->fcc);
 +        __put_user(env->fcsr0, &fpu_ctx->fcsr);
      }
 -    __put_user(read_fcc(env), &fpu_ctx->fcc);
 -    __put_user(env->fcsr0, &fpu_ctx->fcsr);
      /*
-      * Set end context
+      * Extended IRQ model.
-@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-             extctx->fpu.size = size;
+     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
-             extctx->size += size;
+                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
-             break;
-+        case LSX_CTX_MAGIC:
+-    /* Add cpu interrupt-controller */
-+            if (size < (sizeof(struct target_sctx_info) +
+-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-+                        sizeof(struct target_lsx_context))) {
+-
-+                return false;
+     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
-+            }
+         cpu_state = qemu_get_cpu(cpu);
-+            extctx->lsx.gaddr = frame;
+         cpudev = DEVICE(cpu_state);
-+            extctx->lsx.size = size;
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
 +            extctx->size += size;
 +            break;
          default:
              return false;
          }
-@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
+     }
-                              struct extctx_layout *extctx)
- {
+-    /* Add Extend I/O Interrupt Controller node */
-     int i;
+-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-+    abi_ulong fcc;
+-
+     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
-     __get_user(env->pc, &sc->sc_pc);
+     num = VIRT_PCH_PIC_IRQ_NUM;
-     for (i = 1; i < 32; ++i) {
+     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
-         __get_user(env->gpr[i], &sc->sc_regs[i]);
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-     }
+         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
+     }
--    if (extctx->fpu.haddr) {
-+    if (extctx->lsx.haddr) {
+-    /* Add PCH PIC node */
-+        struct target_lsx_context *lsx_ctx =
+-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-+            extctx->lsx.haddr + sizeof(struct target_sctx_info);
+-
-+
+     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
-+        for (i = 0; i < 32; ++i) {
+     start   =  num;
-+            __get_user(env->fpr[i].vreg.UD(0), &lsx_ctx->regs[2 * i]);
+     num = EXTIOI_IRQS - start;
-+            __get_user(env->fpr[i].vreg.UD(1), &lsx_ctx->regs[2 * i + 1]);
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-+        }
+                               qdev_get_gpio_in(extioi, i + start));
-+        __get_user(fcc, &lsx_ctx->fcc);
+     }
-+        write_fcc(env, fcc);
-+        __get_user(env->fcsr0, &lsx_ctx->fcsr);
+-    /* Add PCH MSI node */
-+        restore_fp_status(env);
+-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-+    } else if (extctx->fpu.haddr) {
+-
-         struct target_fpu_context *fpu_ctx =
+-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
-             extctx->fpu.haddr + sizeof(struct target_sctx_info);
++    virt_devices_init(pch_pic, lvms);
--        abi_ulong fcc;
+ }
-         for (i = 0; i < 32; ++i) {
+ static void virt_firmware_init(LoongArchVirtMachineState *lvms)
--            __get_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
+@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
-+            __get_user(env->fpr[i].vreg.UD(0), &fpu_ctx->regs[i]);
+         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
-         }
+     }
-         __get_user(fcc, &fpu_ctx->fcc);
-         write_fcc(env, fcc);
+-    create_fdt(lvms);
-@@ -XXX,XX +XXX,XX @@ static abi_ptr get_sigframe(struct target_sigaction *ka,
+-
+     /* Create IOCSR space */
-     sp = target_sigsp(get_sp_from_cpustate(env), ka);
+     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
-     sp = ROUND_DOWN(sp, 16);
+                           machine, "iocsr", UINT64_MAX);
--    sp = setup_extcontext(extctx, sp);
+@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
-+    sp = setup_extcontext(env, extctx, sp);
+         lacpu = LOONGARCH_CPU(cpu);
-     sp -= sizeof(struct target_rt_sigframe);
+         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
+     }
-     assert(QEMU_IS_ALIGNED(sp, 16));
+-    fdt_add_cpu_nodes(lvms);
-@@ -XXX,XX +XXX,XX @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
+-    fdt_add_memory_nodes(machine);
-         force_sigsegv(sig);
+     fw_cfg_add_memory(machine);
-         return;
-     }
+     /* Node0 memory */
--    extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
+@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
--    extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+                         memmap_table,
-+
+                         sizeof(struct memmap_entry) * (memmap_entries));
-+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+     }
-+        extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
+-    fdt_add_fw_cfg_node(lvms);
-+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+-    fdt_add_flash_node(lvms);
-+    } else {
-+        extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
+     /* Initialize the IO interrupt subsystem */
-+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+     virt_irq_init(lvms);
-+    }
+-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-     tswap_siginfo(&frame->rs_info, info);
+-                                   VIRT_PLATFORM_BUS_SIZE,
+-                                   VIRT_PLATFORM_BUS_IRQ);
-@@ -XXX,XX +XXX,XX @@ long do_rt_sigreturn(CPULoongArchState *env)
+     lvms->machine_done.notify = virt_done;
-     if (!frame) {
+     qemu_add_machine_init_done_notifier(&lvms->machine_done);
-         goto badframe;
+      /* connect powerdown request */
-     }
+     lvms->powerdown_notifier.notify = virt_powerdown_req;
--    if (extctx.fpu.gaddr) {
+     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
-+
-+    if (extctx.lsx.gaddr) {
+-    /*
-+        extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
+-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-+    } else if (extctx.fpu.gaddr) {
+-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-         extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
+-     * access. FDT size limit with 1 MiB.
-     }
+-     * Put the FDT into the memory map as a ROM image: this will ensure
+-     * the FDT is copied again upon reset, even if addr points into RAM.
 -     */
 -    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 -                          &address_space_memory);
 -    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 -
      lvms->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lvms->bootinfo);
  }
 --
-.25.1
+.43.5

-[PULL 05/10] linux-user/loongarch64: Use traps to track LSX/LASX usage
+[PULL v2 4/6] hw/loongarch/virt: Improve fdt table creation for CPU object
-From: Richard Henderson <richard.henderson@linaro.org>
+For CPU object, possible_cpu_arch_ids() function is used rather than
 smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
 is not accurate for all possible CPU objects, possible_cpu_arch_ids()
 is used here.
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20231101030816.2353416-2-gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- linux-user/loongarch64/cpu_loop.c           | 13 +++++++++++++
+ hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
- target/loongarch/insn_trans/trans_vec.c.inc | 11 -----------
+file changed, 25 insertions(+), 14 deletions(-)
 files changed, 13 insertions(+), 11 deletions(-)
-diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu_loop.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/cpu_loop.c
+--- a/hw/loongarch/virt.c
-+++ b/linux-user/loongarch64/cpu_loop.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ void cpu_loop(CPULoongArchState *env)
+@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-         case EXCCODE_BCE:
+ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
-             force_sig_fault(TARGET_SIGSYS, TARGET_SI_KERNEL, env->pc);
+ {
-             break;
+     int num;
 -    const MachineState *ms = MACHINE(lvms);
 -    int smp_cpus = ms->smp.cpus;
 +    MachineState *ms = MACHINE(lvms);
 +    MachineClass *mc = MACHINE_GET_CLASS(ms);
 +    const CPUArchIdList *possible_cpus;
 +    LoongArchCPU *cpu;
 +    CPUState *cs;
 +    char *nodename, *map_path;
      qemu_fdt_add_subnode(ms->fdt, "/cpus");
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
      /* cpu nodes */
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
 -        LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
 -        CPUState *cs = CPU(cpu);
 +    possible_cpus = mc->possible_cpu_arch_ids(ms);
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 +
-+        /*
++        nodename = g_strdup_printf("/cpus/cpu@%d", num);
-+         * Begin with LSX and LASX disabled, then enable on the first trap.
++        cpu = LOONGARCH_CPU(cs);
-+         * In this way we can tell if the unit is in use.  This is used to
-+         * choose the layout of any signal frame.
+         qemu_fdt_add_subnode(ms->fdt, nodename);
-+         */
+         qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
-+        case EXCCODE_SXD:
+         qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
-+            env->CSR_EUEN |= R_CSR_EUEN_SXE_MASK;
+                                 cpu->dtb_compatible);
-+            break;
+-        if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
-+        case EXCCODE_ASXD:
++        if (possible_cpus->cpus[num].props.has_node_id) {
-+            env->CSR_EUEN |= R_CSR_EUEN_ASXE_MASK;
+             qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
-+            break;
+-                ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
-+
++                possible_cpus->cpus[num].props.node_id);
-         case EXCP_ATOMIC:
+         }
-             cpu_exec_step_atomic(cs);
+         qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
-             break;
+         qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
-diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/insn_trans/trans_vec.c.inc
+     /*cpu map */
-+++ b/target/loongarch/insn_trans/trans_vec.c.inc
+     qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
-@@ -XXX,XX +XXX,XX @@
++    for (num = 0; num < possible_cpus->len; num++) {
-  * Copyright (c) 2022-2023 Loongson Technology Corporation Limited
++        cs = possible_cpus->cpus[num].cpu;
-  */
++        if (cs == NULL) {
++            continue;
--#ifndef CONFIG_USER_ONLY
++        }
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
 -        char *map_path;
 -
- static bool check_vec(DisasContext *ctx, uint32_t oprsz)
++        nodename = g_strdup_printf("/cpus/cpu@%d", num);
- {
+         if (ms->smp.threads > 1) {
-     if ((oprsz == 16) && ((ctx->base.tb->flags & HW_FLAGS_EUEN_SXE) == 0)) {
+             map_path = g_strdup_printf(
-@@ -XXX,XX +XXX,XX @@ static bool check_vec(DisasContext *ctx, uint32_t oprsz)
+                 "/cpus/cpu-map/socket%d/core%d/thread%d",
-     return true;
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
                  num % ms->smp.cores);
          }
          qemu_fdt_add_path(ms->fdt, map_path);
 -        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
 +        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
          g_free(map_path);
 -        g_free(cpu_path);
 +        g_free(nodename);
      }
  }
--#else
--
--static bool check_vec(DisasContext *ctx, uint32_t oprsz)
--{
--    return true;
--}
--
--#endif
--
- static bool gen_vvvv_ptr_vl(DisasContext *ctx, arg_vvvv *a, uint32_t oprsz,
-                             gen_helper_gvec_4_ptr *fn)
- {
 --
-.25.1
+.43.5

-[PULL 02/10] target/loongarch: Allow user enable/disable LSX/LASX features
+[PULL v2 5/6] target/loongarch: Use auto method with LSX feature
-Some users may not need LSX/LASX, this patch allows the user
+Like LBT feature, add type OnOffAuto for LSX feature setting. Also
-enable/disable LSX/LASX features.
+add LSX feature detection with new VM ioctl command, fallback to old
 method if it is not supported.
- e.g
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
- '-cpu max,lsx=on,lasx=on'   (default);
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
  '-cpu max,lsx=on,lasx=off'  (enabled LSX);
  '-cpu max,lsx=off,lasx=on'  (enabled LASX, LSX);
  '-cpu max,lsx=off'          (disable LSX and LASX).
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Message-Id: <20231020084925.3457084-3-gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 67 ++++++++++++++++++++++++++++++++++++++++++
+ target/loongarch/cpu.c     | 38 +++++++++++++++------------
- target/loongarch/cpu.h |  2 ++
+ target/loongarch/cpu.h     |  2 ++
-files changed, 69 insertions(+)
+ target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 files changed, 77 insertions(+), 17 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
 @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
-     env->cpucfg[20] = data;
+ {
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-     env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
+     CPULoongArchState *env = &cpu->env;
-+    loongarch_cpu_post_init(obj);
++    uint32_t data = 0;
- }
+     int i;
- static void loongarch_la132_initfn(Object *obj)
+     for (i = 0; i < 21; i++) {
-@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_qemu_ops = {
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
- };
+     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
- #endif
+     env->cpucfg[0] = 0x14c010;  /* PRID */
-+static bool loongarch_get_lsx(Object *obj, Error **errp)
+-    uint32_t data = 0;
-+{
+     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
-+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
-+    bool ret;
+     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
-+
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
-+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
+ {
-+        ret = true;
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+    } else {
+     CPULoongArchState *env = &cpu->env;
-+        ret = false;
+-
 +    uint32_t data = 0;
      int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-1C103";
      env->cpucfg[0] = 0x148042;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
  static bool loongarch_get_lsx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LSX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
 +            error_setg(errp, "Failed to enable LSX in TCG mode");
 +            return;
 +        }
 +    }
-+    return ret;
++
-+}
++    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
-+
+ }
-+static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-+{
+ static bool loongarch_get_lasx(Object *obj, Error **errp)
-+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
-+
+ {
-+    if (value) {
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-+    } else {
++    cpu->lsx = ON_OFF_AUTO_AUTO;
-+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
+     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
-+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+                              loongarch_set_lsx);
-+    }
+     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
-+}
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
-+
-+static bool loongarch_get_lasx(Object *obj, Error **errp)
+     } else {
-+{
+         cpu->lbt = ON_OFF_AUTO_OFF;
-+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
++        cpu->pmu = ON_OFF_AUTO_OFF;
-+    bool ret;
+     }
-+
+ }
-+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
 +        ret = true;
 +    } else {
 +        ret = false;
 +    }
 +    return ret;
 +}
 +
 +static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 +{
 +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +
 +    if (value) {
 +    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 +            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
 +    } else {
 +        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    }
 +}
 +
 +void loongarch_cpu_post_init(Object *obj)
 +{
 +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +
 +    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 +        object_property_add_bool(obj, "lsx", loongarch_get_lsx,
 +                                 loongarch_set_lsx);
 +    }
 +    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
 +        object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 +                                 loongarch_set_lasx);
 +    }
 +}
 +
  static void loongarch_cpu_init(Object *obj)
  {
  #ifndef CONFIG_USER_ONLY
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
-@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_list(void);
+@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
- #define LOONGARCH_CPU_TYPE_NAME(model) model LOONGARCH_CPU_TYPE_SUFFIX
+ #endif
- #define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
+ enum loongarch_features {
-+void loongarch_cpu_post_init(Object *obj);
++    LOONGARCH_FEATURE_LSX,
-+
+     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
- #endif /* LOONGARCH_CPU_H */
+     LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      uint32_t  phy_id;
      OnOffAuto lbt;
      OnOffAuto pmu;
 +    OnOffAuto lsx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
  {
      int ret;
      struct kvm_device_attr attr;
 +    uint64_t val;
      switch (feature) {
 +    case LOONGARCH_FEATURE_LSX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
      return false;
  }
 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +        } else {
 +            error_setg(errp, "'lsx' feature not supported by KVM on this host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
      CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          brk_insn = val;
      }
 +    ret = kvm_cpu_check_lsx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.25.1
+.43.5

-[PULL 01/10] target/loongarch: Add cpu model 'max'
+[PULL v2 6/6] target/loongarch: Use auto method with LASX feature
-We use cpu la464 for the 'max' cpu.
+Like LSX feature, add type OnOffAuto for LASX feature setting.
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20231020084925.3457084-2-gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 7 +++++++
+ target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
-file changed, 7 insertions(+)
+ target/loongarch/cpu.h     |  2 ++
  target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 files changed, 89 insertions(+), 16 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-     env->cpucfg[1] = data;
+     uint32_t val;
      cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (cpu->lsx == ON_OFF_AUTO_OFF) {
 +        cpu->lasx = ON_OFF_AUTO_OFF;
 +        if (cpu->lasx == ON_OFF_AUTO_ON) {
 +            error_setg(errp, "Failed to disable LSX since LASX is enabled");
 +            return;
 +        }
 +    }
 +
      if (kvm_enabled()) {
          /* kvm feature detection in function kvm_arch_init_vcpu */
          return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
              error_setg(errp, "Failed to enable LSX in TCG mode");
              return;
          }
 +    } else {
 +        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
 +        val = cpu->env.cpucfg[2];
      }
      cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  static bool loongarch_get_lasx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
  }
-+static void loongarch_max_initfn(Object *obj)
+ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    }
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
 +        error_setg(errp, "Failed to enable LASX since lSX is disabled");
 +        return;
 +    }
 +
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LASX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
 +            error_setg(errp, "Failed to enable LASX in TCG mode");
 +            return;
 +        }
 +    }
 +
 +    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
  }
  static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      cpu->lsx = ON_OFF_AUTO_AUTO;
 +    cpu->lasx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  enum loongarch_features {
      LOONGARCH_FEATURE_LSX,
 +    LOONGARCH_FEATURE_LASX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
      LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      OnOffAuto lbt;
      OnOffAuto pmu;
      OnOffAuto lsx;
 +    OnOffAuto lasx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
          }
          return false;
 +    case LOONGARCH_FEATURE_LASX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
      return 0;
  }
 +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
 +{
-+    /* '-cpu max' for TCG: we use cpu la464. */
++    CPULoongArchState *env = cpu_env(cs);
-+    loongarch_la464_initfn(obj);
++    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        } else {
 +            error_setg(errp, "'lasx' feature not supported by KVM on host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +    }
 +
 +    return 0;
 +}
 +
- static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
+ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
-     const char *typename = object_class_get_name(OBJECT_CLASS(data));
+     CPULoongArchState *env = cpu_env(cs);
-@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_cpu_type_infos[] = {
+@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
-     },
+         error_report_err(local_err);
-     DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn),
+     }
-     DEFINE_LOONGARCH_CPU_TYPE(32, "la132", loongarch_la132_initfn),
-+    DEFINE_LOONGARCH_CPU_TYPE(64, "max", loongarch_max_initfn),
++    ret = kvm_cpu_check_lasx(cs, &local_err);
- };
++    if (ret < 0) {
++        error_report_err(local_err);
- DEFINE_TYPES(loongarch_cpu_type_infos)
++    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.25.1
+.43.5

-[PULL 03/10] target/loongarch: Implement query-cpu-model-expansion
+Deleted patch
-Add support for the query-cpu-model-expansion QMP command to LoongArch.
-We support query the cpu features.
-  e.g
-    la464 and max cpu support LSX/LASX, default enable,
-    la132 not support LSX/LASX.
-. start with '-cpu max,lasx=off'
-    (QEMU) query-cpu-model-expansion type=static  model={"name":"max"}
-    {"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}}
-. start with '-cpu la464,lasx=off'
-    (QEMU) query-cpu-model-expansion type=static  model={"name":"la464"}
-    {"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}
-. start with '-cpu la132,lasx=off'
-    qemu-system-loongarch64: can't apply global la132-loongarch-cpu.lasx=off: Property 'la132-loongarch-cpu.lasx' not found
-. start with '-cpu max,lasx=off' or start with '-cpu la464,lasx=off' query cpu model la132
-    (QEMU) query-cpu-model-expansion type=static  model={"name":"la132"}
-    {"return": {"model": {"name": "la132"}}}
-Acked-by: Markus Armbruster <armbru@redhat.com>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Message-Id: <20231020084925.3457084-4-gaosong@loongson.cn>
----
- qapi/machine-target.json              |  6 ++-
- target/loongarch/loongarch-qmp-cmds.c | 64 +++++++++++++++++++++++++++
-files changed, 68 insertions(+), 2 deletions(-)
-diff --git a/qapi/machine-target.json b/qapi/machine-target.json
-index XXXXXXX..XXXXXXX 100644
---- a/qapi/machine-target.json
-+++ b/qapi/machine-target.json
-@@ -XXX,XX +XXX,XX @@
-   'data': { 'model': 'CpuModelInfo' },
-   'if': { 'any': [ 'TARGET_S390X',
-                    'TARGET_I386',
--                   'TARGET_ARM' ] } }
-+                   'TARGET_ARM',
-+                   'TARGET_LOONGARCH64' ] } }
- ##
- # @query-cpu-model-expansion:
-@@ -XXX,XX +XXX,XX @@
-   'returns': 'CpuModelExpansionInfo',
-   'if': { 'any': [ 'TARGET_S390X',
-                    'TARGET_I386',
--                   'TARGET_ARM' ] } }
-+                   'TARGET_ARM',
-+                   'TARGET_LOONGARCH64' ] } }
- ##
- # @CpuDefinitionInfo:
-diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/loongarch-qmp-cmds.c
-+++ b/target/loongarch/loongarch-qmp-cmds.c
-@@ -XXX,XX +XXX,XX @@
-  */
- #include "qemu/osdep.h"
-+#include "qapi/error.h"
- #include "qapi/qapi-commands-machine-target.h"
- #include "cpu.h"
-+#include "qapi/qmp/qerror.h"
-+#include "qapi/qmp/qdict.h"
-+#include "qapi/qobject-input-visitor.h"
-+#include "qom/qom-qobject.h"
- static void loongarch_cpu_add_definition(gpointer data, gpointer user_data)
- {
-@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
-     return cpu_list;
- }
-+
-+static const char *cpu_model_advertised_features[] = {
-+    "lsx", "lasx", NULL
-+};
-+
-+CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
-+                                                     CpuModelInfo *model,
-+                                                     Error **errp)
-+{
-+    CpuModelExpansionInfo *expansion_info;
-+    QDict *qdict_out;
-+    ObjectClass *oc;
-+    Object *obj;
-+    const char *name;
-+    int i;
-+
-+    if (type != CPU_MODEL_EXPANSION_TYPE_STATIC) {
-+        error_setg(errp, "The requested expansion type is not supported");
-+        return NULL;
-+    }
-+
-+    oc = cpu_class_by_name(TYPE_LOONGARCH_CPU, model->name);
-+    if (!oc) {
-+        error_setg(errp, "The CPU type '%s' is not a recognized LoongArch CPU type",
-+                   model->name);
-+        return NULL;
-+    }
-+
-+    obj = object_new(object_class_get_name(oc));
-+
-+    expansion_info = g_new0(CpuModelExpansionInfo, 1);
-+    expansion_info->model = g_malloc0(sizeof(*expansion_info->model));
-+    expansion_info->model->name = g_strdup(model->name);
-+
-+    qdict_out = qdict_new();
-+
-+    i = 0;
-+    while ((name = cpu_model_advertised_features[i++]) != NULL) {
-+        ObjectProperty *prop = object_property_find(obj, name);
-+        if (prop) {
-+            QObject *value;
-+
-+            assert(prop->get);
-+            value = object_property_get_qobject(obj, name, &error_abort);
-+
-+            qdict_put_obj(qdict_out, name, value);
-+        }
-+    }
-+
-+    if (!qdict_size(qdict_out)) {
-+        qobject_unref(qdict_out);
-+    } else {
-+        expansion_info->model->props = QOBJECT(qdict_out);
-+    }
-+
-+    object_unref(obj);
-+
-+    return expansion_info;
-+}
---
-.25.1

-[PULL 04/10] target/loongarch: Support 4K page size
+Deleted patch
-The LoongArch kernel supports 4K page size.
-Change TARGET_PAGE_BITS to 12.
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20231023024059.3858349-1-gaosong@loongson.cn>
----
- target/loongarch/cpu-param.h  | 2 +-
- target/loongarch/tlb_helper.c | 9 ++++-----
-files changed, 5 insertions(+), 6 deletions(-)
-diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu-param.h
-+++ b/target/loongarch/cpu-param.h
-@@ -XXX,XX +XXX,XX @@
- #define TARGET_PHYS_ADDR_SPACE_BITS 48
- #define TARGET_VIRT_ADDR_SPACE_BITS 48
--#define TARGET_PAGE_BITS 14
-+#define TARGET_PAGE_BITS 12
- #endif
-diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/tlb_helper.c
-+++ b/target/loongarch/tlb_helper.c
-@@ -XXX,XX +XXX,XX @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
-         tlb_rplv = 0;
-     }
-+    /* Remove sw bit between bit12 -- bit PS*/
-+    tlb_ppn = tlb_ppn & ~(((0x1UL << (tlb_ps - 12)) -1));
-+
-     /* Check access rights */
-     if (!tlb_v) {
-         return TLBRET_INVALID;
-@@ -XXX,XX +XXX,XX @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
-         return TLBRET_DIRTY;
-     }
--    /*
--     * tlb_entry contains ppn[47:12] while 16KiB ppn is [47:15]
--     * need adjust.
--     */
-     *physical = (tlb_ppn << R_TLBENTRY_64_PPN_SHIFT) |
-                 (address & MAKE_64BIT_MASK(0, tlb_ps));
-     *prot = PAGE_READ;
-@@ -XXX,XX +XXX,XX @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
-         /* Move Global bit */
-         tmp0 = ((tmp0 & (1 << LOONGARCH_HGLOBAL_SHIFT))  >>
-                 LOONGARCH_HGLOBAL_SHIFT) << R_TLBENTRY_G_SHIFT |
--                (tmp0 & (~(1 << R_TLBENTRY_G_SHIFT)));
-+                (tmp0 & (~(1 << LOONGARCH_HGLOBAL_SHIFT)));
-         ps = ptbase + ptwidth - 1;
-         if (odd) {
-             tmp0 += MAKE_64BIT_MASK(ps, 1);
---
-.25.1

-[PULL 06/10] linux-user/loongarch64: Fix setup_extcontext alloc wrong fpu_context size
+Deleted patch
-See:
- https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/signal.c
-The alloc size is sizeof(struct target_fpu_context).
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Message-Id: <20231101030816.2353416-3-gaosong@loongson.cn>
----
- linux-user/loongarch64/signal.c | 2 +-
-file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
-index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/signal.c
-+++ b/linux-user/loongarch64/signal.c
-@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
-     /* For qemu, there is no lazy fp context switch, so fp always present. */
-     extctx->flags = SC_USED_FP;
-     sp = extframe_alloc(extctx, &extctx->fpu,
--                        sizeof(struct target_rt_sigframe), FPU_CTX_ALIGN, sp);
-+                        sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
-     return sp;
- }
---
-.25.1

-[PULL 08/10] linux-user/loongarch64: Use abi_{ulong,uint} types
+Deleted patch
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Message-Id: <20231101030816.2353416-5-gaosong@loongson.cn>
----
- linux-user/loongarch64/signal.c | 24 ++++++++++++------------
-file changed, 12 insertions(+), 12 deletions(-)
-diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
-index XXXXXXX..XXXXXXX 100644
---- a/linux-user/loongarch64/signal.c
-+++ b/linux-user/loongarch64/signal.c
-@@ -XXX,XX +XXX,XX @@
- #define SC_USED_FP              (1 << 0)
- struct target_sigcontext {
--    uint64_t sc_pc;
--    uint64_t sc_regs[32];
--    uint32_t sc_flags;
--    uint64_t sc_extcontext[0]   QEMU_ALIGNED(16);
-+    abi_ulong sc_pc;
-+    abi_ulong sc_regs[32];
-+    abi_uint  sc_flags;
-+    abi_ulong sc_extcontext[0]   QEMU_ALIGNED(16);
- };
- QEMU_BUILD_BUG_ON(sizeof(struct target_sigcontext) != sizeof_sigcontext);
-@@ -XXX,XX +XXX,XX @@ QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, sc_regs)
- #define FPU_CTX_MAGIC           0x46505501
- #define FPU_CTX_ALIGN           8
- struct target_fpu_context {
--    uint64_t regs[32];
--    uint64_t fcc;
--    uint32_t fcsr;
-+    abi_ulong regs[32];
-+    abi_ulong fcc;
-+    abi_uint  fcsr;
- } QEMU_ALIGNED(FPU_CTX_ALIGN);
- QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
-@@ -XXX,XX +XXX,XX @@ QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
- #define CONTEXT_INFO_ALIGN      16
- struct target_sctx_info {
--    uint32_t magic;
--    uint32_t size;
--    uint64_t padding;
-+    abi_uint  magic;
-+    abi_uint  size;
-+    abi_ulong padding;
- } QEMU_ALIGNED(CONTEXT_INFO_ALIGN);
- QEMU_BUILD_BUG_ON(sizeof(struct target_sctx_info) != sizeof_sctx_info);
-@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
-     memset(extctx, 0, sizeof(*extctx));
-     while (1) {
--        uint32_t magic, size;
-+        abi_uint magic, size;
-         if (get_user_u32(magic, frame) || get_user_u32(size, frame + 4)) {
-             return false;
-@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
-     if (extctx->fpu.haddr) {
-         struct target_fpu_context *fpu_ctx =
-             extctx->fpu.haddr + sizeof(struct target_sctx_info);
--        uint64_t fcc;
-+        abi_ulong fcc;
-         for (i = 0; i < 32; ++i) {
-             __get_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
---
-.25.1

The following changes since commit d762bf97931b58839316b68a570eecc6143c9e3e:

Merge tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-11-03 10:04:12 +0800)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231103

for you to fetch changes up to f7077737531b40aa879d4644837aeda0f7fc6aa8:

linux-user/loongarch64: Add LASX sigcontext save/restore (2023-11-03 14:13:46 +0800)

----------------------------------------------------------------
pull-loongarch-20231103

----------------------------------------------------------------
Richard Henderson (1):
      linux-user/loongarch64: Use traps to track LSX/LASX usage

Song Gao (9):
      target/loongarch: Add cpu model 'max'
      target/loongarch: Allow user enable/disable LSX/LASX features
      target/loongarch: Implement query-cpu-model-expansion
      target/loongarch: Support 4K page size
      linux-user/loongarch64: Fix setup_extcontext alloc wrong fpu_context size
      linux-user/loongarch64: setup_sigframe() set 'end' context size 0
      linux-user/loongarch64: Use abi_{ulong,uint} types
      linux-user/loongarch64: Add LSX sigcontext save/restore
      linux-user/loongarch64: Add LASX sigcontext save/restore

linux-user/loongarch64/cpu_loop.c           |  13 ++
 linux-user/loongarch64/signal.c             | 189 +++++++++++++++++++++++-----
 qapi/machine-target.json                    |   6 +-
 target/loongarch/cpu-param.h                |   2 +-
 target/loongarch/cpu.c                      |  74 +++++++++++
 target/loongarch/cpu.h                      |   2 +
 target/loongarch/insn_trans/trans_vec.c.inc |  11 --
 target/loongarch/loongarch-qmp-cmds.c       |  64 ++++++++++
 target/loongarch/tlb_helper.c               |   9 +-
 9 files changed, 318 insertions(+), 52 deletions(-)

We use cpu la464 for the 'max' cpu.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231020084925.3457084-2-gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     env->cpucfg[1] = data;
 }
 
+static void loongarch_max_initfn(Object *obj)
+{
+    /* '-cpu max' for TCG: we use cpu la464. */
+    loongarch_la464_initfn(obj);
+}
+
 static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
 {
     const char *typename = object_class_get_name(OBJECT_CLASS(data));
@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_cpu_type_infos[] = {
     },
     DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn),
     DEFINE_LOONGARCH_CPU_TYPE(32, "la132", loongarch_la132_initfn),
+    DEFINE_LOONGARCH_CPU_TYPE(64, "max", loongarch_max_initfn),
 };
 
 DEFINE_TYPES(loongarch_cpu_type_infos)
-- 
2.25.1

Some users may not need LSX/LASX, this patch allows the user
enable/disable LSX/LASX features.

e.g
 '-cpu max,lsx=on,lasx=on'   (default);
 '-cpu max,lsx=on,lasx=off'  (enabled LSX);
 '-cpu max,lsx=off,lasx=on'  (enabled LASX, LSX);
 '-cpu max,lsx=off'          (disable LSX and LASX).

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231020084925.3457084-3-gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 67 ++++++++++++++++++++++++++++++++++++++++++
 target/loongarch/cpu.h |  2 ++
 2 files changed, 69 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     env->cpucfg[20] = data;
 
     env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
+    loongarch_cpu_post_init(obj);
 }
 
 static void loongarch_la132_initfn(Object *obj)
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_qemu_ops = {
 };
 #endif
 
+static bool loongarch_get_lsx(Object *obj, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    bool ret;
+
+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
+        ret = true;
+    } else {
+        ret = false;
+    }
+    return ret;
+}
+
+static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
+    if (value) {
+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    }
+}
+
+static bool loongarch_get_lasx(Object *obj, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    bool ret;
+
+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
+        ret = true;
+    } else {
+        ret = false;
+    }
+    return ret;
+}
+
+static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
+    if (value) {
+	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
+            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
+	}
+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    }
+}
+
+void loongarch_cpu_post_init(Object *obj)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
+        object_property_add_bool(obj, "lsx", loongarch_get_lsx,
+                                 loongarch_set_lsx);
+    }
+    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
+        object_property_add_bool(obj, "lasx", loongarch_get_lasx,
+                                 loongarch_set_lasx);
+    }
+}
+
 static void loongarch_cpu_init(Object *obj)
 {
 #ifndef CONFIG_USER_ONLY
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_list(void);
 #define LOONGARCH_CPU_TYPE_NAME(model) model LOONGARCH_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
 
+void loongarch_cpu_post_init(Object *obj);
+
 #endif /* LOONGARCH_CPU_H */
-- 
2.25.1

Add support for the query-cpu-model-expansion QMP command to LoongArch.
We support query the cpu features.

e.g
    la464 and max cpu support LSX/LASX, default enable,
    la132 not support LSX/LASX.

1. start with '-cpu max,lasx=off'

(QEMU) query-cpu-model-expansion type=static  model={"name":"max"}
    {"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}}

2. start with '-cpu la464,lasx=off'
    (QEMU) query-cpu-model-expansion type=static  model={"name":"la464"}
    {"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}

3. start with '-cpu la132,lasx=off'
    qemu-system-loongarch64: can't apply global la132-loongarch-cpu.lasx=off: Property 'la132-loongarch-cpu.lasx' not found

4. start with '-cpu max,lasx=off' or start with '-cpu la464,lasx=off' query cpu model la132
    (QEMU) query-cpu-model-expansion type=static  model={"name":"la132"}
    {"return": {"model": {"name": "la132"}}}

Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231020084925.3457084-4-gaosong@loongson.cn>
---
 qapi/machine-target.json              |  6 ++-
 target/loongarch/loongarch-qmp-cmds.c | 64 +++++++++++++++++++++++++++
 2 files changed, 68 insertions(+), 2 deletions(-)

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index XXXXXXX..XXXXXXX 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -XXX,XX +XXX,XX @@
   'data': { 'model': 'CpuModelInfo' },
   'if': { 'any': [ 'TARGET_S390X',
                    'TARGET_I386',
-                   'TARGET_ARM' ] } }
+                   'TARGET_ARM',
+                   'TARGET_LOONGARCH64' ] } }
 
 ##
 # @query-cpu-model-expansion:
@@ -XXX,XX +XXX,XX @@
   'returns': 'CpuModelExpansionInfo',
   'if': { 'any': [ 'TARGET_S390X',
                    'TARGET_I386',
-                   'TARGET_ARM' ] } }
+                   'TARGET_ARM',
+                   'TARGET_LOONGARCH64' ] } }
 
 ##
 # @CpuDefinitionInfo:
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/loongarch-qmp-cmds.c
+++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -XXX,XX +XXX,XX @@
  */
 
 #include "qemu/osdep.h"
+#include "qapi/error.h"
 #include "qapi/qapi-commands-machine-target.h"
 #include "cpu.h"
+#include "qapi/qmp/qerror.h"
+#include "qapi/qmp/qdict.h"
+#include "qapi/qobject-input-visitor.h"
+#include "qom/qom-qobject.h"
 
 static void loongarch_cpu_add_definition(gpointer data, gpointer user_data)
 {
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
 
     return cpu_list;
 }
+
+static const char *cpu_model_advertised_features[] = {
+    "lsx", "lasx", NULL
+};
+
+CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
+                                                     CpuModelInfo *model,
+                                                     Error **errp)
+{
+    CpuModelExpansionInfo *expansion_info;
+    QDict *qdict_out;
+    ObjectClass *oc;
+    Object *obj;
+    const char *name;
+    int i;
+
+    if (type != CPU_MODEL_EXPANSION_TYPE_STATIC) {
+        error_setg(errp, "The requested expansion type is not supported");
+        return NULL;
+    }
+
+    oc = cpu_class_by_name(TYPE_LOONGARCH_CPU, model->name);
+    if (!oc) {
+        error_setg(errp, "The CPU type '%s' is not a recognized LoongArch CPU type",
+                   model->name);
+        return NULL;
+    }
+
+    obj = object_new(object_class_get_name(oc));
+
+    expansion_info = g_new0(CpuModelExpansionInfo, 1);
+    expansion_info->model = g_malloc0(sizeof(*expansion_info->model));
+    expansion_info->model->name = g_strdup(model->name);
+
+    qdict_out = qdict_new();
+
+    i = 0;
+    while ((name = cpu_model_advertised_features[i++]) != NULL) {
+        ObjectProperty *prop = object_property_find(obj, name);
+        if (prop) {
+            QObject *value;
+
+            assert(prop->get);
+            value = object_property_get_qobject(obj, name, &error_abort);
+
+            qdict_put_obj(qdict_out, name, value);
+        }
+    }
+
+    if (!qdict_size(qdict_out)) {
+        qobject_unref(qdict_out);
+    } else {
+        expansion_info->model->props = QOBJECT(qdict_out);
+    }
+
+    object_unref(obj);
+
+    return expansion_info;
+}
-- 
2.25.1

The LoongArch kernel supports 4K page size.
Change TARGET_PAGE_BITS to 12.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20231023024059.3858349-1-gaosong@loongson.cn>
---
 target/loongarch/cpu-param.h  | 2 +-
 target/loongarch/tlb_helper.c | 9 ++++-----
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu-param.h
+++ b/target/loongarch/cpu-param.h
@@ -XXX,XX +XXX,XX @@
 #define TARGET_PHYS_ADDR_SPACE_BITS 48
 #define TARGET_VIRT_ADDR_SPACE_BITS 48
 
-#define TARGET_PAGE_BITS 14
+#define TARGET_PAGE_BITS 12
 
 #endif
diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tlb_helper.c
+++ b/target/loongarch/tlb_helper.c
@@ -XXX,XX +XXX,XX @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
         tlb_rplv = 0;
     }
 
+    /* Remove sw bit between bit12 -- bit PS*/
+    tlb_ppn = tlb_ppn & ~(((0x1UL << (tlb_ps - 12)) -1));
+
     /* Check access rights */
     if (!tlb_v) {
         return TLBRET_INVALID;
@@ -XXX,XX +XXX,XX @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
         return TLBRET_DIRTY;
     }
 
-    /*
-     * tlb_entry contains ppn[47:12] while 16KiB ppn is [47:15]
-     * need adjust.
-     */
     *physical = (tlb_ppn << R_TLBENTRY_64_PPN_SHIFT) |
                 (address & MAKE_64BIT_MASK(0, tlb_ps));
     *prot = PAGE_READ;
@@ -XXX,XX +XXX,XX @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
         /* Move Global bit */
         tmp0 = ((tmp0 & (1 << LOONGARCH_HGLOBAL_SHIFT))  >>
                 LOONGARCH_HGLOBAL_SHIFT) << R_TLBENTRY_G_SHIFT |
-                (tmp0 & (~(1 << R_TLBENTRY_G_SHIFT)));
+                (tmp0 & (~(1 << LOONGARCH_HGLOBAL_SHIFT)));
         ps = ptbase + ptwidth - 1;
         if (odd) {
             tmp0 += MAKE_64BIT_MASK(ps, 1);
-- 
2.25.1

From: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231101030816.2353416-2-gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 linux-user/loongarch64/cpu_loop.c           | 13 +++++++++++++
 target/loongarch/insn_trans/trans_vec.c.inc | 11 -----------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu_loop.c
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/loongarch64/cpu_loop.c
+++ b/linux-user/loongarch64/cpu_loop.c
@@ -XXX,XX +XXX,XX @@ void cpu_loop(CPULoongArchState *env)
         case EXCCODE_BCE:
             force_sig_fault(TARGET_SIGSYS, TARGET_SI_KERNEL, env->pc);
             break;
+
+        /*
+         * Begin with LSX and LASX disabled, then enable on the first trap.
+         * In this way we can tell if the unit is in use.  This is used to
+         * choose the layout of any signal frame.
+         */
+        case EXCCODE_SXD:
+            env->CSR_EUEN |= R_CSR_EUEN_SXE_MASK;
+            break;
+        case EXCCODE_ASXD:
+            env->CSR_EUEN |= R_CSR_EUEN_ASXE_MASK;
+            break;
+
         case EXCP_ATOMIC:
             cpu_exec_step_atomic(cs);
             break;
diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@
  * Copyright (c) 2022-2023 Loongson Technology Corporation Limited
  */
 
-#ifndef CONFIG_USER_ONLY
-
 static bool check_vec(DisasContext *ctx, uint32_t oprsz)
 {
     if ((oprsz == 16) && ((ctx->base.tb->flags & HW_FLAGS_EUEN_SXE) == 0)) {
@@ -XXX,XX +XXX,XX @@ static bool check_vec(DisasContext *ctx, uint32_t oprsz)
     return true;
 }
 
-#else
-
-static bool check_vec(DisasContext *ctx, uint32_t oprsz)
-{
-    return true;
-}
-
-#endif
-
 static bool gen_vvvv_ptr_vl(DisasContext *ctx, arg_vvvv *a, uint32_t oprsz,
                             gen_helper_gvec_4_ptr *fn)
 {
-- 
2.25.1

See:
 https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/signal.c

The alloc size is sizeof(struct target_fpu_context).

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231101030816.2353416-3-gaosong@loongson.cn>
---
 linux-user/loongarch64/signal.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/loongarch64/signal.c
+++ b/linux-user/loongarch64/signal.c
@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
     /* For qemu, there is no lazy fp context switch, so fp always present. */
     extctx->flags = SC_USED_FP;
     sp = extframe_alloc(extctx, &extctx->fpu,
-                        sizeof(struct target_rt_sigframe), FPU_CTX_ALIGN, sp);
+                        sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
 
     return sp;
 }
-- 
2.25.1

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231101030816.2353416-5-gaosong@loongson.cn>
---
 linux-user/loongarch64/signal.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/loongarch64/signal.c
+++ b/linux-user/loongarch64/signal.c
@@ -XXX,XX +XXX,XX @@
 #define SC_USED_FP              (1 << 0)
 
 struct target_sigcontext {
-    uint64_t sc_pc;
-    uint64_t sc_regs[32];
-    uint32_t sc_flags;
-    uint64_t sc_extcontext[0]   QEMU_ALIGNED(16);
+    abi_ulong sc_pc;
+    abi_ulong sc_regs[32];
+    abi_uint  sc_flags;
+    abi_ulong sc_extcontext[0]   QEMU_ALIGNED(16);
 };
 
 QEMU_BUILD_BUG_ON(sizeof(struct target_sigcontext) != sizeof_sigcontext);
@@ -XXX,XX +XXX,XX @@ QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, sc_regs)
 #define FPU_CTX_MAGIC           0x46505501
 #define FPU_CTX_ALIGN           8
 struct target_fpu_context {
-    uint64_t regs[32];
-    uint64_t fcc;
-    uint32_t fcsr;
+    abi_ulong regs[32];
+    abi_ulong fcc;
+    abi_uint  fcsr;
 } QEMU_ALIGNED(FPU_CTX_ALIGN);
 
 QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
@@ -XXX,XX +XXX,XX @@ QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
 
 #define CONTEXT_INFO_ALIGN      16
 struct target_sctx_info {
-    uint32_t magic;
-    uint32_t size;
-    uint64_t padding;
+    abi_uint  magic;
+    abi_uint  size;
+    abi_ulong padding;
 } QEMU_ALIGNED(CONTEXT_INFO_ALIGN);
 
 QEMU_BUILD_BUG_ON(sizeof(struct target_sctx_info) != sizeof_sctx_info);
@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
     memset(extctx, 0, sizeof(*extctx));
 
     while (1) {
-        uint32_t magic, size;
+        abi_uint magic, size;
 
         if (get_user_u32(magic, frame) || get_user_u32(size, frame + 4)) {
             return false;
@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
     if (extctx->fpu.haddr) {
         struct target_fpu_context *fpu_ctx =
             extctx->fpu.haddr + sizeof(struct target_sctx_info);
-        uint64_t fcc;
+        abi_ulong fcc;
 
         for (i = 0; i < 32; ++i) {
             __get_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
-- 
2.25.1

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231101030816.2353416-6-gaosong@loongson.cn>
---
 linux-user/loongarch64/signal.c | 107 ++++++++++++++++++++++++++------
 1 file changed, 87 insertions(+), 20 deletions(-)

diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/loongarch64/signal.c
+++ b/linux-user/loongarch64/signal.c
@@ -XXX,XX +XXX,XX @@ struct target_fpu_context {
 QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs)
                   != offsetof_fpucontext_fr);
 
+#define LSX_CTX_MAGIC           0x53580001
+#define LSX_CTX_ALIGN           16
+struct target_lsx_context {
+    abi_ulong regs[2 * 32];
+    abi_ulong fcc;
+    abi_uint  fcsr;
+} QEMU_ALIGNED(LSX_CTX_ALIGN);
+
 #define CONTEXT_INFO_ALIGN      16
 struct target_sctx_info {
     abi_uint  magic;
@@ -XXX,XX +XXX,XX @@ struct ctx_layout {
 };
 
 struct extctx_layout {
-    unsigned int size;
+    unsigned long size;
     unsigned int flags;
     struct ctx_layout fpu;
+    struct ctx_layout lsx;
     struct ctx_layout end;
 };
 
@@ -XXX,XX +XXX,XX @@ static abi_ptr extframe_alloc(struct extctx_layout *extctx,
     return sp;
 }
 
-static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
+static abi_ptr setup_extcontext(CPULoongArchState *env,
+                                struct extctx_layout *extctx, abi_ptr sp)
 {
     memset(extctx, 0, sizeof(struct extctx_layout));
 
@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(struct extctx_layout *extctx, abi_ptr sp)
 
     /* For qemu, there is no lazy fp context switch, so fp always present. */
     extctx->flags = SC_USED_FP;
-    sp = extframe_alloc(extctx, &extctx->fpu,
+
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+        sp = extframe_alloc(extctx, &extctx->lsx,
+                        sizeof(struct target_lsx_context), LSX_CTX_ALIGN, sp);
+
+    } else {
+        sp = extframe_alloc(extctx, &extctx->fpu,
                         sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
+    }
 
     return sp;
 }
@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
                            struct extctx_layout *extctx)
 {
     struct target_sctx_info *info;
-    struct target_fpu_context *fpu_ctx;
     int i;
 
     __put_user(extctx->flags, &sc->sc_flags);
@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
     }
 
     /*
-     * Set fpu context
+     * Set extension context
      */
-    info = extctx->fpu.haddr;
-    __put_user(FPU_CTX_MAGIC, &info->magic);
-    __put_user(extctx->fpu.size, &info->size);
 
-    fpu_ctx = (struct target_fpu_context *)(info + 1);
-    for (i = 0; i < 32; ++i) {
-        __put_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+        struct target_lsx_context *lsx_ctx;
+        info = extctx->lsx.haddr;
+
+        __put_user(LSX_CTX_MAGIC, &info->magic);
+        __put_user(extctx->lsx.size, &info->size);
+
+        lsx_ctx = (struct target_lsx_context *)(info + 1);
+
+        for (i = 0; i < 32; ++i) {
+            __put_user(env->fpr[i].vreg.UD(0), &lsx_ctx->regs[2 * i]);
+            __put_user(env->fpr[i].vreg.UD(1), &lsx_ctx->regs[2 * i + 1]);
+        }
+        __put_user(read_fcc(env), &lsx_ctx->fcc);
+        __put_user(env->fcsr0, &lsx_ctx->fcsr);
+    } else {
+        struct target_fpu_context *fpu_ctx;
+        info = extctx->fpu.haddr;
+
+        __put_user(FPU_CTX_MAGIC, &info->magic);
+        __put_user(extctx->fpu.size, &info->size);
+
+        fpu_ctx = (struct target_fpu_context *)(info + 1);
+
+        for (i = 0; i < 32; ++i) {
+            __put_user(env->fpr[i].vreg.UD(0), &fpu_ctx->regs[i]);
+        }
+        __put_user(read_fcc(env), &fpu_ctx->fcc);
+        __put_user(env->fcsr0, &fpu_ctx->fcsr);
     }
-    __put_user(read_fcc(env), &fpu_ctx->fcc);
-    __put_user(env->fcsr0, &fpu_ctx->fcsr);
 
     /*
      * Set end context
@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
             extctx->fpu.size = size;
             extctx->size += size;
             break;
+        case LSX_CTX_MAGIC:
+            if (size < (sizeof(struct target_sctx_info) +
+                        sizeof(struct target_lsx_context))) {
+                return false;
+            }
+            extctx->lsx.gaddr = frame;
+            extctx->lsx.size = size;
+            extctx->size += size;
+            break;
         default:
             return false;
         }
@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
                              struct extctx_layout *extctx)
 {
     int i;
+    abi_ulong fcc;
 
     __get_user(env->pc, &sc->sc_pc);
     for (i = 1; i < 32; ++i) {
         __get_user(env->gpr[i], &sc->sc_regs[i]);
     }
 
-    if (extctx->fpu.haddr) {
+    if (extctx->lsx.haddr) {
+        struct target_lsx_context *lsx_ctx =
+            extctx->lsx.haddr + sizeof(struct target_sctx_info);
+
+        for (i = 0; i < 32; ++i) {
+            __get_user(env->fpr[i].vreg.UD(0), &lsx_ctx->regs[2 * i]);
+            __get_user(env->fpr[i].vreg.UD(1), &lsx_ctx->regs[2 * i + 1]);
+        }
+        __get_user(fcc, &lsx_ctx->fcc);
+        write_fcc(env, fcc);
+        __get_user(env->fcsr0, &lsx_ctx->fcsr);
+        restore_fp_status(env);
+    } else if (extctx->fpu.haddr) {
         struct target_fpu_context *fpu_ctx =
             extctx->fpu.haddr + sizeof(struct target_sctx_info);
-        abi_ulong fcc;
 
         for (i = 0; i < 32; ++i) {
-            __get_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]);
+            __get_user(env->fpr[i].vreg.UD(0), &fpu_ctx->regs[i]);
         }
         __get_user(fcc, &fpu_ctx->fcc);
         write_fcc(env, fcc);
@@ -XXX,XX +XXX,XX @@ static abi_ptr get_sigframe(struct target_sigaction *ka,
 
     sp = target_sigsp(get_sp_from_cpustate(env), ka);
     sp = ROUND_DOWN(sp, 16);
-    sp = setup_extcontext(extctx, sp);
+    sp = setup_extcontext(env, extctx, sp);
     sp -= sizeof(struct target_rt_sigframe);
 
     assert(QEMU_IS_ALIGNED(sp, 16));
@@ -XXX,XX +XXX,XX @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
         force_sigsegv(sig);
         return;
     }
-    extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
-    extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+        extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+    } else {
+        extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+    }
 
     tswap_siginfo(&frame->rs_info, info);
 
@@ -XXX,XX +XXX,XX @@ long do_rt_sigreturn(CPULoongArchState *env)
     if (!frame) {
         goto badframe;
     }
-    if (extctx.fpu.gaddr) {
+
+    if (extctx.lsx.gaddr) {
+        extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
+    } else if (extctx.fpu.gaddr) {
         extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
     }
 
-- 
2.25.1

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231101030816.2353416-7-gaosong@loongson.cn>
---
 linux-user/loongarch64/signal.c | 68 ++++++++++++++++++++++++++++++---
 1 file changed, 62 insertions(+), 6 deletions(-)

diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signal.c
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/loongarch64/signal.c
+++ b/linux-user/loongarch64/signal.c
@@ -XXX,XX +XXX,XX @@ struct target_lsx_context {
     abi_uint  fcsr;
 } QEMU_ALIGNED(LSX_CTX_ALIGN);
 
+#define LASX_CTX_MAGIC          0x41535801
+#define LASX_CTX_ALIGN          32
+struct target_lasx_context {
+    abi_ulong regs[4 * 32];
+    abi_ulong fcc;
+    abi_uint  fcsr;
+} QEMU_ALIGNED(LASX_CTX_ALIGN);
+
 #define CONTEXT_INFO_ALIGN      16
 struct target_sctx_info {
     abi_uint  magic;
@@ -XXX,XX +XXX,XX @@ struct extctx_layout {
     unsigned int flags;
     struct ctx_layout fpu;
     struct ctx_layout lsx;
+    struct ctx_layout lasx;
     struct ctx_layout end;
 };
 
@@ -XXX,XX +XXX,XX @@ static abi_ptr setup_extcontext(CPULoongArchState *env,
     /* For qemu, there is no lazy fp context switch, so fp always present. */
     extctx->flags = SC_USED_FP;
 
-    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
+        sp = extframe_alloc(extctx, &extctx->lasx,
+                        sizeof(struct target_lasx_context), LASX_CTX_ALIGN, sp);
+    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
         sp = extframe_alloc(extctx, &extctx->lsx,
                         sizeof(struct target_lsx_context), LSX_CTX_ALIGN, sp);
-
     } else {
         sp = extframe_alloc(extctx, &extctx->fpu,
                         sizeof(struct target_fpu_context), FPU_CTX_ALIGN, sp);
@@ -XXX,XX +XXX,XX @@ static void setup_sigframe(CPULoongArchState *env,
      * Set extension context
      */
 
-    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
+        struct target_lasx_context *lasx_ctx;
+        info = extctx->lasx.haddr;
+
+        __put_user(LASX_CTX_MAGIC, &info->magic);
+        __put_user(extctx->lasx.size, &info->size);
+
+        lasx_ctx = (struct target_lasx_context *)(info + 1);
+
+        for (i = 0; i < 32; ++i) {
+            __put_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]);
+            __put_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]);
+            __put_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]);
+            __put_user(env->fpr[i].vreg.UD(3), &lasx_ctx->regs[4 * i + 3]);
+        }
+        __put_user(read_fcc(env), &lasx_ctx->fcc);
+        __put_user(env->fcsr0, &lasx_ctx->fcsr);
+    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
         struct target_lsx_context *lsx_ctx;
         info = extctx->lsx.haddr;
 
@@ -XXX,XX +XXX,XX @@ static bool parse_extcontext(struct extctx_layout *extctx, abi_ptr frame)
             extctx->lsx.size = size;
             extctx->size += size;
             break;
+        case LASX_CTX_MAGIC:
+            if (size < (sizeof(struct target_sctx_info) +
+                        sizeof(struct target_lasx_context))) {
+                return false;
+            }
+            extctx->lasx.gaddr = frame;
+            extctx->lasx.size = size;
+            extctx->size += size;
+            break;
         default:
             return false;
         }
@@ -XXX,XX +XXX,XX @@ static void restore_sigframe(CPULoongArchState *env,
         __get_user(env->gpr[i], &sc->sc_regs[i]);
     }
 
-    if (extctx->lsx.haddr) {
+    if (extctx->lasx.haddr) {
+        struct target_lasx_context *lasx_ctx =
+            extctx->lasx.haddr + sizeof(struct target_sctx_info);
+
+        for (i = 0; i < 32; ++i) {
+            __get_user(env->fpr[i].vreg.UD(0), &lasx_ctx->regs[4 * i]);
+            __get_user(env->fpr[i].vreg.UD(1), &lasx_ctx->regs[4 * i + 1]);
+            __get_user(env->fpr[i].vreg.UD(2), &lasx_ctx->regs[4 * i + 2]);
+            __get_user(env->fpr[i].vreg.UD(3), &lasx_ctx->regs[4 * i + 3]);
+        }
+        __get_user(fcc, &lasx_ctx->fcc);
+        write_fcc(env, fcc);
+        __get_user(env->fcsr0, &lasx_ctx->fcsr);
+        restore_fp_status(env);
+    } else if (extctx->lsx.haddr) {
         struct target_lsx_context *lsx_ctx =
             extctx->lsx.haddr + sizeof(struct target_sctx_info);
 
@@ -XXX,XX +XXX,XX @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
         return;
     }
 
-    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
+    if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE)) {
+        extctx.lasx.haddr = (void *)frame + (extctx.lasx.gaddr - frame_addr);
+        extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
+    } else if (FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE)) {
         extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
         extctx.end.haddr = (void *)frame + (extctx.end.gaddr - frame_addr);
     } else {
@@ -XXX,XX +XXX,XX @@ long do_rt_sigreturn(CPULoongArchState *env)
         goto badframe;
     }
 
-    if (extctx.lsx.gaddr) {
+    if (extctx.lasx.gaddr) {
+        extctx.lasx.haddr = (void *)frame + (extctx.lasx.gaddr - frame_addr);
+    } else if (extctx.lsx.gaddr) {
         extctx.lsx.haddr = (void *)frame + (extctx.lsx.gaddr - frame_addr);
     } else if (extctx.fpu.gaddr) {
         extctx.fpu.haddr = (void *)frame + (extctx.fpu.gaddr - frame_addr);
-- 
2.25.1

The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:

Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227

for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:

target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)

----------------------------------------------------------------
pull-loongarch-20241227
v1 ... v2
  1. Modify patch auther inconsistent with SOB

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

Guo Hongyu (1):
      target/loongarch: Fix vldi inst

hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>

Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in vldi instruction implementation.

Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
Tested-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
         break;
     case 1:
         /* data: {2{16'0, imm[7:0], 8'0}} */
-        data = (t << 24) | (t << 8);
+        data = (t << 40) | (t << 8);
         break;
     case 2:
         /* data: {2{8'0, imm[7:0], 16'0}} */
-- 
2.43.5

Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.

Here actual operand size is used.

Cc: qemu-stable@nongnu.org
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
 {
     int i, ofs;
 
-    if (!check_vec(ctx, 32)) {
+    if (!check_vec(ctx, oprsz)) {
         return true;
     }
 
-- 
2.43.5

The same with ACPI table, fdt table is created on machine done
notification. Some objects like CPU objects can be created with cold-plug
method with command such as -smp x, -device la464-loongarch-cpu, so all
objects finish to create when machine is done.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 46 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
     }
 }
 
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
+{
+    MachineState *machine = MACHINE(lvms);
+    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+    int i;
+
+    create_fdt(lvms);
+    fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
+    fdt_add_fw_cfg_node(lvms);
+    fdt_add_flash_node(lvms);
+
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+    /* Add PCH PIC node */
+    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+    /* Add PCH MSI node */
+    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+    /* Add pcie node */
+    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
+
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i-- > 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
+    }
+
+    fdt_add_rtc_node(lvms, &pch_pic_phandle);
+    fdt_add_ged_reset(lvms);
+    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+                                   VIRT_PLATFORM_BUS_BASEADDRESS,
+                                   VIRT_PLATFORM_BUS_SIZE,
+                                   VIRT_PLATFORM_BUS_IRQ);
+
+    /*
+     * Since lowmem region starts from 0 and Linux kernel legacy start address
+     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+     * access. FDT size limit with 1 MiB.
+     * Put the FDT into the memory map as a ROM image: this will ensure
+     * the FDT is copied again upon reset, even if addr points into RAM.
+     */
+    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
+}
+
 static void virt_done(Notifier *notifier, void *data)
 {
     LoongArchVirtMachineState *lvms = container_of(notifier,
                                       LoongArchVirtMachineState, machine_done);
     virt_build_smbios(lvms);
     loongarch_acpi_setup(lvms);
+    virt_fdt_setup(lvms);
 }
 
 static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 }
 
 static void virt_devices_init(DeviceState *pch_pic,
-                                   LoongArchVirtMachineState *lvms,
-                                   uint32_t *pch_pic_phandle,
-                                   uint32_t *pch_msi_phandle)
+                                   LoongArchVirtMachineState *lvms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
-    /* Add pcie node */
-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-
     /*
      * Create uart fdt node in reverse order so that they appear
      * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         serial_mm_init(get_system_memory(), base, 0,
                        qdev_get_gpio_in(pch_pic, irq),
                        115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
     }
 
     /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-    fdt_add_ged_reset(lvms);
 
     /* acpi ged */
     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 
     /*
      * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
-    /* Add cpu interrupt-controller */
-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         }
     }
 
-    /* Add Extend I/O Interrupt Controller node */
-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-
     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
     }
 
-    /* Add PCH PIC node */
-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-
     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
     start   =  num;
     num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                               qdev_get_gpio_in(extioi, i + start));
     }
 
-    /* Add PCH MSI node */
-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-
-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
+    virt_devices_init(pch_pic, lvms);
 }
 
 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    create_fdt(lvms);
-
     /* Create IOCSR space */
     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                           machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu = LOONGARCH_CPU(cpu);
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
-    fdt_add_cpu_nodes(lvms);
-    fdt_add_memory_nodes(machine);
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                         memmap_table,
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
-    fdt_add_fw_cfg_node(lvms);
-    fdt_add_flash_node(lvms);
 
     /* Initialize the IO interrupt subsystem */
     virt_irq_init(lvms);
-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-                                   VIRT_PLATFORM_BUS_SIZE,
-                                   VIRT_PLATFORM_BUS_IRQ);
     lvms->machine_done.notify = virt_done;
     qemu_add_machine_init_done_notifier(&lvms->machine_done);
      /* connect powerdown request */
     lvms->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 
-    /*
-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-     * access. FDT size limit with 1 MiB.
-     * Put the FDT into the memory map as a ROM image: this will ensure
-     * the FDT is copied again upon reset, even if addr points into RAM.
-     */
-    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
-                          &address_space_memory);
-    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
-
     lvms->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lvms->bootinfo);
 }
-- 
2.43.5

For CPU object, possible_cpu_arch_ids() function is used rather than
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
is used here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 14 deletions(-)

Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 38 +++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 17 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
     env->cpucfg[0] = 0x14c010;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
-
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-1C103";
     env->cpucfg[0] = 0x148042;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
 
 static bool loongarch_get_lsx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LSX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
+            error_setg(errp, "Failed to enable LSX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
 }
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
+    cpu->lsx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
+        cpu->pmu = ON_OFF_AUTO_OFF;
     }
 }
 
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
 enum loongarch_features {
+    LOONGARCH_FEATURE_LSX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto lsx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 {
     int ret;
     struct kvm_device_attr attr;
+    uint64_t val;
 
     switch (feature) {
+    case LOONGARCH_FEATURE_LSX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
     return false;
 }
 
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+        } else {
+            error_setg(errp, "'lsx' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         brk_insn = val;
     }
 
+    ret = kvm_cpu_check_lsx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5

Like LSX feature, add type OnOffAuto for LASX feature setting.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 16 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
     uint32_t val;
 
     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (cpu->lsx == ON_OFF_AUTO_OFF) {
+        cpu->lasx = ON_OFF_AUTO_OFF;
+        if (cpu->lasx == ON_OFF_AUTO_ON) {
+            error_setg(errp, "Failed to disable LSX since LASX is enabled");
+            return;
+        }
+    }
+
     if (kvm_enabled()) {
         /* kvm feature detection in function kvm_arch_init_vcpu */
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
             error_setg(errp, "Failed to enable LSX in TCG mode");
             return;
         }
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
+        val = cpu->env.cpucfg[2];
     }
 
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-	}
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
+        error_setg(errp, "Failed to enable LASX since lSX is disabled");
+        return;
+    }
+
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LASX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
+            error_setg(errp, "Failed to enable LASX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
 static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lsx = ON_OFF_AUTO_AUTO;
+    cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LSX,
+    LOONGARCH_FEATURE_LASX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     OnOffAuto lbt;
     OnOffAuto pmu;
     OnOffAuto lsx;
+    OnOffAuto lasx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         }
         return false;
 
+    case LOONGARCH_FEATURE_LASX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+        } else {
+            error_setg(errp, "'lasx' feature not supported by KVM on host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         error_report_err(local_err);
     }
 
+    ret = kvm_cpu_check_lasx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5