On Thu, Nov 2, 2023 at 8:13 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Our current logic in get/setters of MISA and multi-letter extensions
> works because we have only 2 CPU types, generic and vendor, and by using
> "!generic" we're implying that we're talking about vendor CPUs. When adding
> a third CPU type this logic will break so let's handle it beforehand.
>
> In set_misa_ext_cfg() and set_multi_ext_cfg(), check for "vendor" cpu instead
> of "not generic". The "generic CPU" checks remaining are from
> riscv_cpu_add_misa_properties() and cpu_add_multi_ext_prop() before
> applying default values for the extensions.
>
> This leaves us with:
>
> - vendor CPUs will not allow extension enablement, all other CPUs will;
>
> - generic CPUs will inherit default values for extensions, all others
> won't.
>
> And now we can add a new, third CPU type, that will allow extensions to
> be enabled and will not inherit defaults, without changing the existing
> logic.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/tcg/tcg-cpu.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 093bda2e75..f54069d06f 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -612,6 +612,11 @@ static bool riscv_cpu_is_generic(Object *cpu_obj)
> return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL;
> }
>
> +static bool riscv_cpu_is_vendor(Object *cpu_obj)
> +{
> + return object_dynamic_cast(cpu_obj, TYPE_RISCV_VENDOR_CPU) != NULL;
> +}
> +
> /*
> * We'll get here via the following path:
> *
> @@ -674,7 +679,7 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name,
> target_ulong misa_bit = misa_ext_cfg->misa_bit;
> RISCVCPU *cpu = RISCV_CPU(obj);
> CPURISCVState *env = &cpu->env;
> - bool generic_cpu = riscv_cpu_is_generic(obj);
> + bool vendor_cpu = riscv_cpu_is_vendor(obj);
> bool prev_val, value;
>
> if (!visit_type_bool(v, name, &value, errp)) {
> @@ -688,7 +693,7 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name,
> }
>
> if (value) {
> - if (!generic_cpu) {
> + if (vendor_cpu) {
> g_autofree char *cpuname = riscv_cpu_get_name(cpu);
> error_setg(errp, "'%s' CPU does not allow enabling extensions",
> cpuname);
> @@ -793,7 +798,7 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v, const char *name,
> {
> const RISCVCPUMultiExtConfig *multi_ext_cfg = opaque;
> RISCVCPU *cpu = RISCV_CPU(obj);
> - bool generic_cpu = riscv_cpu_is_generic(obj);
> + bool vendor_cpu = riscv_cpu_is_vendor(obj);
> bool prev_val, value;
>
> if (!visit_type_bool(v, name, &value, errp)) {
> @@ -817,7 +822,7 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v, const char *name,
> return;
> }
>
> - if (value && !generic_cpu) {
> + if (value && vendor_cpu) {
> g_autofree char *cpuname = riscv_cpu_get_name(cpu);
> error_setg(errp, "'%s' CPU does not allow enabling extensions",
> cpuname);
> --
> 2.41.0
>
>