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  3. [PATCH v2 00/35] tcg: Introduce TCG_COND_TST{EQ,NE}
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[PATCH v2 17/35] tcg/mips: Support TCG_COND_TST{EQ,NE}

Richard Henderson posted 35 patches 1 year, 1 month ago
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Laurent Vivier <laurent@vivier.eu>, WANG Xuerui <git@xen0n.name>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Aurelien Jarno <aurelien@aurel32.net>, Huacai Chen <chenhuacai@kernel.org>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <Alistair.Francis@wdc.com>, Stefan Weil <sw@weilnetz.de>
There is a newer version of this series
[PATCH v2 17/35] tcg/mips: Support TCG_COND_TST{EQ,NE}
Posted by Richard Henderson 1 year, 1 month ago 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/mips/tcg-target.c.inc | 41 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 35eff82bb3..f5680d7b89 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -910,6 +910,16 @@ static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
         tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, arg1);
         break;
 
+    case TCG_COND_TSTEQ:
+        tcg_out_opc_reg(s, OPC_AND, ret, arg1, arg2);
+        tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
+        break;
+
+    case TCG_COND_TSTNE:
+        tcg_out_opc_reg(s, OPC_AND, ret, arg1, arg2);
+        tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, ret);
+        break;
+
     case TCG_COND_LT:
     case TCG_COND_GE:
     case TCG_COND_LE:
@@ -990,6 +1000,14 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
         arg2 = TCG_REG_ZERO;
         break;
 
+    case TCG_COND_TSTEQ:
+    case TCG_COND_TSTNE:
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, arg1, arg2);
+        arg1 = TCG_TMP0;
+        arg2 = TCG_REG_ZERO;
+        b_opc = cond == TCG_COND_TSTEQ ? OPC_BEQ : OPC_BNE;
+        break;
+
     default:
         g_assert_not_reached();
         break;
@@ -1053,6 +1071,14 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
         tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
         break;
 
+    case TCG_COND_TSTEQ:
+    case TCG_COND_TSTNE:
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, al, bl);
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, ah, bh);
+        tcg_out_opc_reg(s, OPC_OR, ret, TCG_TMP0, TCG_TMP1);
+        tcg_out_setcond(s, tcg_eqne_cond(cond), ret, tmp1, TCG_REG_ZERO);
+        break;
+
     default:
         tcg_out_setcond(s, TCG_COND_EQ, tmp0, ah, bh);
         tcg_out_setcond(s, tcg_unsigned_cond(cond), tmp1, al, bl);
@@ -1079,6 +1105,13 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
         tmp = tcg_out_reduce_eq2(s, TCG_TMP0, TCG_TMP1, al, ah, bl, bh);
         break;
 
+    case TCG_COND_TSTEQ:
+    case TCG_COND_TSTNE:
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, al, bl);
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, ah, bh);
+        tcg_out_opc_reg(s, OPC_OR, TCG_TMP1, TCG_TMP1, TCG_TMP0);
+        break;
+
     default:
         /* Minimize code size by preferring a compare not requiring INV.  */
         if (mips_cmp_map[cond] & MIPS_CMP_INV) {
@@ -1115,6 +1148,14 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
         }
         break;
 
+    case TCG_COND_TSTEQ:
+        eqz = true;
+        /* FALLTHRU */
+    case TCG_COND_TSTNE:
+        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, c1, c2);
+        c1 = TCG_TMP0;
+        break;
+
     default:
         /* Minimize code size by preferring a compare not requiring INV.  */
         if (mips_cmp_map[cond] & MIPS_CMP_INV) {
-- 
2.34.1
Re: [PATCH v2 17/35] tcg/mips: Support TCG_COND_TST{EQ,NE}
Posted by Philippe Mathieu-Daudé 1 year ago 
Hi Richard,

On 28/10/23 21:45, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/mips/tcg-target.c.inc | 41 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 41 insertions(+)


> @@ -1053,6 +1071,14 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
>           tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
>           break;
>   
> +    case TCG_COND_TSTEQ:
> +    case TCG_COND_TSTNE:
> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, al, bl);
> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, ah, bh);
> +        tcg_out_opc_reg(s, OPC_OR, ret, TCG_TMP0, TCG_TMP1);
> +        tcg_out_setcond(s, tcg_eqne_cond(cond), ret, tmp1, TCG_REG_ZERO);

Where is tcg_eqne_cond() declared?

> +        break;
Re: [PATCH v2 17/35] tcg/mips: Support TCG_COND_TST{EQ,NE}
Posted by Richard Henderson 1 year ago 
On 11/16/23 23:46, Philippe Mathieu-Daudé wrote:
> Hi Richard,
> 
> On 28/10/23 21:45, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tcg/mips/tcg-target.c.inc | 41 +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 41 insertions(+)
> 
> 
>> @@ -1053,6 +1071,14 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg 
>> ret,
>>           tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
>>           break;
>> +    case TCG_COND_TSTEQ:
>> +    case TCG_COND_TSTNE:
>> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, al, bl);
>> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, ah, bh);
>> +        tcg_out_opc_reg(s, OPC_OR, ret, TCG_TMP0, TCG_TMP1);
>> +        tcg_out_setcond(s, tcg_eqne_cond(cond), ret, tmp1, TCG_REG_ZERO);
> 
> Where is tcg_eqne_cond() declared?

tcg_tst_eqne_cond() is in tcg/tcg-cond.h.
This is a rebase error when I renamed it; I have fixed it since.


r~
Re: [PATCH v2 17/35] tcg/mips: Support TCG_COND_TST{EQ,NE}
Posted by Philippe Mathieu-Daudé 11 months, 2 weeks ago 
Hi Richard,

On 17/11/23 17:36, Richard Henderson wrote:
> On 11/16/23 23:46, Philippe Mathieu-Daudé wrote:
>> Hi Richard,
>>
>> On 28/10/23 21:45, Richard Henderson wrote:
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>>   tcg/mips/tcg-target.c.inc | 41 +++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 41 insertions(+)
>>
>>
>>> @@ -1053,6 +1071,14 @@ static void tcg_out_setcond2(TCGContext *s, 
>>> TCGCond cond, TCGReg ret,
>>>           tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
>>>           break;
>>> +    case TCG_COND_TSTEQ:
>>> +    case TCG_COND_TSTNE:
>>> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP0, al, bl);
>>> +        tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, ah, bh);
>>> +        tcg_out_opc_reg(s, OPC_OR, ret, TCG_TMP0, TCG_TMP1);
>>> +        tcg_out_setcond(s, tcg_eqne_cond(cond), ret, tmp1, 
>>> TCG_REG_ZERO);
>>
>> Where is tcg_eqne_cond() declared?
> 
> tcg_tst_eqne_cond() is in tcg/tcg-cond.h.
> This is a rebase error when I renamed it; I have fixed it since.

Looking at https://gitlab.com/rth7680/qemu/-/commits/tcg-test/
commits the patch is now quite different. I suppose you plan to
post a v3, so will wait for it to finish what isn't reviewed.

Regards,

Phil.

Patchew 2.1-devel-b67e4c2

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