Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/insns.decode | 2 ++
target/sparc/translate.c | 48 +++++++++++++++++++++------------------
2 files changed, 28 insertions(+), 22 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index ee9262061b..33f0c738e6 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -268,10 +268,12 @@ FxTOs 10 ..... 110100 00000 0 1000 0100 ..... @r_r2
FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2
FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2
FdTOs 10 ..... 110100 00000 0 1100 0110 ..... @r_r2
+FqTOs 10 ..... 110100 00000 0 1100 0111 ..... @r_r2
FiTOd 10 ..... 110100 00000 0 1100 1000 ..... @r_r2
FsTOd 10 ..... 110100 00000 0 1100 1001 ..... @r_r2
FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2
FdTOi 10 ..... 110100 00000 0 1101 0010 ..... @r_r2
+FqTOi 10 ..... 110100 00000 0 1101 0011 ..... @r_r2
{
[
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index e71b41e196..37405df926 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1671,20 +1671,6 @@ static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs,
}
#endif
-static void gen_fop_FQ(DisasContext *dc, int rd, int rs,
- void (*gen)(TCGv_i32, TCGv_ptr))
-{
- TCGv_i32 dst;
-
- gen_op_load_fpr_QT1(QFPREG(rs));
- dst = gen_dest_fpr_F(dc);
-
- gen(dst, tcg_env);
- gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
-
- gen_store_fpr_F(dc, rd, dst);
-}
-
static void gen_fop_DQ(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_i64, TCGv_ptr))
{
@@ -4782,6 +4768,30 @@ static bool do_env_qq(DisasContext *dc, arg_r_r *a,
TRANS(FSQRTq, ALL, do_env_qq, a, gen_helper_fsqrtq)
+static bool do_env_fq(DisasContext *dc, arg_r_r *a,
+ void (*func)(TCGv_i32, TCGv_env))
+{
+ TCGv_i32 dst;
+
+ if (gen_trap_ifnofpu(dc)) {
+ return true;
+ }
+ if (gen_trap_float128(dc)) {
+ return true;
+ }
+
+ gen_op_clear_ieee_excp_and_FTT();
+ gen_op_load_fpr_QT1(QFPREG(a->rs));
+ dst = gen_dest_fpr_F(dc);
+ func(dst, tcg_env);
+ gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
+ gen_store_fpr_F(dc, a->rd, dst);
+ return advance_pc(dc);
+}
+
+TRANS(FqTOs, ALL, do_env_fq, a, gen_helper_fqtos)
+TRANS(FqTOi, ALL, do_env_fq, a, gen_helper_fqtoi)
+
static bool do_fff(DisasContext *dc, arg_r_r_r *a,
void (*func)(TCGv_i32, TCGv_i32, TCGv_i32))
{
@@ -5063,11 +5073,9 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0xc8: /* fitod */
case 0xc9: /* fstod */
case 0x81: /* V9 fstox */
- g_assert_not_reached(); /* in decodetree */
case 0xc7: /* fqtos */
- CHECK_FPU_FEATURE(dc, FLOAT128);
- gen_fop_FQ(dc, rd, rs2, gen_helper_fqtos);
- break;
+ case 0xd3: /* fqtoi */
+ g_assert_not_reached(); /* in decodetree */
case 0xcb: /* fqtod */
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_DQ(dc, rd, rs2, gen_helper_fqtod);
@@ -5084,10 +5092,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_ne_fop_QD(dc, rd, rs2, gen_helper_fdtoq);
break;
- case 0xd3: /* fqtoi */
- CHECK_FPU_FEATURE(dc, FLOAT128);
- gen_fop_FQ(dc, rd, rs2, gen_helper_fqtoi);
- break;
#ifdef TARGET_SPARC64
case 0x3: /* V9 fmovq */
CHECK_FPU_FEATURE(dc, FLOAT128);
--
2.34.1