The following changes since commit a95260486aa7e78d7c7194eba65cf03311ad94ad:

Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging (2023-10-23 14:45:46 -0700)

https://github.com/legoater/qemu/ tags/pull-aspeed-20231025

for you to fetch changes up to dd41ce7a6f13ad4f45ebaf52b9fa91fe5fc961df:

hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState (2023-10-25 09:52:44 +0200)

* Update of Andrew's email

* Split of AspeedSoCState per 2400/2600/10x0

Andrew Jeffery (1):

MAINTAINERS: aspeed: Update Andrew's email address

Philippe Mathieu-Daudé (11):

hw/arm/aspeed: Extract code common to all boards to a common file

hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific

hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific

hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field

hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC

hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC

hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC

hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize

hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState

hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState

hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState

MAINTAINERS | 2 +-

include/hw/arm/aspeed_soc.h | 35 +++++-

hw/arm/aspeed.c | 101 +++++++--------

hw/arm/aspeed_ast10x0.c | 53 ++++----

hw/arm/{aspeed_soc.c => aspeed_ast2400.c} | 197 +++++++-----------------------

hw/arm/aspeed_ast2600.c | 75 ++++++------

hw/arm/aspeed_soc_common.c | 154 +++++++++++++++++++++++

hw/arm/fby35.c | 27 ++--

hw/arm/meson.build | 3 +-

9 files changed, 363 insertions(+), 284 deletions(-)

rename hw/arm/{aspeed_soc.c => aspeed_ast2400.c} (76%)

create mode 100644 hw/arm/aspeed_soc_common.c

From: Philippe Mathieu-Daudé <philmd@linaro.org>

We want to derivate the big AspeedSoCState object in some more

SoC-specific ones. Since the object size will vary, allocate it

dynamically.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Signed-off-by: Cédric Le Goater <clg@kaod.org>

---

hw/arm/aspeed.c | 101 +++++++++++++++++++++++++-----------------------

1 file changed, 52 insertions(+), 49 deletions(-)

MachineState parent_obj;

/* Public */

- AspeedSoCState soc;

+ AspeedSoCState *soc;

MemoryRegion boot_rom;

bool mmio_exec;

uint32_t uart_chosen;

@@ -XXX,XX +XXX,XX @@ static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,

static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend *blk,

uint64_t rom_size)

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_size,

&error_abort);

@@ -XXX,XX +XXX,XX @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)

static void connect_serial_hds_to_uarts(AspeedMachineState *bmc)

{

AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);

- AspeedSoCState *s = &bmc->soc;

+ AspeedSoCState *s = bmc->soc;

AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);

int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default;

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

int i;

NICInfo *nd = &nd_table[0];

- object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);

-

- sc = ASPEED_SOC_GET_CLASS(&bmc->soc);

+ bmc->soc = ASPEED_SOC(object_new(amc->soc_name));

+ object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));

+ object_unref(OBJECT(bmc->soc));

+ sc = ASPEED_SOC_GET_CLASS(bmc->soc);

/*

* This will error out if the RAM size is not supported by the

* memory controller of the SoC.

*/

- object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size,

+ object_property_set_uint(OBJECT(bmc->soc), "ram-size", machine->ram_size,

&error_fatal);

for (i = 0; i < sc->macs_num; i++) {

if ((amc->macs_mask & (1 << i)) && nd->used) {

qemu_check_nic_model(nd, TYPE_FTGMAC100);

- qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd);

+ qdev_set_nic_properties(DEVICE(&bmc->soc->ftgmac100[i]), nd);

nd++;

}

}

- object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,

+ object_property_set_int(OBJECT(bmc->soc), "hw-strap1", amc->hw_strap1,

&error_abort);

- object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,

+ object_property_set_int(OBJECT(bmc->soc), "hw-strap2", amc->hw_strap2,

&error_abort);

- object_property_set_link(OBJECT(&bmc->soc), "memory",

+ object_property_set_link(OBJECT(bmc->soc), "memory",

OBJECT(get_system_memory()), &error_abort);

- object_property_set_link(OBJECT(&bmc->soc), "dram",

+ object_property_set_link(OBJECT(bmc->soc), "dram",

OBJECT(machine->ram), &error_abort);

if (machine->kernel_filename) {

/*

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

* that runs to unlock the SCU. In this case set the default to

* be unlocked as the kernel expects

*/

- object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",

+ object_property_set_int(OBJECT(bmc->soc), "hw-prot-key",

ASPEED_SCU_PROT_KEY, &error_abort);

}

connect_serial_hds_to_uarts(bmc);

- qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);

+ qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);

if (defaults_enabled()) {

- aspeed_board_init_flashes(&bmc->soc.fmc,

+ aspeed_board_init_flashes(&bmc->soc->fmc,

bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,

amc->num_cs, 0);

- aspeed_board_init_flashes(&bmc->soc.spi[0],

+ aspeed_board_init_flashes(&bmc->soc->spi[0],

bmc->spi_model ? bmc->spi_model : amc->spi_model,

1, amc->num_cs);

}

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

amc->i2c_init(bmc);

}

- for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {

- sdhci_attach_drive(&bmc->soc.sdhci.slots[i],

+ for (i = 0; i < bmc->soc->sdhci.num_slots; i++) {

+ sdhci_attach_drive(&bmc->soc->sdhci.slots[i],

drive_get(IF_SD, 0, i));

}

- if (bmc->soc.emmc.num_slots) {

- sdhci_attach_drive(&bmc->soc.emmc.slots[0],

- drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));

+ if (bmc->soc->emmc.num_slots) {

+ sdhci_attach_drive(&bmc->soc->emmc.slots[0],

+ drive_get(IF_SD, 0, bmc->soc->sdhci.num_slots));

}

if (!bmc->mmio_exec) {

- DeviceState *dev = ssi_get_cs(bmc->soc.fmc.spi, 0);

+ DeviceState *dev = ssi_get_cs(bmc->soc->fmc.spi, 0);

BlockBackend *fmc0 = dev ? m25p80_get_blk(dev) : NULL;

if (fmc0) {

- uint64_t rom_size = memory_region_size(&bmc->soc.spi_boot);

+ uint64_t rom_size = memory_region_size(&bmc->soc->spi_boot);

aspeed_install_boot_rom(bmc, fmc0, rom_size);

}

}

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

DeviceState *dev;

uint8_t *eeprom_buf = g_malloc0(32 * 1024);

@@ -XXX,XX +XXX,XX @@ static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)

static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

/*

* The quanta-q71l platform expects tmp75s which are compatible with

@@ -XXX,XX +XXX,XX @@ static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)

static void ast2500_evb_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

uint8_t *eeprom_buf = g_malloc0(8 * 1024);

smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,

@@ -XXX,XX +XXX,XX @@ static void ast2500_evb_i2c_init(AspeedMachineState *bmc)

static void ast2600_evb_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

uint8_t *eeprom_buf = g_malloc0(8 * 1024);

smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,

@@ -XXX,XX +XXX,XX @@ static void ast2600_evb_i2c_init(AspeedMachineState *bmc)

static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB);

at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB,

@@ -XXX,XX +XXX,XX @@ static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)

static void romulus_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

/* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is

* good enough */

@@ -XXX,XX +XXX,XX @@ static void romulus_bmc_i2c_init(AspeedMachineState *bmc)

static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB);

at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB,

@@ -XXX,XX +XXX,XX @@ static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)

static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

/* bus 2 : */

i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);

@@ -XXX,XX +XXX,XX @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)

{14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},

{15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},

};

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

uint8_t *eeprom_buf = g_malloc0(8 * 1024);

DeviceState *dev;

LEDState *led;

@@ -XXX,XX +XXX,XX @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)

static void g220a_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

DeviceState *dev;

dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),

@@ -XXX,XX +XXX,XX @@ static void g220a_bmc_i2c_init(AspeedMachineState *bmc)

static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CSlave *i2c_mux;

/* The at24c256 */

@@ -XXX,XX +XXX,XX @@ static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)

static void rainier_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CSlave *i2c_mux;

at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);

@@ -XXX,XX +XXX,XX @@ static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,

static void fuji_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CBus *i2c[144] = {};

for (int i = 0; i < 16; i++) {

@@ -XXX,XX +XXX,XX @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc)

static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CBus *i2c[13] = {};

for (int i = 0; i < 13; i++) {

if ((i == 8) || (i == 11)) {

@@ -XXX,XX +XXX,XX @@ static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)

static void fby35_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CBus *i2c[16];

for (int i = 0; i < 16; i++) {

@@ -XXX,XX +XXX,XX @@ static void fby35_i2c_init(AspeedMachineState *bmc)

static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);

}

static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

I2CSlave *therm_mux, *cpuvr_mux;

/* Create the generic DC-SCM hardware */

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)

static void fby35_reset(MachineState *state, ShutdownCause reason)

{

AspeedMachineState *bmc = ASPEED_MACHINE(state);

- AspeedGPIOState *gpio = &bmc->soc.gpio;

+ AspeedGPIOState *gpio = &bmc->soc->gpio;

qemu_devices_reset(reason);

@@ -XXX,XX +XXX,XX @@ static void aspeed_minibmc_machine_init(MachineState *machine)

sysclk = clock_new(OBJECT(machine), "SYSCLK");

clock_set_hz(sysclk, SYSCLK_FRQ);

- object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);

- qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);

+ bmc->soc = ASPEED_SOC(object_new(amc->soc_name));

+ object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));

+ object_unref(OBJECT(bmc->soc));

+ qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);

- object_property_set_link(OBJECT(&bmc->soc), "memory",

+ object_property_set_link(OBJECT(bmc->soc), "memory",

OBJECT(get_system_memory()), &error_abort);

connect_serial_hds_to_uarts(bmc);

- qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);

+ qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);

- aspeed_board_init_flashes(&bmc->soc.fmc,

+ aspeed_board_init_flashes(&bmc->soc->fmc,

bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,

amc->num_cs,

0);

- aspeed_board_init_flashes(&bmc->soc.spi[0],

+ aspeed_board_init_flashes(&bmc->soc->spi[0],

bmc->spi_model ? bmc->spi_model : amc->spi_model,

amc->num_cs, amc->num_cs);

- aspeed_board_init_flashes(&bmc->soc.spi[1],

+ aspeed_board_init_flashes(&bmc->soc->spi[1],

bmc->spi_model ? bmc->spi_model : amc->spi_model,

amc->num_cs, (amc->num_cs * 2));

@@ -XXX,XX +XXX,XX @@ static void aspeed_minibmc_machine_init(MachineState *machine)

static void ast1030_evb_i2c_init(AspeedMachineState *bmc)

{

- AspeedSoCState *soc = &bmc->soc;

+ AspeedSoCState *soc = bmc->soc;

/* U10 24C08 connects to SDA/SCL Group 1 by default */

uint8_t *eeprom_buf = g_malloc0(32 * 1024);

2.41.0

From: Philippe Mathieu-Daudé <philmd@linaro.org>

The v7-A cluster is specific to the Aspeed 2600 series,

remove it from the common AspeedSoCState.

The ARM cores belong to the MP cluster, but the array

is currently used by TYPE_ASPEED2600_SOC. We'll clean

that soon, but for now keep it in Aspeed2600SoCState.

@@ -XXX,XX +XXX,XX @@ static const int aspeed_soc_ast2600_irqmap[] = {

static qemu_irq aspeed_soc_ast2600_get_irq(AspeedSoCState *s, int dev)

{

+ Aspeed2600SoCState *a = ASPEED2600_SOC(s);

AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);

- return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[dev]);

+ return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]);

}

static void aspeed_soc_ast2600_init(Object *obj)

{

+ Aspeed2600SoCState *a = ASPEED2600_SOC(obj);

AspeedSoCState *s = ASPEED_SOC(obj);

AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);

int i;

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_init(Object *obj)

for (i = 0; i < sc->num_cpus; i++) {

- object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type);

+ object_initialize_child(obj, "cpu[*]", &a->cpu[i], sc->cpu_type);

}

snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_init(Object *obj)

object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu),

"hw-prot-key");

- object_initialize_child(obj, "a7mpcore", &s->a7mpcore,

+ object_initialize_child(obj, "a7mpcore", &a->a7mpcore,

TYPE_A15MPCORE_PRIV);

object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC);

@@ -XXX,XX +XXX,XX @@ static uint64_t aspeed_calc_affinity(int cpu)

static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

{

int i;

+ Aspeed2600SoCState *a = ASPEED2600_SOC(dev);

AspeedSoCState *s = ASPEED_SOC(dev);

AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);

Error *err = NULL;

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

/* CPU */

for (i = 0; i < sc->num_cpus; i++) {

if (sc->num_cpus > 1) {

- object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar",

+ object_property_set_int(OBJECT(&a->cpu[i]), "reset-cbar",

ASPEED_A7MPCORE_ADDR, &error_abort);

}

- object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity",

+ object_property_set_int(OBJECT(&a->cpu[i]), "mp-affinity",

aspeed_calc_affinity(i), &error_abort);

- object_property_set_int(OBJECT(&s->cpu[i]), "cntfrq", 1125000000,

+ object_property_set_int(OBJECT(&a->cpu[i]), "cntfrq", 1125000000,

&error_abort);

- object_property_set_bool(OBJECT(&s->cpu[i]), "neon", false,

+ object_property_set_bool(OBJECT(&a->cpu[i]), "neon", false,

&error_abort);

- object_property_set_bool(OBJECT(&s->cpu[i]), "vfp-d32", false,

+ object_property_set_bool(OBJECT(&a->cpu[i]), "vfp-d32", false,

&error_abort);

- object_property_set_link(OBJECT(&s->cpu[i]), "memory",

+ object_property_set_link(OBJECT(&a->cpu[i]), "memory",

OBJECT(s->memory), &error_abort);

- if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {

+ if (!qdev_realize(DEVICE(&a->cpu[i]), NULL, errp)) {

return;

}

}

/* A7MPCORE */

- object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", sc->num_cpus,

+ object_property_set_int(OBJECT(&a->a7mpcore), "num-cpu", sc->num_cpus,

&error_abort);

- object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",

+ object_property_set_int(OBJECT(&a->a7mpcore), "num-irq",

ROUND_UP(AST2600_MAX_IRQ + GIC_INTERNAL, 32),

&error_abort);

- sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);

- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR);

+ sysbus_realize(SYS_BUS_DEVICE(&a->a7mpcore), &error_abort);

+ aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->a7mpcore), 0, ASPEED_A7MPCORE_ADDR);

for (i = 0; i < sc->num_cpus; i++) {

- SysBusDevice *sbd = SYS_BUS_DEVICE(&s->a7mpcore);

- DeviceState *d = DEVICE(&s->cpu[i]);

+ SysBusDevice *sbd = SYS_BUS_DEVICE(&a->a7mpcore);

+ DeviceState *d = DEVICE(&a->cpu[i]);

irq = qdev_get_gpio_in(d, ARM_CPU_IRQ);

sysbus_connect_irq(sbd, i, irq);

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

}

/* SRAM */

- sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&s->cpu[0])->cpu_index);

+ sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);

memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, &err);

if (err) {

error_propagate(errp, err);

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

}

aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);

for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {

- irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ irq = qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_I2C] + i);

/* The AST2600 I2C controller has one IRQ per bus. */

sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

* offset 0.

*/

sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_1,

- qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_1));

sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_2,

- qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_2));

sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_3,

- qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_3));

sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_4,

- qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_4));

/* HACE */

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)

}

aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);

for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {

- irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),

+ irq = qdev_get_gpio_in(DEVICE(&a->a7mpcore),

sc->irqmap[ASPEED_DEV_I3C] + i);

/* The AST2600 I3C controller has one IRQ per bus. */

sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq);

diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/fby35.c

+++ b/hw/arm/fby35.c

@@ -XXX,XX +XXX,XX @@ struct Fby35State {

MemoryRegion bic_memory;

Clock *bic_sysclk;

- AspeedSoCState bmc;

+ Aspeed2600SoCState bmc;

Aspeed10x0SoCState bic;

bool mmio_exec;

@@ -XXX,XX +XXX,XX @@ static void fby35_bmc_write_boot_rom(DriveInfo *dinfo, MemoryRegion *mr,

static void fby35_bmc_init(Fby35State *s)

{

+ AspeedSoCState *soc;

+

object_initialize_child(OBJECT(s), "bmc", &s->bmc, "ast2600-a3");

+ soc = ASPEED_SOC(&s->bmc);

memory_region_init(&s->bmc_memory, OBJECT(&s->bmc), "bmc-memory",

UINT64_MAX);

@@ -XXX,XX +XXX,XX @@ static void fby35_bmc_init(Fby35State *s)

&error_abort);

object_property_set_int(OBJECT(&s->bmc), "hw-strap2", 0x00000003,

&error_abort);

- aspeed_soc_uart_set_chr(&s->bmc, ASPEED_DEV_UART5, serial_hd(0));

+ aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART5, serial_hd(0));

qdev_realize(DEVICE(&s->bmc), NULL, &error_abort);

- aspeed_board_init_flashes(&s->bmc.fmc, "n25q00", 2, 0);

+ aspeed_board_init_flashes(&soc->fmc, "n25q00", 2, 0);

/* Install first FMC flash content as a boot rom. */

if (!s->mmio_exec) {

DriveInfo *mtd0 = drive_get(IF_MTD, 0, 0);

if (mtd0) {

- AspeedSoCState *bmc = &s->bmc;

- uint64_t rom_size = memory_region_size(&bmc->spi_boot);

+ uint64_t rom_size = memory_region_size(&soc->spi_boot);

memory_region_init_rom(&s->bmc_boot_rom, NULL, "aspeed.boot_rom",

rom_size, &error_abort);

- memory_region_add_subregion_overlap(&bmc->spi_boot_container, 0,

+ memory_region_add_subregion_overlap(&soc->spi_boot_container, 0,

&s->bmc_boot_rom, 1);

fby35_bmc_write_boot_rom(mtd0, &s->bmc_boot_rom,

2.41.0

From: Philippe Mathieu-Daudé <philmd@linaro.org>

TYPE_ASPEED2600_SOC inherits from TYPE_ASPEED_SOC.

In few commits we'll add more fields, but to keep

review process simple, don't add any yet.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Signed-off-by: Cédric Le Goater <clg@kaod.org>

include/hw/arm/aspeed_soc.h | 7 +++++++

hw/arm/aspeed_ast2600.c | 26 +++++++++++++-------------

2 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h

--- a/include/hw/arm/aspeed_soc.h

+++ b/include/hw/arm/aspeed_soc.h

@@ -XXX,XX +XXX,XX @@ struct AspeedSoCState {

#define TYPE_ASPEED_SOC "aspeed-soc"

OBJECT_DECLARE_TYPE(AspeedSoCState, AspeedSoCClass, ASPEED_SOC)

+struct Aspeed2600SoCState {

+ AspeedSoCState parent;

+#define TYPE_ASPEED2600_SOC "aspeed2600-soc"

+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2600SoCState, ASPEED2600_SOC)

+

struct Aspeed10x0SoCState {

AspeedSoCState parent;

};

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)

sc->get_irq = aspeed_soc_ast2600_get_irq;

-static const TypeInfo aspeed_soc_ast2600_type_info = {

- .name = "ast2600-a3",

- .parent = TYPE_ASPEED_SOC,

- .instance_size = sizeof(AspeedSoCState),

- .instance_init = aspeed_soc_ast2600_init,

- .class_init = aspeed_soc_ast2600_class_init,

- .class_size = sizeof(AspeedSoCClass),

+static const TypeInfo aspeed_soc_ast2600_types[] = {

+ .name = TYPE_ASPEED2600_SOC,

+ .parent = TYPE_ASPEED_SOC,

+ .instance_size = sizeof(Aspeed2600SoCState),

+ .abstract = true,

+ }, {

+ .name = "ast2600-a3",

+ .parent = TYPE_ASPEED2600_SOC,

+ .instance_init = aspeed_soc_ast2600_init,

+ .class_init = aspeed_soc_ast2600_class_init,

2.41.0

From: Philippe Mathieu-Daudé <philmd@linaro.org>

TYPE_ASPEED10X0_SOC inherits from TYPE_ASPEED_SOC.

In few commits we'll add more fields, but to keep

review process simple, don't add any yet.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Signed-off-by: Cédric Le Goater <clg@kaod.org>

include/hw/arm/aspeed_soc.h | 7 +++++++

hw/arm/aspeed_ast10x0.c | 26 +++++++++++++-------------

2 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h

--- a/include/hw/arm/aspeed_soc.h

+++ b/include/hw/arm/aspeed_soc.h

@@ -XXX,XX +XXX,XX @@ struct AspeedSoCState {

#define TYPE_ASPEED_SOC "aspeed-soc"

OBJECT_DECLARE_TYPE(AspeedSoCState, AspeedSoCClass, ASPEED_SOC)

+struct Aspeed10x0SoCState {

+ AspeedSoCState parent;

+};

+#define TYPE_ASPEED10X0_SOC "aspeed10x0-soc"

+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed10x0SoCState, ASPEED10X0_SOC)

struct AspeedSoCClass {

DeviceClass parent_class;

diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/aspeed_ast10x0.c

+++ b/hw/arm/aspeed_ast10x0.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data)

sc->get_irq = aspeed_soc_ast1030_get_irq;

}

-static const TypeInfo aspeed_soc_ast1030_type_info = {

- .name = "ast1030-a1",

- .parent = TYPE_ASPEED_SOC,

- .instance_size = sizeof(AspeedSoCState),

- .instance_init = aspeed_soc_ast1030_init,

- .class_init = aspeed_soc_ast1030_class_init,

- .class_size = sizeof(AspeedSoCClass),

+static const TypeInfo aspeed_soc_ast10x0_types[] = {

+ .name = TYPE_ASPEED10X0_SOC,

+ .parent = TYPE_ASPEED_SOC,

+ .instance_size = sizeof(Aspeed10x0SoCState),

+ .abstract = true,

+ }, {

+ .name = "ast1030-a1",

+ .parent = TYPE_ASPEED10X0_SOC,

+ .instance_init = aspeed_soc_ast1030_init,

+ .class_init = aspeed_soc_ast1030_class_init,

-static void aspeed_soc_register_types(void)

-{

- type_register_static(&aspeed_soc_ast1030_type_info);

-}

-

-type_init(aspeed_soc_register_types)

+DEFINE_TYPES(aspeed_soc_ast10x0_types)

2.41.0