[v1] Support RISC-V IOPMP

[PATCH 0/6] Support RISC-V IOPMP

Ethan Chen via posted 6 patches 2 years, 2 months ago

Diff against v2 v3 v4 v5 v6 v7 v8 v9 v10 v11
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20231025051430.493079-1-ethan84@andestech.com

Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liweiwei@iscas.ac.cn>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Peter Xu <peterx@redhat.com>, David Hildenbrand <david@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>

There is a newer version of this series

hw/dma/Kconfig                |   3 +
hw/dma/atcdmac300.c           | 435 +++++++++++++++++
hw/dma/meson.build            |   1 +
hw/misc/Kconfig               |   3 +
hw/misc/meson.build           |   1 +
hw/misc/riscv_iopmp.c         | 881 ++++++++++++++++++++++++++++++++++
hw/riscv/Kconfig              |   2 +
hw/riscv/virt.c               |  72 ++-
include/exec/memattrs.h       |   3 +
include/exec/memory.h         |  19 +
include/hw/dma/atcdmac300.h   | 171 +++++++
include/hw/misc/riscv_iopmp.h | 322 +++++++++++++
include/hw/riscv/virt.h       |  10 +-
system/physmem.c              |   9 +-
14 files changed, 1927 insertions(+), 5 deletions(-)
create mode 100644 hw/dma/atcdmac300.c
create mode 100644 hw/misc/riscv_iopmp.c
create mode 100644 include/hw/dma/atcdmac300.h
create mode 100644 include/hw/misc/riscv_iopmp.h

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[PATCH 0/6] Support RISC-V IOPMP

Posted by Ethan Chen via 2 years, 2 months ago

This series implements IOPMP specification v1.0.0-draft4 rapid-k model:
https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf

When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt platform.
This DMA devce is connected to the IOPMP and has the functionalities required
by IOPMP, including:
- Support specify source-id (SID)
- Support asynchronous I/O to handle stall transcations

Ethan Chen (6):
  exec/memory: Introduce the translate_size function within the IOMMU
    class
  system/physmem: IOMMU: Invoke the translate_size function if it is
    implemented
  exec/memattrs: Add iopmp source id to MemTxAttrs
  Add RISC-V IOPMP support
  hw/dma: Add Andes ATCDMAC300 support
  hw/riscv/virt: Add IOPMP support

 hw/dma/Kconfig                |   3 +
 hw/dma/atcdmac300.c           | 435 +++++++++++++++++
 hw/dma/meson.build            |   1 +
 hw/misc/Kconfig               |   3 +
 hw/misc/meson.build           |   1 +
 hw/misc/riscv_iopmp.c         | 881 ++++++++++++++++++++++++++++++++++
 hw/riscv/Kconfig              |   2 +
 hw/riscv/virt.c               |  72 ++-
 include/exec/memattrs.h       |   3 +
 include/exec/memory.h         |  19 +
 include/hw/dma/atcdmac300.h   | 171 +++++++
 include/hw/misc/riscv_iopmp.h | 322 +++++++++++++
 include/hw/riscv/virt.h       |  10 +-
 system/physmem.c              |   9 +-
 14 files changed, 1927 insertions(+), 5 deletions(-)
 create mode 100644 hw/dma/atcdmac300.c
 create mode 100644 hw/misc/riscv_iopmp.c
 create mode 100644 include/hw/dma/atcdmac300.h
 create mode 100644 include/hw/misc/riscv_iopmp.h

-- 
2.34.1

Re: [PATCH 0/6] Support RISC-V IOPMP

Posted by Ethan Chen via 2 years, 2 months ago

I found that after add size information it is still not enough for IOPMP to 
reject partially hit error. Access is separated in flatview_read_continue and
lost the start address information. I will fix it in next version. 

Address start, address end will be added to MemTxAttr, translate_size will 
beremoved and translate_attr which is have full MemTxAttr information will be 
added in next version patch.