[v2] tcg: Streamline vector load/store

[PATCH v2 0/2] tcg: Streamline vector load/store

Richard Henderson posted 2 patches 6 months, 2 weeks ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20231013175109.124308-1-richard.henderson@linaro.org

Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <eduardo@habkost.net>

include/tcg/tcg-op-common.h |  3 ++
target/i386/tcg/translate.c | 63 +++++++++++++++++--------------------
tcg/tcg-op.c                | 22 +++++++++++++
3 files changed, 54 insertions(+), 34 deletions(-)

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[PATCH v2 0/2] tcg: Streamline vector load/store

Posted by Richard Henderson 6 months, 2 weeks ago

We have tcg_gen_qemu_{ld,st}_i128, which can be used to implement
load/store of vectors to guest memory.  But at present we have to
split into, or concatenated from, two i64 to reference the guest
vector register backing store within env.

Provide tcg_gen_{ld,st}_i128, which can avoid the trip through i64.

This does require that the target store i128 in host byte ordering,
which is true of i386 (and some other backends) but not arm or s390x.
There is definitely further cleanup possible.

Changes for v2:
  * Set atomicity for x86 vector operations.


r~


Richard Henderson (2):
  tcg: Add tcg_gen_{ld,st}_i128
  target/i386: Use i128 for 128 and 256-bit loads and stores

 include/tcg/tcg-op-common.h |  3 ++
 target/i386/tcg/translate.c | 63 +++++++++++++++++--------------------
 tcg/tcg-op.c                | 22 +++++++++++++
 3 files changed, 54 insertions(+), 34 deletions(-)

-- 
2.34.1

Re: [PATCH v2 0/2] tcg: Streamline vector load/store

Posted by Philippe Mathieu-Daudé 6 months, 2 weeks ago

On 13/10/23 19:51, Richard Henderson wrote:
> We have tcg_gen_qemu_{ld,st}_i128, which can be used to implement
> load/store of vectors to guest memory.  But at present we have to
> split into, or concatenated from, two i64 to reference the guest
> vector register backing store within env.
> 
> Provide tcg_gen_{ld,st}_i128, which can avoid the trip through i64.
> 
> This does require that the target store i128 in host byte ordering,
> which is true of i386 (and some other backends) but not arm or s390x.
> There is definitely further cleanup possible.

Is hexagon gen_vreg_load() candidate?

Re: [PATCH v2 0/2] tcg: Streamline vector load/store

Posted by Richard Henderson 6 months, 2 weeks ago

On 10/17/23 04:52, Philippe Mathieu-Daudé wrote:
> On 13/10/23 19:51, Richard Henderson wrote:
>> We have tcg_gen_qemu_{ld,st}_i128, which can be used to implement
>> load/store of vectors to guest memory.  But at present we have to
>> split into, or concatenated from, two i64 to reference the guest
>> vector register backing store within env.
>>
>> Provide tcg_gen_{ld,st}_i128, which can avoid the trip through i64.
>>
>> This does require that the target store i128 in host byte ordering,
>> which is true of i386 (and some other backends) but not arm or s390x.
>> There is definitely further cleanup possible.
> 
> Is hexagon gen_vreg_load() candidate?

Yes.


r~