The powerpc_mmu_t definition is only used by target/ppc/, no need
to expose it. Restrict it by moving it to "target/ppc/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/ppc/cpu-qom.h | 43 -------------------------------------------
target/ppc/cpu.h | 42 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+), 43 deletions(-)
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index b2e42c2996..5bdca472be 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -36,49 +36,6 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU)
#define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host")
-/*****************************************************************************/
-/* MMU model */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
-enum powerpc_mmu_t {
- POWERPC_MMU_UNKNOWN = 0x00000000,
- /* Standard 32 bits PowerPC MMU */
- POWERPC_MMU_32B = 0x00000001,
- /* PowerPC 6xx MMU with software TLB */
- POWERPC_MMU_SOFT_6xx = 0x00000002,
- /*
- * PowerPC 74xx MMU with software TLB (this has been
- * disabled, see git history for more information.
- * keywords: tlbld tlbli TLBMISS PTEHI PTELO)
- */
- POWERPC_MMU_SOFT_74xx = 0x00000003,
- /* PowerPC 4xx MMU with software TLB */
- POWERPC_MMU_SOFT_4xx = 0x00000004,
- /* PowerPC MMU in real mode only */
- POWERPC_MMU_REAL = 0x00000006,
- /* Freescale MPC8xx MMU model */
- POWERPC_MMU_MPC8xx = 0x00000007,
- /* BookE MMU model */
- POWERPC_MMU_BOOKE = 0x00000008,
- /* BookE 2.06 MMU model */
- POWERPC_MMU_BOOKE206 = 0x00000009,
-#define POWERPC_MMU_64 0x00010000
- /* 64 bits PowerPC MMU */
- POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
- /* Architecture 2.03 and later (has LPCR) */
- POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
- /* Architecture 2.06 variant */
- POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003,
- /* Architecture 2.07 variant */
- POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004,
- /* Architecture 3.00 variant */
- POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
-};
-
-static inline bool mmu_is_64bit(powerpc_mmu_t mmu_model)
-{
- return mmu_model & POWERPC_MMU_64;
-}
-
/*****************************************************************************/
/* Input pins model */
typedef enum powerpc_input_t powerpc_input_t;
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index d8cf4c03bf..c2cd069095 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -217,6 +217,48 @@ typedef enum powerpc_excp_t {
POWERPC_EXCP_POWER10,
} powerpc_excp_t;
+/*****************************************************************************/
+/* MMU model */
+typedef enum powerpc_mmu_t {
+ POWERPC_MMU_UNKNOWN = 0x00000000,
+ /* Standard 32 bits PowerPC MMU */
+ POWERPC_MMU_32B = 0x00000001,
+ /* PowerPC 6xx MMU with software TLB */
+ POWERPC_MMU_SOFT_6xx = 0x00000002,
+ /*
+ * PowerPC 74xx MMU with software TLB (this has been
+ * disabled, see git history for more information.
+ * keywords: tlbld tlbli TLBMISS PTEHI PTELO)
+ */
+ POWERPC_MMU_SOFT_74xx = 0x00000003,
+ /* PowerPC 4xx MMU with software TLB */
+ POWERPC_MMU_SOFT_4xx = 0x00000004,
+ /* PowerPC MMU in real mode only */
+ POWERPC_MMU_REAL = 0x00000006,
+ /* Freescale MPC8xx MMU model */
+ POWERPC_MMU_MPC8xx = 0x00000007,
+ /* BookE MMU model */
+ POWERPC_MMU_BOOKE = 0x00000008,
+ /* BookE 2.06 MMU model */
+ POWERPC_MMU_BOOKE206 = 0x00000009,
+#define POWERPC_MMU_64 0x00010000
+ /* 64 bits PowerPC MMU */
+ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
+ /* Architecture 2.03 and later (has LPCR) */
+ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
+ /* Architecture 2.06 variant */
+ POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003,
+ /* Architecture 2.07 variant */
+ POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004,
+ /* Architecture 3.00 variant */
+ POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
+} powerpc_mmu_t;
+
+static inline bool mmu_is_64bit(powerpc_mmu_t mmu_model)
+{
+ return mmu_model & POWERPC_MMU_64;
+}
+
#define PPC_INPUT(env) ((env)->bus_model)
/*****************************************************************************/
--
2.41.0
On 10/13/23 14:56, Philippe Mathieu-Daudé wrote:
> The powerpc_mmu_t definition is only used by target/ppc/, no need
> to expose it. Restrict it by moving it to "target/ppc/cpu.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> ---
> target/ppc/cpu-qom.h | 43 -------------------------------------------
> target/ppc/cpu.h | 42 ++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 42 insertions(+), 43 deletions(-)
>
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index b2e42c2996..5bdca472be 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -36,49 +36,6 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU)
>
> #define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host")
>
> -/*****************************************************************************/
> -/* MMU model */
> -typedef enum powerpc_mmu_t powerpc_mmu_t;
> -enum powerpc_mmu_t {
> - POWERPC_MMU_UNKNOWN = 0x00000000,
> - /* Standard 32 bits PowerPC MMU */
> - POWERPC_MMU_32B = 0x00000001,
> - /* PowerPC 6xx MMU with software TLB */
> - POWERPC_MMU_SOFT_6xx = 0x00000002,
> - /*
> - * PowerPC 74xx MMU with software TLB (this has been
> - * disabled, see git history for more information.
> - * keywords: tlbld tlbli TLBMISS PTEHI PTELO)
> - */
> - POWERPC_MMU_SOFT_74xx = 0x00000003,
> - /* PowerPC 4xx MMU with software TLB */
> - POWERPC_MMU_SOFT_4xx = 0x00000004,
> - /* PowerPC MMU in real mode only */
> - POWERPC_MMU_REAL = 0x00000006,
> - /* Freescale MPC8xx MMU model */
> - POWERPC_MMU_MPC8xx = 0x00000007,
> - /* BookE MMU model */
> - POWERPC_MMU_BOOKE = 0x00000008,
> - /* BookE 2.06 MMU model */
> - POWERPC_MMU_BOOKE206 = 0x00000009,
> -#define POWERPC_MMU_64 0x00010000
> - /* 64 bits PowerPC MMU */
> - POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
> - /* Architecture 2.03 and later (has LPCR) */
> - POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
> - /* Architecture 2.06 variant */
> - POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003,
> - /* Architecture 2.07 variant */
> - POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004,
> - /* Architecture 3.00 variant */
> - POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
> -};
> -
> -static inline bool mmu_is_64bit(powerpc_mmu_t mmu_model)
> -{
> - return mmu_model & POWERPC_MMU_64;
> -}
> -
> /*****************************************************************************/
> /* Input pins model */
> typedef enum powerpc_input_t powerpc_input_t;
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index d8cf4c03bf..c2cd069095 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -217,6 +217,48 @@ typedef enum powerpc_excp_t {
> POWERPC_EXCP_POWER10,
> } powerpc_excp_t;
>
> +/*****************************************************************************/
> +/* MMU model */
> +typedef enum powerpc_mmu_t {
> + POWERPC_MMU_UNKNOWN = 0x00000000,
> + /* Standard 32 bits PowerPC MMU */
> + POWERPC_MMU_32B = 0x00000001,
> + /* PowerPC 6xx MMU with software TLB */
> + POWERPC_MMU_SOFT_6xx = 0x00000002,
> + /*
> + * PowerPC 74xx MMU with software TLB (this has been
> + * disabled, see git history for more information.
> + * keywords: tlbld tlbli TLBMISS PTEHI PTELO)
> + */
> + POWERPC_MMU_SOFT_74xx = 0x00000003,
> + /* PowerPC 4xx MMU with software TLB */
> + POWERPC_MMU_SOFT_4xx = 0x00000004,
> + /* PowerPC MMU in real mode only */
> + POWERPC_MMU_REAL = 0x00000006,
> + /* Freescale MPC8xx MMU model */
> + POWERPC_MMU_MPC8xx = 0x00000007,
> + /* BookE MMU model */
> + POWERPC_MMU_BOOKE = 0x00000008,
> + /* BookE 2.06 MMU model */
> + POWERPC_MMU_BOOKE206 = 0x00000009,
> +#define POWERPC_MMU_64 0x00010000
> + /* 64 bits PowerPC MMU */
> + POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
> + /* Architecture 2.03 and later (has LPCR) */
> + POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
> + /* Architecture 2.06 variant */
> + POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003,
> + /* Architecture 2.07 variant */
> + POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004,
> + /* Architecture 3.00 variant */
> + POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
> +} powerpc_mmu_t;
> +
> +static inline bool mmu_is_64bit(powerpc_mmu_t mmu_model)
> +{
> + return mmu_model & POWERPC_MMU_64;
> +}
> +
> #define PPC_INPUT(env) ((env)->bus_model)
>
> /*****************************************************************************/
On 10/13/23 05:56, Philippe Mathieu-Daudé wrote: > The powerpc_mmu_t definition is only used by target/ppc/, no need > to expose it. Restrict it by moving it to "target/ppc/cpu.h". > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/ppc/cpu-qom.h | 43 ------------------------------------------- > target/ppc/cpu.h | 42 ++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 42 insertions(+), 43 deletions(-) > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
© 2016 - 2026 Red Hat, Inc.