Host bridge device and PCI function #0 are inverted.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/pci-host/sh_pci.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c
index 41aed48c85..580e273d96 100644
--- a/hw/pci-host/sh_pci.c
+++ b/hw/pci-host/sh_pci.c
@@ -116,7 +116,7 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level)
     qemu_set_irq(pic[irq_num], level);
 }
 
-static void sh_pci_device_realize(DeviceState *dev, Error **errp)
+static void sh_pcic_host_realize(DeviceState *dev, Error **errp)
 {
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     SHPCIState *s = SH_PCI_HOST_BRIDGE(dev);
@@ -145,19 +145,19 @@ static void sh_pci_device_realize(DeviceState *dev, Error **errp)
     s->dev = pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "sh_pci_host");
 }
 
-static void sh_pci_host_realize(PCIDevice *d, Error **errp)
+static void sh_pcic_pci_realize(PCIDevice *d, Error **errp)
 {
     pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT);
     pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST |
                  PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM);
 }
 
-static void sh_pci_host_class_init(ObjectClass *klass, void *data)
+static void sh_pcic_pci_class_init(ObjectClass *klass, void *data)
 {
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
     DeviceClass *dc = DEVICE_CLASS(klass);
 
-    k->realize = sh_pci_host_realize;
+    k->realize = sh_pcic_pci_realize;
     k->vendor_id = PCI_VENDOR_ID_HITACHI;
     k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R;
     /*
@@ -167,11 +167,11 @@ static void sh_pci_host_class_init(ObjectClass *klass, void *data)
     dc->user_creatable = false;
 }
 
-static void sh_pci_device_class_init(ObjectClass *klass, void *data)
+static void sh_pcic_host_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
 
-    dc->realize = sh_pci_device_realize;
+    dc->realize = sh_pcic_host_realize;
 }
 
 static const TypeInfo sh_pcic_types[] = {
@@ -179,12 +179,12 @@ static const TypeInfo sh_pcic_types[] = {
         .name           = TYPE_SH_PCI_HOST_BRIDGE,
         .parent         = TYPE_PCI_HOST_BRIDGE,
         .instance_size  = sizeof(SHPCIState),
-        .class_init     = sh_pci_device_class_init,
+        .class_init     = sh_pcic_host_class_init,
     }, {
         .name           = "sh_pci_host",
         .parent         = TYPE_PCI_DEVICE,
         .instance_size  = sizeof(PCIDevice),
-        .class_init     = sh_pci_host_class_init,
+        .class_init     = sh_pcic_pci_class_init,
         .interfaces = (InterfaceInfo[]) {
             { INTERFACE_CONVENTIONAL_PCI_DEVICE },
             { },
-- 
2.41.0

On Thu, 12 Oct 2023 13:12:36 +0900,
Philippe Mathieu-Daudé wrote:
> 
> Host bridge device and PCI function #0 are inverted.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>

> ---
>  hw/pci-host/sh_pci.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c
> index 41aed48c85..580e273d96 100644
> --- a/hw/pci-host/sh_pci.c
> +++ b/hw/pci-host/sh_pci.c
> @@ -116,7 +116,7 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level)
>      qemu_set_irq(pic[irq_num], level);
>  }
>  
> -static void sh_pci_device_realize(DeviceState *dev, Error **errp)
> +static void sh_pcic_host_realize(DeviceState *dev, Error **errp)
>  {
>      SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>      SHPCIState *s = SH_PCI_HOST_BRIDGE(dev);
> @@ -145,19 +145,19 @@ static void sh_pci_device_realize(DeviceState *dev, Error **errp)
>      s->dev = pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "sh_pci_host");
>  }
>  
> -static void sh_pci_host_realize(PCIDevice *d, Error **errp)
> +static void sh_pcic_pci_realize(PCIDevice *d, Error **errp)
>  {
>      pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT);
>      pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST |
>                   PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM);
>  }
>  
> -static void sh_pci_host_class_init(ObjectClass *klass, void *data)
> +static void sh_pcic_pci_class_init(ObjectClass *klass, void *data)
>  {
>      PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>      DeviceClass *dc = DEVICE_CLASS(klass);
>  
> -    k->realize = sh_pci_host_realize;
> +    k->realize = sh_pcic_pci_realize;
>      k->vendor_id = PCI_VENDOR_ID_HITACHI;
>      k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R;
>      /*
> @@ -167,11 +167,11 @@ static void sh_pci_host_class_init(ObjectClass *klass, void *data)
>      dc->user_creatable = false;
>  }
>  
> -static void sh_pci_device_class_init(ObjectClass *klass, void *data)
> +static void sh_pcic_host_class_init(ObjectClass *klass, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(klass);
>  
> -    dc->realize = sh_pci_device_realize;
> +    dc->realize = sh_pcic_host_realize;
>  }
>  
>  static const TypeInfo sh_pcic_types[] = {
> @@ -179,12 +179,12 @@ static const TypeInfo sh_pcic_types[] = {
>          .name           = TYPE_SH_PCI_HOST_BRIDGE,
>          .parent         = TYPE_PCI_HOST_BRIDGE,
>          .instance_size  = sizeof(SHPCIState),
> -        .class_init     = sh_pci_device_class_init,
> +        .class_init     = sh_pcic_host_class_init,
>      }, {
>          .name           = "sh_pci_host",
>          .parent         = TYPE_PCI_DEVICE,
>          .instance_size  = sizeof(PCIDevice),
> -        .class_init     = sh_pci_host_class_init,
> +        .class_init     = sh_pcic_pci_class_init,
>          .interfaces = (InterfaceInfo[]) {
>              { INTERFACE_CONVENTIONAL_PCI_DEVICE },
>              { },
> -- 
> 2.41.0
>