[v1] Add PowerNV I2C Controller Model

[PATCH 2/2] ppc/pnv: Connect I2C controller model to powernv9 chip

Posted by Glenn Miles 2 years, 4 months ago

From: Cédric Le Goater <clg@kaod.org>

Wires up three I2C controller instances to the powernv9 chip
XSCOM address space.

Each controller instance is wired up to a single I2C bus of
its own.  No other I2C devices are connected to the buses
at this time.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
[milesg: Split wiring from addition of model itself]
[milesg: Added new commit message]
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
---
 hw/ppc/pnv.c              | 26 ++++++++++++++++++++++++++
 include/hw/ppc/pnv_chip.h |  4 ++++
 2 files changed, 30 insertions(+)

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index eb54f93986..32b6d9889d 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1438,6 +1438,10 @@ static void pnv_chip_power9_instance_init(Object *obj)
         object_initialize_child(obj, "pec[*]", &chip9->pecs[i],
                                 TYPE_PNV_PHB4_PEC);
     }
+
+    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
+        object_initialize_child(obj, "i2c[*]", &chip9->i2c[i], TYPE_PNV_I2C);
+    }
 }
 
 static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
@@ -1510,6 +1514,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
     PnvChip *chip = PNV_CHIP(dev);
     Pnv9Psi *psi9 = &chip9->psi;
     Error *local_err = NULL;
+    int i;
 
     /* XSCOM bridge is first */
     pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err);
@@ -1613,6 +1618,27 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
         error_propagate(errp, local_err);
         return;
     }
+
+    /*
+     * I2C
+     * TODO: The number of busses is specific to each platform
+     */
+    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
+        Object *obj =  OBJECT(&chip9->i2c[i]);
+
+        object_property_set_int(obj, "engine", i + 1, &error_fatal);
+        object_property_set_int(obj, "num-busses", 1, &error_fatal);
+        object_property_set_link(obj, "chip", OBJECT(chip), &error_abort);
+        if (!qdev_realize(DEVICE(obj), NULL, errp)) {
+            return;
+        }
+        pnv_xscom_add_subregion(chip, PNV9_XSCOM_I2CM_BASE +
+                               chip9->i2c[i].engine * PNV9_XSCOM_I2CM_SIZE,
+                                &chip9->i2c[i].xscom_regs);
+        qdev_connect_gpio_out(DEVICE(&chip9->i2c[i]), 0,
+                              qdev_get_gpio_in(DEVICE(&chip9->psi),
+                                               PSIHB9_IRQ_SBE_I2C));
+    }
 }
 
 static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index 53e1d921d7..3bbe2783c9 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -9,6 +9,7 @@
 #include "hw/ppc/pnv_psi.h"
 #include "hw/ppc/pnv_sbe.h"
 #include "hw/ppc/pnv_xive.h"
+#include "hw/ppc/pnv_i2c.h"
 #include "hw/sysbus.h"
 
 OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
@@ -86,6 +87,9 @@ struct Pnv9Chip {
 
 #define PNV9_CHIP_MAX_PEC 3
     PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
+
+#define PNV9_CHIP_MAX_I2C 3
+    PnvI2C      i2c[PNV9_CHIP_MAX_I2C];
 };
 
 /*
-- 
2.31.1

Re: [PATCH 2/2] ppc/pnv: Connect I2C controller model to powernv9 chip

Posted by Cédric Le Goater 2 years, 4 months ago

On 10/10/23 19:19, Glenn Miles wrote:
> From: Cédric Le Goater <clg@kaod.org>
> 
> Wires up three I2C controller instances to the powernv9 chip
> XSCOM address space.
> 
> Each controller instance is wired up to a single I2C bus of
> its own.  No other I2C devices are connected to the buses
> at this time.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> [milesg: Split wiring from addition of model itself]
> [milesg: Added new commit message]
> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
> ---
>   hw/ppc/pnv.c              | 26 ++++++++++++++++++++++++++
>   include/hw/ppc/pnv_chip.h |  4 ++++
>   2 files changed, 30 insertions(+)
> 
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index eb54f93986..32b6d9889d 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1438,6 +1438,10 @@ static void pnv_chip_power9_instance_init(Object *obj)
>           object_initialize_child(obj, "pec[*]", &chip9->pecs[i],
>                                   TYPE_PNV_PHB4_PEC);
>       }
> +
> +    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
> +        object_initialize_child(obj, "i2c[*]", &chip9->i2c[i], TYPE_PNV_I2C);
> +    }
>   }
>   
>   static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
> @@ -1510,6 +1514,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>       PnvChip *chip = PNV_CHIP(dev);
>       Pnv9Psi *psi9 = &chip9->psi;
>       Error *local_err = NULL;
> +    int i;
>   
>       /* XSCOM bridge is first */
>       pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err);
> @@ -1613,6 +1618,27 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>           error_propagate(errp, local_err);
>           return;
>       }
> +
> +    /*
> +     * I2C
> +     * TODO: The number of busses is specific to each platform

Could the hardcoded values  used in the properties below be PnvChipClass
attributes instead ?

Thanks,

C.


> +     */
> +    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
> +        Object *obj =  OBJECT(&chip9->i2c[i]);
> +
> +        object_property_set_int(obj, "engine", i + 1, &error_fatal);
> +        object_property_set_int(obj, "num-busses", 1, &error_fatal);
> +        object_property_set_link(obj, "chip", OBJECT(chip), &error_abort);
> +        if (!qdev_realize(DEVICE(obj), NULL, errp)) {
> +            return;
> +        }
> +        pnv_xscom_add_subregion(chip, PNV9_XSCOM_I2CM_BASE +
> +                               chip9->i2c[i].engine * PNV9_XSCOM_I2CM_SIZE,
> +                                &chip9->i2c[i].xscom_regs);
> +        qdev_connect_gpio_out(DEVICE(&chip9->i2c[i]), 0,
> +                              qdev_get_gpio_in(DEVICE(&chip9->psi),
> +                                               PSIHB9_IRQ_SBE_I2C));
> +    }
>   }
>   
>   static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
> diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> index 53e1d921d7..3bbe2783c9 100644
> --- a/include/hw/ppc/pnv_chip.h
> +++ b/include/hw/ppc/pnv_chip.h
> @@ -9,6 +9,7 @@
>   #include "hw/ppc/pnv_psi.h"
>   #include "hw/ppc/pnv_sbe.h"
>   #include "hw/ppc/pnv_xive.h"
> +#include "hw/ppc/pnv_i2c.h"
>   #include "hw/sysbus.h"
>   
>   OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
> @@ -86,6 +87,9 @@ struct Pnv9Chip {
>   
>   #define PNV9_CHIP_MAX_PEC 3
>       PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
> +
> +#define PNV9_CHIP_MAX_I2C 3
> +    PnvI2C      i2c[PNV9_CHIP_MAX_I2C];
>   };
>   
>   /*

Re: [PATCH 2/2] ppc/pnv: Connect I2C controller model to powernv9 chip

Posted by Miles Glenn 2 years, 4 months ago

On Tue, 2023-10-10 at 22:14 +0200, Cédric Le Goater wrote:
> On 10/10/23 19:19, Glenn Miles wrote:
> > From: Cédric Le Goater <clg@kaod.org>
> > 
> > Wires up three I2C controller instances to the powernv9 chip
> > XSCOM address space.
> > 
> > Each controller instance is wired up to a single I2C bus of
> > its own.  No other I2C devices are connected to the buses
> > at this time.
> > 
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
> > [milesg: Split wiring from addition of model itself]
> > [milesg: Added new commit message]
> > Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
> > ---
> >   hw/ppc/pnv.c              | 26 ++++++++++++++++++++++++++
> >   include/hw/ppc/pnv_chip.h |  4 ++++
> >   2 files changed, 30 insertions(+)
> > 
> > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > index eb54f93986..32b6d9889d 100644
> > --- a/hw/ppc/pnv.c
> > +++ b/hw/ppc/pnv.c
> > @@ -1438,6 +1438,10 @@ static void
> > pnv_chip_power9_instance_init(Object *obj)
> >           object_initialize_child(obj, "pec[*]", &chip9->pecs[i],
> >                                   TYPE_PNV_PHB4_PEC);
> >       }
> > +
> > +    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
> > +        object_initialize_child(obj, "i2c[*]", &chip9->i2c[i],
> > TYPE_PNV_I2C);
> > +    }
> >   }
> >   
> >   static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
> > @@ -1510,6 +1514,7 @@ static void
> > pnv_chip_power9_realize(DeviceState *dev, Error **errp)
> >       PnvChip *chip = PNV_CHIP(dev);
> >       Pnv9Psi *psi9 = &chip9->psi;
> >       Error *local_err = NULL;
> > +    int i;
> >   
> >       /* XSCOM bridge is first */
> >       pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err);
> > @@ -1613,6 +1618,27 @@ static void
> > pnv_chip_power9_realize(DeviceState *dev, Error **errp)
> >           error_propagate(errp, local_err);
> >           return;
> >       }
> > +
> > +    /*
> > +     * I2C
> > +     * TODO: The number of busses is specific to each platform
> 
> Could the hardcoded values  used in the properties below be
> PnvChipClass
> attributes instead ?
> 
> Thanks,
> 
> C.
> 

Yes, I can do that.

 
> 
> > +     */
> > +    for (i = 0; i < PNV9_CHIP_MAX_I2C; i++) {
> > +        Object *obj =  OBJECT(&chip9->i2c[i]);
> > +
> > +        object_property_set_int(obj, "engine", i + 1,
> > &error_fatal);
> > +        object_property_set_int(obj, "num-busses", 1,
> > &error_fatal);
> > +        object_property_set_link(obj, "chip", OBJECT(chip),
> > &error_abort);
> > +        if (!qdev_realize(DEVICE(obj), NULL, errp)) {
> > +            return;
> > +        }
> > +        pnv_xscom_add_subregion(chip, PNV9_XSCOM_I2CM_BASE +
> > +                               chip9->i2c[i].engine *
> > PNV9_XSCOM_I2CM_SIZE,
> > +                                &chip9->i2c[i].xscom_regs);
> > +        qdev_connect_gpio_out(DEVICE(&chip9->i2c[i]), 0,
> > +                              qdev_get_gpio_in(DEVICE(&chip9-
> > >psi),
> > +                                               PSIHB9_IRQ_SBE_I2C)
> > );
> > +    }
> >   }
> >   
> >   static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip,
> > uint64_t addr)
> > diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> > index 53e1d921d7..3bbe2783c9 100644
> > --- a/include/hw/ppc/pnv_chip.h
> > +++ b/include/hw/ppc/pnv_chip.h
> > @@ -9,6 +9,7 @@
> >   #include "hw/ppc/pnv_psi.h"
> >   #include "hw/ppc/pnv_sbe.h"
> >   #include "hw/ppc/pnv_xive.h"
> > +#include "hw/ppc/pnv_i2c.h"
> >   #include "hw/sysbus.h"
> >   
> >   OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
> > @@ -86,6 +87,9 @@ struct Pnv9Chip {
> >   
> >   #define PNV9_CHIP_MAX_PEC 3
> >       PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
> > +
> > +#define PNV9_CHIP_MAX_I2C 3
> > +    PnvI2C      i2c[PNV9_CHIP_MAX_I2C];
> >   };
> >   
> >   /*

[PATCH 1/2] ppc/pnv: Add an I2C controller model
[PATCH 2/2] ppc/pnv: Connect I2C controller model to powernv9 chip