target/ppc/int_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
and fix such warnings :
../target/ppc/int_helper.c: In function ‘helper_vupklpx’:
../target/ppc/int_helper.c:2025:21: warning: declaration of ‘r’ shadows a parameter [-Wshadow=local]
2025 | uint8_t r = (e >> 10) & 0x1f; \
| ^
../target/ppc/int_helper.c:2033:1: note: in expansion of macro ‘VUPKPX’
2033 | VUPKPX(lpx, UPKLO)
| ^~~~~~
../target/ppc/int_helper.c:2017:41: note: shadowed declaration is here
2017 | void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
| ~~~~~~~~~~~^
../target/ppc/int_helper.c:2033:1: note: in expansion of macro ‘VUPKPX’
2033 | VUPKPX(lpx, UPKLO)
| ^~~~~~
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/int_helper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 6fd00684a5b9..8719ac6e6265 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2022,11 +2022,11 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \
uint16_t e = b->u16[hi ? i : i + 4]; \
uint8_t a = (e >> 15) ? 0xff : 0; \
- uint8_t r = (e >> 10) & 0x1f; \
+ uint8_t _r = (e >> 10) & 0x1f; \
uint8_t g = (e >> 5) & 0x1f; \
- uint8_t b = e & 0x1f; \
+ uint8_t _b = e & 0x1f; \
\
- result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \
+ result.u32[i] = (a << 24) | (_r << 16) | (g << 8) | _b; \
} \
*r = result; \
}
--
2.41.0
23.09.2023 10:12, Cédric Le Goater: > --- a/target/ppc/int_helper.c > +++ b/target/ppc/int_helper.c > @@ -2022,11 +2022,11 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) > for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ > uint16_t e = b->u16[hi ? i : i + 4]; \ > uint8_t a = (e >> 15) ? 0xff : 0; \ > - uint8_t r = (e >> 10) & 0x1f; \ > + uint8_t _r = (e >> 10) & 0x1f; \ > uint8_t g = (e >> 5) & 0x1f; \ > - uint8_t b = e & 0x1f; \ > + uint8_t _b = e & 0x1f; \ I'd suggest to rename all of them here to have the same pattern. Maybe.. :) /mjt
On 9/23/23 10:25, Michael Tokarev wrote: > 23.09.2023 10:12, Cédric Le Goater: > >> --- a/target/ppc/int_helper.c >> +++ b/target/ppc/int_helper.c >> @@ -2022,11 +2022,11 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) >> for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ >> uint16_t e = b->u16[hi ? i : i + 4]; \ >> uint8_t a = (e >> 15) ? 0xff : 0; \ >> - uint8_t r = (e >> 10) & 0x1f; \ >> + uint8_t _r = (e >> 10) & 0x1f; \ >> uint8_t g = (e >> 5) & 0x1f; \ >> - uint8_t b = e & 0x1f; \ >> + uint8_t _b = e & 0x1f; \ > > I'd suggest to rename all of them here to have the same pattern. Maybe.. :) or maybe use the field names from the ISA : VRT,VRA,VRB ? C.
Cédric Le Goater <clg@kaod.org> writes: > On 9/23/23 10:25, Michael Tokarev wrote: >> 23.09.2023 10:12, Cédric Le Goater: >> >>> --- a/target/ppc/int_helper.c >>> +++ b/target/ppc/int_helper.c >>> @@ -2022,11 +2022,11 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) >>> for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ >>> uint16_t e = b->u16[hi ? i : i + 4]; \ >>> uint8_t a = (e >> 15) ? 0xff : 0; \ >>> - uint8_t r = (e >> 10) & 0x1f; \ >>> + uint8_t _r = (e >> 10) & 0x1f; \ >>> uint8_t g = (e >> 5) & 0x1f; \ >>> - uint8_t b = e & 0x1f; \ >>> + uint8_t _b = e & 0x1f; \ >> I'd suggest to rename all of them here to have the same pattern. Maybe.. :) > > or maybe use the field names from the ISA : VRT,VRA,VRB ? Should I expect a respin? If not, anyone ready to give an R-by as is?
On 9/29/23 10:00, Markus Armbruster wrote: > Cédric Le Goater <clg@kaod.org> writes: > >> On 9/23/23 10:25, Michael Tokarev wrote: >>> 23.09.2023 10:12, Cédric Le Goater: >>> >>>> --- a/target/ppc/int_helper.c >>>> +++ b/target/ppc/int_helper.c >>>> @@ -2022,11 +2022,11 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) >>>> for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ >>>> uint16_t e = b->u16[hi ? i : i + 4]; \ >>>> uint8_t a = (e >> 15) ? 0xff : 0; \ >>>> - uint8_t r = (e >> 10) & 0x1f; \ >>>> + uint8_t _r = (e >> 10) & 0x1f; \ >>>> uint8_t g = (e >> 5) & 0x1f; \ >>>> - uint8_t b = e & 0x1f; \ >>>> + uint8_t _b = e & 0x1f; \ >>> I'd suggest to rename all of them here to have the same pattern. Maybe.. :) >> >> or maybe use the field names from the ISA : VRT,VRA,VRB ? > > Should I expect a respin? > > If not, anyone ready to give an R-by as is? This one I can respin. I agree with Michael that some consistency is preferable. Preparing a v2 full of '_'. Thanks, C.
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