[v1] qemu/timer: Add host ticks function for RISC-V

[PATCH] qemu/timer: Add host ticks function for RISC-V

Posted by LIU Zhiwei 1 year, 2 months ago

From: LIU Zhiwei <lzw194868@alibaba-inc.com>

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 include/qemu/timer.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 9a91cb1248..ce0b66d122 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -979,6 +979,25 @@ static inline int64_t cpu_get_host_ticks(void)
     return cur - ofs;
 }
 
+#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 32
+static inline int64_t cpu_get_host_ticks(void)
+{
+    uint32_t lo, hi;
+    asm volatile("RDCYCLE %0\n\t"
+                 "RDCYCLEH %1"
+                 : "=r"(lo), "=r"(hi));
+    return lo | (uint64_t)hi << 32;
+}
+
+#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen > 32
+static inline int64_t cpu_get_host_ticks(void)
+{
+    int64_t val;
+
+    asm volatile("RDCYCLE %0" : "=r"(cc));
+    return val;
+}
+
 #else
 /* The host CPU doesn't have an easily accessible cycle counter.
    Just return a monotonically increasing value.  This will be
-- 
2.17.1

Re: [PATCH] qemu/timer: Add host ticks function for RISC-V

Posted by Richard Henderson 1 year, 2 months ago

On 9/7/23 20:23, LIU Zhiwei wrote:
> From: LIU Zhiwei <lzw194868@alibaba-inc.com>
> 
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> ---
>   include/qemu/timer.h | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/include/qemu/timer.h b/include/qemu/timer.h
> index 9a91cb1248..ce0b66d122 100644
> --- a/include/qemu/timer.h
> +++ b/include/qemu/timer.h
> @@ -979,6 +979,25 @@ static inline int64_t cpu_get_host_ticks(void)
>       return cur - ofs;
>   }
>   
> +#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 32
> +static inline int64_t cpu_get_host_ticks(void)
> +{
> +    uint32_t lo, hi;
> +    asm volatile("RDCYCLE %0\n\t"
> +                 "RDCYCLEH %1"
> +                 : "=r"(lo), "=r"(hi));
> +    return lo | (uint64_t)hi << 32;
> +}
> +
> +#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen > 32
> +static inline int64_t cpu_get_host_ticks(void)
> +{
> +    int64_t val;
> +
> +    asm volatile("RDCYCLE %0" : "=r"(cc));
> +    return val;
> +}

__riscv_xlen should never be undefined.

Don't you need a loop for RDCYCLEH to avoid time going backward?

     do {
         asm("rdcycleh %0\n\t"
             "rdcycle %1\n\t"
             "rdcycleh %2\n\t"
             : "=r"(hi), "=r"(lo), "=r"(tmph));
     } while (unlikely(tmph != hi));


r~

Re: [PATCH] qemu/timer: Add host ticks function for RISC-V

Posted by LIU Zhiwei 1 year, 2 months ago

On 2023/9/10 1:43, Richard Henderson wrote:
> On 9/7/23 20:23, LIU Zhiwei wrote:
>> From: LIU Zhiwei <lzw194868@alibaba-inc.com>
>>
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
>> ---
>>   include/qemu/timer.h | 19 +++++++++++++++++++
>>   1 file changed, 19 insertions(+)
>>
>> diff --git a/include/qemu/timer.h b/include/qemu/timer.h
>> index 9a91cb1248..ce0b66d122 100644
>> --- a/include/qemu/timer.h
>> +++ b/include/qemu/timer.h
>> @@ -979,6 +979,25 @@ static inline int64_t cpu_get_host_ticks(void)
>>       return cur - ofs;
>>   }
>>   +#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 32
>> +static inline int64_t cpu_get_host_ticks(void)
>> +{
>> +    uint32_t lo, hi;
>> +    asm volatile("RDCYCLE %0\n\t"
>> +                 "RDCYCLEH %1"
>> +                 : "=r"(lo), "=r"(hi));
>> +    return lo | (uint64_t)hi << 32;
>> +}
>> +
>> +#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen > 32
>> +static inline int64_t cpu_get_host_ticks(void)
>> +{
>> +    int64_t val;
>> +
>> +    asm volatile("RDCYCLE %0" : "=r"(cc));
>> +    return val;
>> +}
>
> __riscv_xlen should never be undefined.
OK
>
> Don't you need a loop for RDCYCLEH to avoid time going backward?
>
>     do {
>         asm("rdcycleh %0\n\t"
>             "rdcycle %1\n\t"
>             "rdcycleh %2\n\t"
>             : "=r"(hi), "=r"(lo), "=r"(tmph));
>     } while (unlikely(tmph != hi));
>
Yes, I think we should do this for XLEN == 32bits.

Thanks,
Zhiwei

>
> r~