[v4] Lower TCG vector ops to LSX

[PATCH v4 00/16] Lower TCG vector ops to LSX

Jiajie Chen posted 16 patches 7 months, 3 weeks ago

Diff against v1 v2 v3
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230908022302.180442-1-c@jia.je

Maintainers: Richard Henderson <richard.henderson@linaro.org>, WANG Xuerui <git@xen0n.name>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Aurelien Jarno <aurelien@aurel32.net>, Huacai Chen <chenhuacai@kernel.org>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <Alistair.Francis@wdc.com>, Stefan Weil <sw@weilnetz.de>

tcg/aarch64/tcg-target.c.inc         |    2 +-
tcg/arm/tcg-target.c.inc             |    2 +-
tcg/i386/tcg-target.c.inc            |    2 +-
tcg/loongarch64/tcg-insn-defs.c.inc  | 6251 +++++++++++++++++++++++++-
tcg/loongarch64/tcg-target-con-set.h |    9 +
tcg/loongarch64/tcg-target-con-str.h |    3 +
tcg/loongarch64/tcg-target.c.inc     |  619 ++-
tcg/loongarch64/tcg-target.h         |   40 +-
tcg/loongarch64/tcg-target.opc.h     |   12 +
tcg/mips/tcg-target.c.inc            |    2 +-
tcg/ppc/tcg-target.c.inc             |    2 +-
tcg/riscv/tcg-target.c.inc           |    2 +-
tcg/s390x/tcg-target.c.inc           |    2 +-
tcg/sparc64/tcg-target.c.inc         |    2 +-
tcg/tcg.c                            |    4 +-
tcg/tci/tcg-target.c.inc             |    2 +-
16 files changed, 6824 insertions(+), 132 deletions(-)
create mode 100644 tcg/loongarch64/tcg-target.opc.h

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[PATCH v4 00/16] Lower TCG vector ops to LSX

Posted by Jiajie Chen 7 months, 3 weeks ago

This patch series allows qemu to utilize LSX instructions on LoongArch
machines to execute TCG vector ops.

Passed tcg tests with x86_64 and aarch64 cross compilers.

Changes since v3:

- Refactor add/sub_vec handling code to use a helper function
- Only use vldx/vstx for MO_128 load/store, otherwise fallback to two ld/st

Changes since v2:

- Add vece argument to tcg_target_const_match() for const args of vector ops
- Use custom constraint for cmp_vec/add_vec/sub_vec for better const arg handling
- Implement 128-bit load & store using vldx/vstx

Changes since v1:

- Optimize dupi_vec/st_vec/ld_vec/cmp_vec/add_vec/sub_vec generation
- Lower not_vec/shi_vec/roti_vec/rotv_vec


Jiajie Chen (16):
  tcg/loongarch64: Import LSX instructions
  tcg/loongarch64: Lower basic tcg vec ops to LSX
  tcg: pass vece to tcg_target_const_match()
  tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt
  tcg/loongarch64: Lower add/sub_vec to vadd/vsub
  tcg/loongarch64: Lower vector bitwise operations
  tcg/loongarch64: Lower neg_vec to vneg
  tcg/loongarch64: Lower mul_vec to vmul
  tcg/loongarch64: Lower vector min max ops
  tcg/loongarch64: Lower vector saturated ops
  tcg/loongarch64: Lower vector shift vector ops
  tcg/loongarch64: Lower bitsel_vec to vbitsel
  tcg/loongarch64: Lower vector shift integer ops
  tcg/loongarch64: Lower rotv_vec ops to LSX
  tcg/loongarch64: Lower rotli_vec to vrotri
  tcg/loongarch64: Implement 128-bit load & store

 tcg/aarch64/tcg-target.c.inc         |    2 +-
 tcg/arm/tcg-target.c.inc             |    2 +-
 tcg/i386/tcg-target.c.inc            |    2 +-
 tcg/loongarch64/tcg-insn-defs.c.inc  | 6251 +++++++++++++++++++++++++-
 tcg/loongarch64/tcg-target-con-set.h |    9 +
 tcg/loongarch64/tcg-target-con-str.h |    3 +
 tcg/loongarch64/tcg-target.c.inc     |  619 ++-
 tcg/loongarch64/tcg-target.h         |   40 +-
 tcg/loongarch64/tcg-target.opc.h     |   12 +
 tcg/mips/tcg-target.c.inc            |    2 +-
 tcg/ppc/tcg-target.c.inc             |    2 +-
 tcg/riscv/tcg-target.c.inc           |    2 +-
 tcg/s390x/tcg-target.c.inc           |    2 +-
 tcg/sparc64/tcg-target.c.inc         |    2 +-
 tcg/tcg.c                            |    4 +-
 tcg/tci/tcg-target.c.inc             |    2 +-
 16 files changed, 6824 insertions(+), 132 deletions(-)
 create mode 100644 tcg/loongarch64/tcg-target.opc.h

-- 
2.42.0