Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/helper.h | 2 +-
target/loongarch/vec_helper.c | 11 +++++------
target/loongarch/insn_trans/trans_vec.c.inc | 22 ++++++++++++---------
3 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index ead16567c2..727ccfb32c 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -682,7 +682,7 @@ DEF_HELPER_4(vilvh_h, void, env, i32, i32, i32)
DEF_HELPER_4(vilvh_w, void, env, i32, i32, i32)
DEF_HELPER_4(vilvh_d, void, env, i32, i32, i32)
-DEF_HELPER_5(vshuf_b, void, env, i32, i32, i32, i32)
+DEF_HELPER_FLAGS_5(vshuf_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_4(vshuf_h, void, env, i32, i32, i32)
DEF_HELPER_4(vshuf_w, void, env, i32, i32, i32)
DEF_HELPER_4(vshuf_d, void, env, i32, i32, i32)
diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c
index 3a7a620227..7078c4c845 100644
--- a/target/loongarch/vec_helper.c
+++ b/target/loongarch/vec_helper.c
@@ -2899,15 +2899,14 @@ VILVH(vilvh_h, 32, H)
VILVH(vilvh_w, 64, W)
VILVH(vilvh_d, 128, D)
-void HELPER(vshuf_b)(CPULoongArchState *env,
- uint32_t vd, uint32_t vj, uint32_t vk, uint32_t va)
+void HELPER(vshuf_b)(void *vd, void *vj, void *vk, void *va, uint32_t desc)
{
int i, m;
VReg temp;
- VReg *Vd = &(env->fpr[vd].vreg);
- VReg *Vj = &(env->fpr[vj].vreg);
- VReg *Vk = &(env->fpr[vk].vreg);
- VReg *Va = &(env->fpr[va].vreg);
+ VReg *Vd = (VReg *)vd;
+ VReg *Vj = (VReg *)vj;
+ VReg *Vk = (VReg *)vk;
+ VReg *Va = (VReg *)va;
m = LSX_LEN/8;
for (i = 0; i < m ; i++) {
diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc
index 85bc8670a7..6f45296987 100644
--- a/target/loongarch/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/insn_trans/trans_vec.c.inc
@@ -34,18 +34,22 @@ static bool gen_vvvv_ptr(DisasContext *ctx, arg_vvvv *a,
return gen_vvvv_ptr_vl(ctx, a, 16, fn);
}
-static bool gen_vvvv(DisasContext *ctx, arg_vvvv *a,
- void (*func)(TCGv_ptr, TCGv_i32, TCGv_i32,
- TCGv_i32, TCGv_i32))
+static bool gen_vvvv_vl(DisasContext *ctx, arg_vvvv *a, uint32_t oprsz,
+ gen_helper_gvec_4 *fn)
{
- TCGv_i32 vd = tcg_constant_i32(a->vd);
- TCGv_i32 vj = tcg_constant_i32(a->vj);
- TCGv_i32 vk = tcg_constant_i32(a->vk);
- TCGv_i32 va = tcg_constant_i32(a->va);
+ tcg_gen_gvec_4_ool(vec_full_offset(a->vd),
+ vec_full_offset(a->vj),
+ vec_full_offset(a->vk),
+ vec_full_offset(a->va),
+ oprsz, ctx->vl / 8, oprsz, fn);
+ return true;
+}
+static bool gen_vvvv(DisasContext *ctx, arg_vvvv *a,
+ gen_helper_gvec_4 *fn)
+{
CHECK_SXE;
- func(cpu_env, vd, vj, vk, va);
- return true;
+ return gen_vvvv_vl(ctx, a, 16, fn);
}
static bool gen_vvv(DisasContext *ctx, arg_vvv *a,
--
2.39.1