On 2023/9/6 17:16, Daniel Henrique Barboza wrote:
> This CPU only exists if we're compiling with KVM so move it to the kvm
> specific file.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> target/riscv/cpu.c | 16 ----------------
> target/riscv/kvm.c | 21 +++++++++++++++++++++
> 2 files changed, 21 insertions(+), 16 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 4c6d595067..c15bb572d4 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -652,19 +652,6 @@ static void rv32_imafcu_nommu_cpu_init(Object *obj)
> }
> #endif
>
> -#if defined(CONFIG_KVM)
> -static void riscv_host_cpu_init(Object *obj)
> -{
> - CPURISCVState *env = &RISCV_CPU(obj)->env;
> -#if defined(TARGET_RISCV32)
> - set_misa(env, MXL_RV32, 0);
> -#elif defined(TARGET_RISCV64)
> - set_misa(env, MXL_RV64, 0);
> -#endif
> - riscv_cpu_add_user_properties(obj);
Remove this statement in patch 5. Otherwise,
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Zhiwei
> -}
> -#endif /* CONFIG_KVM */
> -
> static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
> {
> ObjectClass *oc;
> @@ -2044,9 +2031,6 @@ static const TypeInfo riscv_cpu_type_infos[] = {
> },
> DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_ANY, riscv_any_cpu_init),
> DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_MAX, riscv_max_cpu_init),
> -#if defined(CONFIG_KVM)
> - DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init),
> -#endif
> #if defined(TARGET_RISCV32)
> DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE32, rv32_base_cpu_init),
> DEFINE_CPU(TYPE_RISCV_CPU_IBEX, rv32_ibex_cpu_init),
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 14763ec0cd..b4d8d7a46c 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -1227,3 +1227,24 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
>
> kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
> }
> +
> +static void riscv_host_cpu_init(Object *obj)
> +{
> + CPURISCVState *env = &RISCV_CPU(obj)->env;
> +
> +#if defined(TARGET_RISCV32)
> + env->misa_mxl_max = env->misa_mxl = MXL_RV32;
> +#elif defined(TARGET_RISCV64)
> + env->misa_mxl_max = env->misa_mxl = MXL_RV64;
> +#endif
> +}
> +
> +static const TypeInfo riscv_kvm_cpu_type_infos[] = {
> + {
> + .name = TYPE_RISCV_CPU_HOST,
> + .parent = TYPE_RISCV_CPU,
> + .instance_init = riscv_host_cpu_init,
> + }
> +};
> +
> +DEFINE_TYPES(riscv_kvm_cpu_type_infos)