The following changes since commit b0dd9a7d6dd15a6898e9c585b521e6bec79b25aa:

  Open 8.2 development tree (2023-08-22 07:14:07 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230823

for you to fetch changes up to 05e09d2a830a74d651ca6106e2002ec4f7b6997a:

  tcg: spelling fixes (2023-08-23 13:20:47 -0700)

----------------------------------------------------------------
accel/*: Widen pc/saved_insn for *_sw_breakpoint
accel/tcg: Replace remaining target_ulong in system-mode accel
tcg: spelling fixes
tcg: Document bswap, hswap, wswap byte patterns
tcg: Introduce negsetcond opcodes
tcg: Fold deposit with zero to and
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
tcg/i386: Drop BYTEH deposits for 64-bit
tcg/i386: Allow immediate as input to deposit
target/*: Use tcg_gen_negsetcond_*

----------------------------------------------------------------
Anton Johansson via (9):
      accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint
      accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint
      sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint
      sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint
      include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*()
      include/exec: typedef abi_ptr to vaddr in softmmu
      include/exec: Widen tlb_hit/tlb_hit_page()
      accel/tcg: Widen address arg in tlb_compare_set()
      accel/tcg: Update run_on_cpu_data static assert

Mark Cave-Ayland (1):
      docs/devel/tcg-ops: fix missing newlines in "Host vector operations"

Michael Tokarev (1):
      tcg: spelling fixes

Philippe Mathieu-Daudé (9):
      docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32()
      tcg/tcg-op: Document bswap16_i32() byte pattern
      tcg/tcg-op: Document bswap16_i64() byte pattern
      tcg/tcg-op: Document bswap32_i32() byte pattern
      tcg/tcg-op: Document bswap32_i64() byte pattern
      tcg/tcg-op: Document bswap64_i64() byte pattern
      tcg/tcg-op: Document hswap_i32/64() byte pattern
      tcg/tcg-op: Document wswap_i64() byte pattern
      target/cris: Fix a typo in gen_swapr()

Richard Henderson (28):
      target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg
      tcg/i386: Drop BYTEH deposits for 64-bit
      tcg: Fold deposit with zero to and
      tcg/i386: Allow immediate as input to deposit_*
      tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
      tcg: Introduce negsetcond opcodes
      tcg: Use tcg_gen_negsetcond_*
      target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero
      target/arm: Use tcg_gen_negsetcond_*
      target/m68k: Use tcg_gen_negsetcond_*
      target/openrisc: Use tcg_gen_negsetcond_*
      target/ppc: Use tcg_gen_negsetcond_*
      target/sparc: Use tcg_gen_movcond_i64 in gen_edge
      target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl
      tcg/ppc: Implement negsetcond_*
      tcg/ppc: Use the Set Boolean Extension
      tcg/aarch64: Implement negsetcond_*
      tcg/arm: Implement negsetcond_i32
      tcg/riscv: Implement negsetcond_*
      tcg/s390x: Implement negsetcond_*
      tcg/sparc64: Implement negsetcond_*
      tcg/i386: Merge tcg_out_brcond{32,64}
      tcg/i386: Merge tcg_out_setcond{32,64}
      tcg/i386: Merge tcg_out_movcond{32,64}
      tcg/i386: Use CMP+SBB in tcg_out_setcond
      tcg/i386: Clear dest first in tcg_out_setcond if possible
      tcg/i386: Use shift in tcg_out_setcond
      tcg/i386: Implement negsetcond_*

 docs/devel/tcg-ops.rst                     |  15 +-
 accel/tcg/atomic_template.h                |  16 +-
 include/exec/cpu-all.h                     |   4 +-
 include/exec/cpu_ldst.h                    |  28 +--
 include/sysemu/hvf.h                       |  12 +-
 include/sysemu/kvm.h                       |  12 +-
 include/tcg/tcg-op-common.h                |   4 +
 include/tcg/tcg-op.h                       |   2 +
 include/tcg/tcg-opc.h                      |   6 +-
 include/tcg/tcg.h                          |   4 +-
 tcg/aarch64/tcg-target.h                   |   5 +-
 tcg/arm/tcg-target.h                       |   1 +
 tcg/i386/tcg-target-con-set.h              |   2 +-
 tcg/i386/tcg-target-con-str.h              |   1 -
 tcg/i386/tcg-target.h                      |   9 +-
 tcg/loongarch64/tcg-target.h               |   6 +-
 tcg/mips/tcg-target.h                      |   5 +-
 tcg/ppc/tcg-target.h                       |   5 +-
 tcg/riscv/tcg-target.h                     |   5 +-
 tcg/s390x/tcg-target.h                     |   5 +-
 tcg/sparc64/tcg-target.h                   |   5 +-
 tcg/tci/tcg-target.h                       |   5 +-
 accel/hvf/hvf-accel-ops.c                  |   4 +-
 accel/hvf/hvf-all.c                        |   2 +-
 accel/kvm/kvm-all.c                        |   3 +-
 accel/tcg/cputlb.c                         |  17 +-
 target/alpha/translate.c                   |   7 +-
 target/arm/hvf/hvf.c                       |   4 +-
 target/arm/kvm64.c                         |   6 +-
 target/arm/tcg/translate-a64.c             |  22 +--
 target/arm/tcg/translate.c                 |  12 +-
 target/cris/translate.c                    |  20 +-
 target/i386/hvf/hvf.c                      |   4 +-
 target/i386/kvm/kvm.c                      |   8 +-
 target/m68k/translate.c                    |  35 ++--
 target/openrisc/translate.c                |   6 +-
 target/ppc/kvm.c                           |  13 +-
 target/riscv/vector_helper.c               |   2 +-
 target/rx/op_helper.c                      |   6 +-
 target/s390x/kvm/kvm.c                     |   6 +-
 target/sparc/translate.c                   |  17 +-
 target/tricore/translate.c                 |  16 +-
 tcg/optimize.c                             |  78 +++++++-
 tcg/tcg-op-gvec.c                          |   6 +-
 tcg/tcg-op.c                               | 151 ++++++++++++---
 tcg/tcg.c                                  |   9 +-
 target/ppc/translate/fixedpoint-impl.c.inc |   6 +-
 target/ppc/translate/vmx-impl.c.inc        |   8 +-
 tcg/aarch64/tcg-target.c.inc               |  14 +-
 tcg/arm/tcg-target.c.inc                   |  19 +-
 tcg/i386/tcg-target.c.inc                  | 291 ++++++++++++++++++-----------
 tcg/ppc/tcg-target.c.inc                   | 149 ++++++++++-----
 tcg/riscv/tcg-target.c.inc                 |  49 ++++-
 tcg/s390x/tcg-target.c.inc                 |  78 +++++---
 tcg/sparc64/tcg-target.c.inc               |  40 +++-
 55 files changed, 832 insertions(+), 433 deletions(-)

On Wed, 23 Aug 2023 at 16:24, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit b0dd9a7d6dd15a6898e9c585b521e6bec79b25aa:
>
>   Open 8.2 development tree (2023-08-22 07:14:07 -0700)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230823
>
> for you to fetch changes up to 05e09d2a830a74d651ca6106e2002ec4f7b6997a:
>
>   tcg: spelling fixes (2023-08-23 13:20:47 -0700)
>
> ----------------------------------------------------------------
> accel/*: Widen pc/saved_insn for *_sw_breakpoint
> accel/tcg: Replace remaining target_ulong in system-mode accel
> tcg: spelling fixes
> tcg: Document bswap, hswap, wswap byte patterns
> tcg: Introduce negsetcond opcodes
> tcg: Fold deposit with zero to and
> tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
> tcg/i386: Drop BYTEH deposits for 64-bit
> tcg/i386: Allow immediate as input to deposit
> target/*: Use tcg_gen_negsetcond_*
>
> ----------------------------------------------------------------
> Anton Johansson via (9):

Hi Richard,
Please fix up the authorship information for Anton Johansson. The pull
request has "Anton Johansson via <qemu-devel@nongnu.org>". I think the
email address should be "Anton Johansson <anjo@rev.ng>".

Thanks!

Stefan