tcg: Factor hrev{32,64}_{i32,i64,tl} out

[PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode

Posted by Philippe Mathieu-Daudé 2 years, 5 months ago

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/tcg/translate.c | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 08ee745a6d..822b932262 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -4916,17 +4916,8 @@ static void gen_bshfl(DisasContext *ctx, uint32_t op2, int rt, int rd)
     gen_load_gpr(t0, rt);
     switch (op2) {
     case OPC_WSBH:
-        {
-            TCGv t1 = tcg_temp_new();
-            TCGv t2 = tcg_constant_tl(0x00FF00FF);
-
-            tcg_gen_shri_tl(t1, t0, 8);
-            tcg_gen_and_tl(t1, t1, t2);
-            tcg_gen_and_tl(t0, t0, t2);
-            tcg_gen_shli_tl(t0, t0, 8);
-            tcg_gen_or_tl(t0, t0, t1);
-            tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
-        }
+        tcg_gen_hrev32_tl(t0, t0);
+        tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
         break;
     case OPC_SEB:
         tcg_gen_ext8s_tl(cpu_gpr[rd], t0);
-- 
2.41.0

Re: [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode

Posted by Richard Henderson 2 years, 5 months ago

On 8/22/23 05:57, Philippe Mathieu-Daudé wrote:
> -        {
> -            TCGv t1 = tcg_temp_new();
> -            TCGv t2 = tcg_constant_tl(0x00FF00FF);
> -
> -            tcg_gen_shri_tl(t1, t0, 8);
> -            tcg_gen_and_tl(t1, t1, t2);
> -            tcg_gen_and_tl(t0, t0, t2);
> -            tcg_gen_shli_tl(t0, t0, 8);
> -            tcg_gen_or_tl(t0, t0, t1);
> -            tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
> -        }
> +        tcg_gen_hrev32_tl(t0, t0);
> +        tcg_gen_ext32s_tl(cpu_gpr[rd], t0);

Ah, you did want tcg_gen_bswap16x2_tl(dst, src, TCG_BSWAP_OS).


r~

Re: [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode

Posted by Philippe Mathieu-Daudé 2 years, 5 months ago

On 22/8/23 17:42, Richard Henderson wrote:
> On 8/22/23 05:57, Philippe Mathieu-Daudé wrote:
>> -        {
>> -            TCGv t1 = tcg_temp_new();
>> -            TCGv t2 = tcg_constant_tl(0x00FF00FF);
>> -
>> -            tcg_gen_shri_tl(t1, t0, 8);
>> -            tcg_gen_and_tl(t1, t1, t2);
>> -            tcg_gen_and_tl(t0, t0, t2);
>> -            tcg_gen_shli_tl(t0, t0, 8);
>> -            tcg_gen_or_tl(t0, t0, t1);
>> -            tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
>> -        }
>> +        tcg_gen_hrev32_tl(t0, t0);
>> +        tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
> 
> Ah, you did want tcg_gen_bswap16x2_tl(dst, src, TCG_BSWAP_OS).

Got it (per your reply to the cover).

> 
> 
> r~