On 7/12/23 23:51, Joelle van Dyne wrote:
> The register is actually 64-bits but in order to make this more clear
> than the specification, we define two 32-bit registers:
> CTRL_RSP_LADDR and CTRL_RSP_HADDR to match the CTRL_CMD_* naming. This
> deviates from the specs but is way more clear.
>
> Previously, the only CRB device uses a fixed system address so this
> was not an issue. However, once we support SysBus CRB device, the
> address can be anywhere in 64-bit space.
>
> Signed-off-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
> ---
> include/hw/acpi/tpm.h | 3 ++-
> hw/tpm/tpm_crb_common.c | 3 ++-
> tests/qtest/tpm-crb-test.c | 2 +-
> tests/qtest/tpm-util.c | 2 +-
> 4 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h
> index 579c45f5ba..f60bfe2789 100644
> --- a/include/hw/acpi/tpm.h
> +++ b/include/hw/acpi/tpm.h
> @@ -174,7 +174,8 @@ REG32(CRB_CTRL_CMD_SIZE, 0x58)
> REG32(CRB_CTRL_CMD_LADDR, 0x5C)
> REG32(CRB_CTRL_CMD_HADDR, 0x60)
> REG32(CRB_CTRL_RSP_SIZE, 0x64)
> -REG32(CRB_CTRL_RSP_ADDR, 0x68)
> +REG32(CRB_CTRL_RSP_LADDR, 0x68)
> +REG32(CRB_CTRL_RSP_HADDR, 0x6C)
> REG32(CRB_DATA_BUFFER, 0x80)
>
> #define TPM_CRB_ADDR_BASE 0xFED40000
> diff --git a/hw/tpm/tpm_crb_common.c b/hw/tpm/tpm_crb_common.c
> index 4c173affb6..228e2d0faf 100644
> --- a/hw/tpm/tpm_crb_common.c
> +++ b/hw/tpm/tpm_crb_common.c
> @@ -199,7 +199,8 @@ void tpm_crb_reset(TPMCRBState *s, uint64_t baseaddr)
> s->regs[R_CRB_CTRL_CMD_LADDR] = (uint32_t)baseaddr;
> s->regs[R_CRB_CTRL_CMD_HADDR] = (uint32_t)(baseaddr >> 32);
> s->regs[R_CRB_CTRL_RSP_SIZE] = CRB_CTRL_CMD_SIZE;
> - s->regs[R_CRB_CTRL_RSP_ADDR] = (uint32_t)baseaddr;
> + s->regs[R_CRB_CTRL_RSP_LADDR] = (uint32_t)baseaddr;
> + s->regs[R_CRB_CTRL_RSP_HADDR] = (uint32_t)(baseaddr >> 32);
>
> s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->tpmbe),
> CRB_CTRL_CMD_SIZE);
> diff --git a/tests/qtest/tpm-crb-test.c b/tests/qtest/tpm-crb-test.c
> index 396ae3f91c..9d30fe8293 100644
> --- a/tests/qtest/tpm-crb-test.c
> +++ b/tests/qtest/tpm-crb-test.c
> @@ -28,7 +28,7 @@ static void tpm_crb_test(const void *data)
> uint32_t csize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_SIZE);
> uint64_t caddr = readq(TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_LADDR);
> uint32_t rsize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_SIZE);
> - uint64_t raddr = readq(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_ADDR);
> + uint64_t raddr = readq(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_LADDR);
> uint8_t locstate = readb(TPM_CRB_ADDR_BASE + A_CRB_LOC_STATE);
> uint32_t locctrl = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL);
> uint32_t locsts = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_STS);
> diff --git a/tests/qtest/tpm-util.c b/tests/qtest/tpm-util.c
> index 1c0319e6e7..dd02057fc0 100644
> --- a/tests/qtest/tpm-util.c
> +++ b/tests/qtest/tpm-util.c
> @@ -25,7 +25,7 @@ void tpm_util_crb_transfer(QTestState *s,
> unsigned char *rsp, size_t rsp_size)
> {
> uint64_t caddr = qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_LADDR);
> - uint64_t raddr = qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_ADDR);
> + uint64_t raddr = qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_LADDR);
>
> qtest_writeb(s, TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL, 1);
>