[v1] pci: Compare function number and ARI next function number

[PATCH 1/4] docs: Fix next function numbers in SR/IOV documentation

Posted by Akihiko Odaki 2 years, 5 months ago

The next function numbers are expected to form a linked list ending with
0.

Fixes: 2503461691 ("pcie: Add some SR/IOV API documentation in docs/pcie_sriov.txt")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 docs/pcie_sriov.txt | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt
index 7eff7f2703..cc4232e49a 100644
--- a/docs/pcie_sriov.txt
+++ b/docs/pcie_sriov.txt
@@ -48,7 +48,7 @@ setting up a BAR for a VF.
       ...
       int ret = pcie_endpoint_cap_init(d, 0x70);
       ...
-      pcie_ari_init(d, 0x100, 1);
+      pcie_ari_init(d, 0x100, fun_offset);
       ...
 
       /* Add and initialize the SR/IOV capability */
@@ -76,9 +76,10 @@ setting up a BAR for a VF.
    pci_your_vf_dev_realize( ... )
    {
       ...
+      uint16_t nextvfn = pcie_sriov_vf_number(dev) + 1;
       int ret = pcie_endpoint_cap_init(d, 0x60);
       ...
-      pcie_ari_init(d, 0x100, 1);
+      pcie_ari_init(d, 0x100, nextvfn < total_vfs ? fun_offset + nextvfn * stride : 0);
       ...
       memory_region_init(mr, ... )
       pcie_sriov_vf_register_bar(d, bar_nr, mr);
-- 
2.41.0

Re: [PATCH 1/4] docs: Fix next function numbers in SR/IOV documentation

Posted by Ani Sinha 2 years, 5 months ago


> On 01-Jul-2023, at 12:31 PM, Akihiko Odaki <akihiko.odaki@daynix.com> wrote:
> 
> The next function numbers are expected to form a linked list ending with
> 0.
> 
> Fixes: 2503461691 ("pcie: Add some SR/IOV API documentation in docs/pcie_sriov.txt")
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
> docs/pcie_sriov.txt | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt
> index 7eff7f2703..cc4232e49a 100644
> --- a/docs/pcie_sriov.txt
> +++ b/docs/pcie_sriov.txt
> @@ -48,7 +48,7 @@ setting up a BAR for a VF.
>       ...
>       int ret = pcie_endpoint_cap_init(d, 0x70);
>       ...
> -      pcie_ari_init(d, 0x100, 1);
> +      pcie_ari_init(d, 0x100, fun_offset);
>       ...
> 
>       /* Add and initialize the SR/IOV capability */
> @@ -76,9 +76,10 @@ setting up a BAR for a VF.
>    pci_your_vf_dev_realize( ... )
>    {
>       ...
> +      uint16_t nextvfn = pcie_sriov_vf_number(dev) + 1;
>       int ret = pcie_endpoint_cap_init(d, 0x60);
>       ...
> -      pcie_ari_init(d, 0x100, 1);
> +      pcie_ari_init(d, 0x100, nextvfn < total_vfs ? fun_offset + nextvfn * stride : 0);
                                                                                                                                                    ^^^^
I think this will be fun_offset and not just 0
Same with the other patches ..

>       ...
>       memory_region_init(mr, ... )
>       pcie_sriov_vf_register_bar(d, bar_nr, mr);
> -- 
> 2.41.0
>

Re: [PATCH 1/4] docs: Fix next function numbers in SR/IOV documentation

Posted by Akihiko Odaki 2 years, 5 months ago

On 2023/07/01 23:31, Ani Sinha wrote:
> 
> 
>> On 01-Jul-2023, at 12:31 PM, Akihiko Odaki <akihiko.odaki@daynix.com> wrote:
>>
>> The next function numbers are expected to form a linked list ending with
>> 0.
>>
>> Fixes: 2503461691 ("pcie: Add some SR/IOV API documentation in docs/pcie_sriov.txt")
>> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
>> ---
>> docs/pcie_sriov.txt | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt
>> index 7eff7f2703..cc4232e49a 100644
>> --- a/docs/pcie_sriov.txt
>> +++ b/docs/pcie_sriov.txt
>> @@ -48,7 +48,7 @@ setting up a BAR for a VF.
>>        ...
>>        int ret = pcie_endpoint_cap_init(d, 0x70);
>>        ...
>> -      pcie_ari_init(d, 0x100, 1);
>> +      pcie_ari_init(d, 0x100, fun_offset);
>>        ...
>>
>>        /* Add and initialize the SR/IOV capability */
>> @@ -76,9 +76,10 @@ setting up a BAR for a VF.
>>     pci_your_vf_dev_realize( ... )
>>     {
>>        ...
>> +      uint16_t nextvfn = pcie_sriov_vf_number(dev) + 1;
>>        int ret = pcie_endpoint_cap_init(d, 0x60);
>>        ...
>> -      pcie_ari_init(d, 0x100, 1);
>> +      pcie_ari_init(d, 0x100, nextvfn < total_vfs ? fun_offset + nextvfn * stride : 0);
>                                                                                                                                                      ^^^^
> I think this will be fun_offset and not just 0
> Same with the other patches ..

It is intended to point to the PF. fun_offset points to the first VF.

> 
>>        ...
>>        memory_region_init(mr, ... )
>>        pcie_sriov_vf_register_bar(d, bar_nr, mr);
>> -- 
>> 2.41.0
>>
>